Microchip Design Methods

**Chapter 2**

**Abstract**

technology

**19**

**1. Introduction**

Methods

Ultra-Low-Voltage IC Design

The emerging nanoscale technologies inherently offer transistors working with low voltage levels and are optimized for low-power operation. However, these technologies lack quality electronic components vital for reliable analog and/or mixed-signal design (e.g., resistor, capacitor, etc.) as they are predominantly used in high-performance digital designs. Moreover, the voltage headroom, ESD properties, the maximum current densities, parasitic effects, process fluctuations, aging effects, and many other parameters are superior in verified-by-time CMOS processes using planar transistors. This is the main reason, why low-voltage, low-power high-performance analog and mixed-signal circuits are still being designed in mature process nodes. In the proposed chapter, we bring an overview of main challenges and design techniques effectively applicable for ultra-low-voltage and low-power analog integrated circuits in nanoscale technologies. New design challenges and limitations linked with a low value of the supply voltage, the process fluctuation, device mismatch, and other effects are discussed. In the later part of the

chapter, conventional and unconventional design techniques (bulk-driven approach, floating-gate, dynamic threshold, etc.) to design analog integrated circuits towards ultra-low-voltage systems and applications are described. Examples of ultra-low-voltage analog ICs blocks (an operational amplifier, a voltage comparator, a charge pump, etc.) designed in a standard CMOS technology using the uncon-

**Keywords:** analog/mixed-signal IC design, unconventional design approach, bulk-driven design, ultra-low-voltage, ultra-low-power, standard nanoscale CMOS

signal ICs in modern nanotechnologies represents a real challenge for circuit designers and researches, since it introduces several limitations in numerous aspects. Firstly, since advanced nanoscale technologies offer a possibility to design analog, digital, and radio-frequency (RF) circuits as well as micro-electro-mechanical systems (MEMS) on a single chip, there is usually issue of a common value of the supply voltage. With the technology development, the value of the supply voltage is scaled down significantly. However, the threshold voltage (*VTH*) of the MOS devices is *not* lowered at the same pace. This fact reduced the voltage headroom for conventional circuit topologies (e.g., cascode structures) to operate

The design of ultra-low-voltage (ULV) and low-power (LP) analog and mixed-

ventional design approach are presented.

*Daniel Arbet, Lukas Nagy and Viera Stopjakova*

**Chapter 2**
