Acknowledgements

This work is financially supported by the Ministry of Electronics and Information Technology (MeitY), Govt. of India, under Visvesvaraya Young Faculty Fellowship of Visvesvaraya Ph.D. scheme (Grant No. PhD-MLA-4(29)/ 2015-2016) and DST-SERB project ref. file number EEQ/2016/00836, dated January 17, 2017.

Pattern Synthesis in Time-Modulated Arrays Using Heuristic Approach DOI: http://dx.doi.org/10.5772/intechopen.89479
