**Abstract**

Few-layer graphene exhibits exceptional properties that are of interest for fundamental research and technological applications. Nanostructured graphene with self-aligned domain boundaries and ripples is one of very promising materials because the boundaries can reflect electrons in a wide range of energies and host spinpolarized electronic states. In this chapter, we discuss the ultra-high vacuum synthesis of few-layer graphene on the technologically relevant semiconducting β-SiC/Si(001) wafers. Recent experimental results demonstrate the possibility of controlling the preferential domain boundary direction and the number of graphene layers in the few-layer graphene synthesized on the β-SiC/Si(001) substrates. Both these goals can be achieved utilizing vicinal silicon wafers with small miscuts from the (001) plane. This development may lead to fabricating new tunable electronic nanostructures made from graphene on β-SiC, opening up opportunities for new applications.

**Keywords:** silicon carbide, graphene, synthesis, nanodomains, ARPES, LEEM, μ-LEED, XPS, STM

## **1. Introduction**

Extensive studies of mono- and few-layer graphene films, conducted during the last two decades, have revealed unique electronic properties of these lowdimensional materials [1–7], which make them very promising for developing new nanoscale carbon-based electronic technologies [8–13]. Its unique transport properties make graphene a very attractive alternative to silicon in the traditional electronic technologies. However, for successful applications, it is necessary to develop methods of synthesizing low-cost, high-quality graphene films on insulating or semiconducting substrates of sufficiently large size.

Many methods of fabricating ultrathin graphene films have been reported. For example, graphene can be prepared using mechanical or chemical exfoliation from bulk graphite crystals [1, 3, 4, 14]. The mechanically exfoliated graphene layers demonstrate exceptional properties of two-dimensional electron gas, such as extremely high mobility of the charge carriers [15, 16]. However, the exfoliated graphene layers are hardly suitable for technological purposes. The procedures using unzipping of carbon nanotubes, reduction of graphite oxide, chemical vapor deposition, and high-temperature thermal graphitization of single-crystalline substrates were developed to fabricate large-area graphene films [1, 17–22]. To eliminate possible problems associated with the graphene film transfer from one

substrate to another, various methods have been developed for direct growing graphene on the technologically relevant non-conducting substrates [23–30].

The hexagonal silicon carbide (α-SiC) wafers are considered the most promising semiconducting substrates for technological synthesis of high-quality graphene films [31–37]. Ultrathin graphene films are usually fabricated on α-SiC using silicon atom sublimation and graphitization of the carbon-enriched surface layers at temperatures above 1000°C [31]. Epitaxial graphene layers synthesized on α-SiC in ultra-high vacuum (UHV) and argon atmosphere demonstrate 2D electronic properties [38–41], which are nearly equivalent to the properties of ultrathin graphene films mechanically exfoliated from bulk graphite crystals. The angle resolved photoelectron spectroscopy (ARPES) studies of the 11-layer graphene on 6H-SiC(000-1) revealed sharp linear dispersions at the K-points typical of monolayer graphene [42].

However, the high price and small size of the single-crystalline α-SiC wafers are not compatible with commercial applications. In order to reduce the price of SiC wafers, epitaxial growth of cubic silicon carbide (β-SiC) thin films on silicon wafers was proposed in the 1980s [43]. Using this method, β-SiC thin films with thickness of several microns could be grown on standard silicon wafers with diameters above 30 cm [44–47] that is highly appealing for direct integration into existing electronic technologies. Fabrication of ultrathin graphene films on β-SiC surfaces, using high-temperature annealing in UHV, was reported for the first time in 2009, when Miyamoto et al. succeeded in synthesizing few-layer graphene on the β-SiC/Si(011) wafers [48]. Then, a number of works demonstrating the feasibility of graphene synthesis on β-SiC/Si wafers of different orientations have been published [48–103]. Mostly, these studies have been conducted on β-SiC(111) thin films [51–61, 65–81] and single-crystalline SiC(111) wafers [62–64]. However, some studies have been carried out on β-SiC(001) [50, 61, 82–93, 101, 102] and even on polycrystalline β-SiC substrates [94]. Since Si(001) is widely used in electronic devices, few-layer graphene films synthesized on the β-SiC/Si(001) wafers can be fully compatible with the existing lithographic processing technologies.

This chapter is focused on the controllable UHV synthesis of few-layer graphene on the β-SiC thin films grown on the technologically relevant Si(001) wafers. Along with detailed atomic and electronic structure studies we present the recent results which uncover the mechanism of layer-by-layer graphene growth on β-SiC/Si(001) and pave the way to synthesize uniform few-layer graphene nanoribbons with desirable number of layers and self-aligned nanodomain boundaries on the low-cost silicon wafers.
