Electrostatic Design in CMOS

**3**

**Figure 1.**

*Atomic force microscopy image of photomask ESD damage.*

**Chapter 1**

*Steven Voldman*

**1. Introduction**

**2. Photomasks**

the future chapters in this book.

Introductory Chapter:

Electrostatic Discharge Breakdown

in Micro-gaps and Nanogenerators

As we enter the nanoelectronic era, electrostatic discharge (ESD) phenomena is still an important issue for micro-electronics and nanostructures [1–10]. This interest is the concern of the ability to manufacture nanostructures without destruction associated with static charge and ESD events. ESD issues are a concern with almost all structures with a small gap in the device. The introduction will provide examples of structures that have ESD concerns which will establish a base understanding for

Photomasks, or "masks," are used for exposing the photosensitive materials for designing components. These photomasks must be "defect free." Shapes are formed on a glass insulating surface to form the masks, where the shapes are metallic

#### **Chapter 1**

## Introductory Chapter: Electrostatic Discharge Breakdown in Micro-gaps and Nanogenerators

*Steven Voldman*

#### **1. Introduction**

As we enter the nanoelectronic era, electrostatic discharge (ESD) phenomena is still an important issue for micro-electronics and nanostructures [1–10]. This interest is the concern of the ability to manufacture nanostructures without destruction associated with static charge and ESD events. ESD issues are a concern with almost all structures with a small gap in the device. The introduction will provide examples of structures that have ESD concerns which will establish a base understanding for the future chapters in this book.

#### **2. Photomasks**

Photomasks, or "masks," are used for exposing the photosensitive materials for designing components. These photomasks must be "defect free." Shapes are formed on a glass insulating surface to form the masks, where the shapes are metallic

**Figure 1.** *Atomic force microscopy image of photomask ESD damage.*

**Figure 2.** *Atomic force microscopy image of latent photomask ESD damage.*

chrome. A key problem is the buildup of charge on the mask shapes [5]. Between each chrome shape on the mask, a potential "micro-gap" exists which can lead to electrical discharge when the electric potential exceeds the air breakdown. The law that governs the breakdown is known as Paschen's law. For gases, Paschen's law states for electrical breakdown of gases, the breakdown is a function of the product of gas pressure and gap width.

With the dimensional scaling, smaller line width, and the spacing between lines also are reduced, leading to electrostatic micro-discharges occurring between the mask shapes. **Figure 1** shows an example of an ESD discharge as a function of the spacing between two shapes on a photomask.

The mask shape damage can introduce defects in the product chip. With dimensional scaling, the spacing decreases.

**Figure 2** shows a second image of a mask damage. These "nano-defects" can also lead to defects in the product chip.

#### **3. Magnetic recording**

In the magnetic recording industry, a small thin film magneto-resistor (MR) is used [6]. To sense the magnetic field, a magneto-resistor is mounted on a "magnetic head." To continue to scale down the size of disk, the magnetic recording industry continues to evolve to new devices. The devices are MR heads, to the giant magnetoresistors (GMR) and tunneling magneto-resistor (TMR).

**Figure 3** shows damage in a MR structure. The damaged device leads to dimensional changes in the MR stripe, causing a change in series resistance of the MR stripe. Micro-breakdown can also occur between the magneto-resistor, the adjacent shields, and substrates. Along the surface, breakdown can occur leading to damage of the MR stripe and the physical surface.

With technology scaling, the size and film thickness are reduced to sense smaller signals; as a result, the human body model (HBM) ESD "robustness" is decreased from 150 and 35 to less than 10 V.

**5**

*Introductory Chapter: Electrostatic Discharge Breakdown in Micro-gaps and Nanogenerators*

In semiconductors, to pack more transistors into a smaller space and to provide higher performance, the transistor is leaving the two-dimensional wafer and becoming more three-dimensional. Today, in advanced technologies, these new devices are known as "FinFETs." The FinFET is a multi-finger structure. The MOSFET gate covers the "fin" over the parallel fin structures. The FinFET consists

Microelectromechanical systems (MEMS) are being designed for motors, generator, micro-mirrors, switches, and passive circuit elements [9, 10]. MEMs pose a new challenge due to many of these nano-elements are electrostatically actuated

In MEM structures, segments of the elements are closely spaced and inherently have micro-gaps. Electrical spark can occur in the gap leading to melting of the

In micro-motors, this issue also occurs [8]. It is noted, in micro-motors the existence of damage to the gear rotation, and "nano-welding" was observed from

For RF applications, RF MEM switches have advantages compared to conventional switches. But, broken physical elements can lead to residual materials within

Micro-mirrors have present day and future applications in the system. ESD events can lead to damage between the mirror and actuator; this can lead to

ESD damage occurs in the RF switch between the input and output [9], as well as between the actuator and the switch input and output. **Figure 4** shows an example

the air gap, influencing functional operation or electrical shorting.

of nano-channels to conduct the MOSFET current [7].

*DOI: http://dx.doi.org/10.5772/intechopen.88227*

**4. FinFET transistors**

*Magnetic recording head after ESD damage.*

elements and contain micro-gaps.

component and "stiction."

the current of the ESD event.

of the damage observed in the RF switch.

**5. MEMS**

**Figure 3.**

*Introductory Chapter: Electrostatic Discharge Breakdown in Micro-gaps and Nanogenerators DOI: http://dx.doi.org/10.5772/intechopen.88227*

**Figure 3.** *Magnetic recording head after ESD damage.*

#### **4. FinFET transistors**

In semiconductors, to pack more transistors into a smaller space and to provide higher performance, the transistor is leaving the two-dimensional wafer and becoming more three-dimensional. Today, in advanced technologies, these new devices are known as "FinFETs." The FinFET is a multi-finger structure. The MOSFET gate covers the "fin" over the parallel fin structures. The FinFET consists of nano-channels to conduct the MOSFET current [7].

#### **5. MEMS**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

chrome. A key problem is the buildup of charge on the mask shapes [5]. Between each chrome shape on the mask, a potential "micro-gap" exists which can lead to electrical discharge when the electric potential exceeds the air breakdown. The law that governs the breakdown is known as Paschen's law. For gases, Paschen's law states for electrical breakdown of gases, the breakdown is a function of the product

With the dimensional scaling, smaller line width, and the spacing between lines also are reduced, leading to electrostatic micro-discharges occurring between the mask shapes. **Figure 1** shows an example of an ESD discharge as a function of the

The mask shape damage can introduce defects in the product chip. With dimen-

**Figure 2** shows a second image of a mask damage. These "nano-defects" can also

In the magnetic recording industry, a small thin film magneto-resistor (MR) is used [6]. To sense the magnetic field, a magneto-resistor is mounted on a "magnetic head." To continue to scale down the size of disk, the magnetic recording industry continues to evolve to new devices. The devices are MR heads, to the giant magneto-

**Figure 3** shows damage in a MR structure. The damaged device leads to dimensional changes in the MR stripe, causing a change in series resistance of the MR stripe. Micro-breakdown can also occur between the magneto-resistor, the adjacent shields, and substrates. Along the surface, breakdown can occur leading to damage

With technology scaling, the size and film thickness are reduced to sense smaller signals; as a result, the human body model (HBM) ESD "robustness" is decreased

of gas pressure and gap width.

**Figure 2.**

spacing between two shapes on a photomask.

*Atomic force microscopy image of latent photomask ESD damage.*

resistors (GMR) and tunneling magneto-resistor (TMR).

of the MR stripe and the physical surface.

from 150 and 35 to less than 10 V.

sional scaling, the spacing decreases.

lead to defects in the product chip.

**3. Magnetic recording**

**4**

Microelectromechanical systems (MEMS) are being designed for motors, generator, micro-mirrors, switches, and passive circuit elements [9, 10]. MEMs pose a new challenge due to many of these nano-elements are electrostatically actuated elements and contain micro-gaps.

In MEM structures, segments of the elements are closely spaced and inherently have micro-gaps. Electrical spark can occur in the gap leading to melting of the component and "stiction."

In micro-motors, this issue also occurs [8]. It is noted, in micro-motors the existence of damage to the gear rotation, and "nano-welding" was observed from the current of the ESD event.

For RF applications, RF MEM switches have advantages compared to conventional switches. But, broken physical elements can lead to residual materials within the air gap, influencing functional operation or electrical shorting.

ESD damage occurs in the RF switch between the input and output [9], as well as between the actuator and the switch input and output. **Figure 4** shows an example of the damage observed in the RF switch.

Micro-mirrors have present day and future applications in the system. ESD events can lead to damage between the mirror and actuator; this can lead to

#### **Figure 4.**

**Figure 5.** *Micro-mirror array damage after ESD testing.*

operational issues affecting the tilt angle and rotation of the micro-mirror structures. As we move to nano-gaps and spaces, these concerns will continue to exist. **Figure 5** shows damage to the micro-mirrors after ESD testing.

#### **6. Closing comments and summary**

As nanostructures become smaller, the electrostatic sensitivity increases leading to new failure mechanisms. Electrostatically actuated devices, magnetic recording devices, photomasks, RF switches, and micromachines have air gaps which can lead to breakdown across surfaces and in the air gap.

This book will provide insight into operation and design of micro-gaps and nano-generators. It will be enlightening for engineers and scientists that have an interest in electrostatic discharge physics and design.

**7**

**Author details**

Steven Voldman LLC, New York, USA

\*Address all correspondence to: voldman@ieee.org

provided the original work is properly cited.

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/ by/3.0), which permits unrestricted use, distribution, and reproduction in any medium,

*Introductory Chapter: Electrostatic Discharge Breakdown in Micro-gaps and Nanogenerators*

*DOI: http://dx.doi.org/10.5772/intechopen.88227*

*Introductory Chapter: Electrostatic Discharge Breakdown in Micro-gaps and Nanogenerators DOI: http://dx.doi.org/10.5772/intechopen.88227*

#### **Author details**

Steven Voldman LLC, New York, USA

\*Address all correspondence to: voldman@ieee.org

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/ by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

*RF switch damage after ESD testing (with and without membrane removed).*

operational issues affecting the tilt angle and rotation of the micro-mirror structures. As we move to nano-gaps and spaces, these concerns will continue to exist.

As nanostructures become smaller, the electrostatic sensitivity increases leading to new failure mechanisms. Electrostatically actuated devices, magnetic recording devices, photomasks, RF switches, and micromachines have air gaps which can lead

This book will provide insight into operation and design of micro-gaps and nano-generators. It will be enlightening for engineers and scientists that have an

**Figure 5** shows damage to the micro-mirrors after ESD testing.

**6. Closing comments and summary**

*Micro-mirror array damage after ESD testing.*

to breakdown across surfaces and in the air gap.

interest in electrostatic discharge physics and design.

**6**

**Figure 5.**

**Figure 4.**

### **References** Chapter 2

[1] Voldman S. Lightning rods for nanoelectronics. Scientific American. 2002;**287**(4):90-97

[2] Voldman S. Electrostatic discharge protection in the nano-technology— Will we be able to provide ESD protection in the future? Invited Talk. In: Proceedings of the International Conference on Semiconductors and Integrated Circuit Technology (ICSICT); Shanghai, China; 2006

[3] Voldman S. Electrostatic discharge in nano-technology. In: Keynote Talk, Application Specific Circuits and Networks (ASICON) 2007; Guilin, China; October 12-15, 2007

[4] Voldman S. ESD: Failure Mechanisms and Models. Chichester, England: John Wiley and Sons, Ltd; 2009

[5] Montoya J, Levit L, Englisch A. A study of the mechanisms for ESD damage in reticles. In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium; 2000. pp. 394-405

[6] Chen TW, Wallash AJ, Dutton R. Ultra-fast transmission line pulse testing of tunneling and giant magnetoresistor heads. In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium; 2008. pp. 258-261

[7] Russ C, Gossner H, Schulz T, Chaudhary N, Xiong W, Marshall A, et al. ESD evaluation of emerging MUGFET technology. In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium; 2005. pp. 280-289

[8] Walraven JA, Soden JM, Cole EI, Tanner DM, Anderson RE. Human body model, machine model, and charged device model ESD testing of surface micromachined microelectromechanical systems (MEMS). In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium; 2001. pp. 238-247

Low-C ESD Protection Design

Electrostatic discharge (ESD) protection design is needed for integrated circuits in CMOS technology. The choice for ESD protection devices in the CMOS technology includes diode, MOSFET, and silicon controlled rectifier (SCR). These ESD protection devices cause signal losses at high-frequency input/output (I/O) pads due to the parasitic capacitance. To minimize the impacts from ESD protection circuit on high-frequency performances, ESD protection circuit at I/O pads must be carefully designed. A review on ESD protection designs with low parasitic capacitance for high-frequency applications in CMOS technology is presented in this chapter. With the reduced parasitic capacitance, ESD protection circuit can be easily combined or co-designed with high-frequency circuits. As the operating frequencies of high-frequency circuits increase, on-chip ESD protection designs for

high-frequency applications will continuously be an important design task.

Keywords: CMOS, ESD protection, high frequency, high speed, low capacitance

The integrated circuits (ICs) operated at higher frequency are needed. For example, the transceivers operated in gigahertz (GHz) bands are the good candidate for the demand of faster data transmission [1]. CMOS technology is a promising way to implement the GHz integrated circuits with the advantages of high integration capability and low cost for mass production [2, 3]. However, the transistors in CMOS and even FinFET technologies are inherently susceptible to the electrostatic discharge (ESD) events [4, 5]. Once any transistor is damaged by ESD, it cannot be recovered, and the IC functionality will be lost. Therefore, the ESD protection design must be equipped on the chip. Nevertheless, the ESD protection devices cause the IC performance degradation. The ICs operated in GHz frequencies are very sensitive to the parasitic capacitance [6, 7]. To mitigate the performance degradation caused by ESD protection device, the low-capacitance (low-C)

To adequately protect the ICs, the ESD protection circuit must shunt ESD current with limited voltage drop [10–12]. Figure 1 shows the ESD design window of an IC, which is defined by the power-supply voltage (VDD and VSS) and the

in CMOS Technology

Chun-Yu Lin

1. Introduction

ESD protection designs are needed [8, 9].

2. ESD protection requirement

9

Abstract

[9] Tazzoli A, Peretti V, Zanoni E, Meneghesso G. Transmission line pulse (TLP) testing of radio frequency (RF) micro-machined microelectromechanical systems (MEMS). In: Proceedings of the Electrical Overstress/ Electrostatic Discharge (EOS/ESD) Symposium; 2006. pp. 295-303

[10] Sangameswaran S, De Coster J, Linten D, Scholz M, Thijs S, Haspeslagh L, et al. ESD reliability issues in microelectromechanical systems (MEMS): A case study of micromirrors. In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium; 2008. pp. 249-257

#### **References** Chapter 2

## Low-C ESD Protection Design in CMOS Technology

Chun-Yu Lin

#### Abstract

Electrostatic discharge (ESD) protection design is needed for integrated circuits in CMOS technology. The choice for ESD protection devices in the CMOS technology includes diode, MOSFET, and silicon controlled rectifier (SCR). These ESD protection devices cause signal losses at high-frequency input/output (I/O) pads due to the parasitic capacitance. To minimize the impacts from ESD protection circuit on high-frequency performances, ESD protection circuit at I/O pads must be carefully designed. A review on ESD protection designs with low parasitic capacitance for high-frequency applications in CMOS technology is presented in this chapter. With the reduced parasitic capacitance, ESD protection circuit can be easily combined or co-designed with high-frequency circuits. As the operating frequencies of high-frequency circuits increase, on-chip ESD protection designs for high-frequency applications will continuously be an important design task.

Keywords: CMOS, ESD protection, high frequency, high speed, low capacitance

#### 1. Introduction

The integrated circuits (ICs) operated at higher frequency are needed. For example, the transceivers operated in gigahertz (GHz) bands are the good candidate for the demand of faster data transmission [1]. CMOS technology is a promising way to implement the GHz integrated circuits with the advantages of high integration capability and low cost for mass production [2, 3]. However, the transistors in CMOS and even FinFET technologies are inherently susceptible to the electrostatic discharge (ESD) events [4, 5]. Once any transistor is damaged by ESD, it cannot be recovered, and the IC functionality will be lost. Therefore, the ESD protection design must be equipped on the chip. Nevertheless, the ESD protection devices cause the IC performance degradation. The ICs operated in GHz frequencies are very sensitive to the parasitic capacitance [6, 7]. To mitigate the performance degradation caused by ESD protection device, the low-capacitance (low-C) ESD protection designs are needed [8, 9].

#### 2. ESD protection requirement

To adequately protect the ICs, the ESD protection circuit must shunt ESD current with limited voltage drop [10–12]. Figure 1 shows the ESD design window of an IC, which is defined by the power-supply voltage (VDD and VSS) and the

**8**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

systems (MEMS). In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium;

[9] Tazzoli A, Peretti V, Zanoni E, Meneghesso G. Transmission line pulse (TLP) testing of radio frequency

electromechanical systems (MEMS). In: Proceedings of the Electrical Overstress/ Electrostatic Discharge (EOS/ESD) Symposium; 2006. pp. 295-303

[10] Sangameswaran S, De Coster J, Linten D, Scholz M, Thijs S, Haspeslagh

L, et al. ESD reliability issues in microelectromechanical systems (MEMS): A case study of micromirrors.

In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium; 2008.

pp. 249-257

(RF) micro-machined micro-

2001. pp. 238-247

[1] Voldman S. Lightning rods for nanoelectronics. Scientific American.

[2] Voldman S. Electrostatic discharge protection in the nano-technology— Will we be able to provide ESD protection in the future? Invited Talk. In: Proceedings of the International Conference on Semiconductors and Integrated Circuit Technology (ICSICT); Shanghai, China; 2006

[3] Voldman S. Electrostatic discharge in nano-technology. In: Keynote Talk, Application Specific Circuits and Networks (ASICON) 2007; Guilin,

[4] Voldman S. ESD: Failure Mechanisms and Models. Chichester, England: John

[5] Montoya J, Levit L, Englisch A. A study of the mechanisms for ESD damage in reticles. In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium;

[6] Chen TW, Wallash AJ, Dutton R. Ultra-fast transmission line pulse testing of tunneling and giant

magnetoresistor heads. In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium;

[7] Russ C, Gossner H, Schulz T, Chaudhary N, Xiong W, Marshall A, et al. ESD evaluation of emerging MUGFET technology. In: Proceedings of the Electrical Overstress/Electrostatic Discharge (EOS/ESD) Symposium;

[8] Walraven JA, Soden JM, Cole EI, Tanner DM, Anderson RE. Human body model, machine model, and charged device model ESD testing of surface micromachined microelectromechanical

China; October 12-15, 2007

Wiley and Sons, Ltd; 2009

2000. pp. 394-405

2008. pp. 258-261

2005. pp. 280-289

2002;**287**(4):90-97

breakdown voltage (VBD) of internal circuit. First, the internal circuit normally operates between VDD and VSS, and the ESD protection circuit cannot turn on in this normal circuit operation region. Second, the internal circuit causes failure beyond the positive or negative VBD, so the ESD protection circuit becomes invalid in this internal circuit failure region. Besides, it usually reserves some safety margin. Therefore, the ESD protection circuit must shunt ESD current with the voltage within ESD design window as shown in Figure 1. As ESD stresses at the I/O pad, the ESD protection circuit turns on at its trigger voltage (Vt1) and clamps to the holding voltage (Vh). The turn-on resistance (Ron) should be minimized to reduce the joule heat generated in the ESD protection circuit and enhance the current-handling

A typical method to enhance the current-handling ability is to widen the ESD device dimension; however, the large ESD protection device has too large parasitic capacitance to be tolerable for the high-frequency ICs. As shown in Figure 2(a), the parasitic capacitances seen at the input and output (I/O) pads cause signal loss to ground. The parasitic capacitances come from not only the ESD protection circuits but also the pads and the metal connections [13, 14]. If the parasitic capacitance increases, the signal loss dramatically increases at high frequency, as shown in Figure 2(b). To mitigate the performance degradation caused by the parasitic capacitance, the ESD protection circuit must carefully design. For example, a typical specification for the

parasitic capacitance of input terminal of a gigahertz IC is 200fF [15].

types of ESD protection schemes are introduced in this chapter.

ESD protection device and the power-rail ESD clamp circuit.

At an I/O pad of IC, it may be stressed by positive or negative ESD with grounded VDD or VSS. A whole-chip ESD protection design must provide the ESD current paths of all possible combinations, including the positive I/O-to-VDD (PD), positive I/O-to-VSS (PS), negative I/O-to-VDD (ND), and negative I/O-to-VSS (NS) [16]. Since the common ESD protection devices in CMOS technologies include diode, MOSFET, and silicon controlled rectifier (SCR), they are used to implement the ESD protection circuits [17]. To achieve the whole-chip ESD protection, three

Type I ESD protection circuit uses one bidirectional ESD protection device between I/O pad and VSS and one bidirectional power-rail ESD clamp circuit between VDD and VSS, as shown in Figure 3(a). The bidirectional ESD protection device could be an NMOS or SCR device. Both PS and NS ESD currents can be discharged through the ESD protection device. Besides, PD and ND ESD currents can be discharged through the ESD protection device and the power-rail ESD clamp circuit.

Type II ESD protection circuit uses two unidirectional ESD protection devices from I/O pad to VDD and from VSS to I/O pad, respectively, and one bidirectional power-rail ESD clamp circuit between VDD and VSS, as shown in Figure 3(b). The unidirectional ESD protection device was a diode. Both PD and NS ESD currents can be discharged through one unidirectional ESD protection device. For the PS and ND ESD currents, they can be discharged through one ESD protection device and

Type III ESD protection circuit uses a two-branched ESD protection device and an unidirectional ESD protection device between I/O pad and VSS and one bidirectional power-rail ESD clamp circuit between VDD and VSS, as shown in Figure 3(c). The two-branched ESD protection device was usually an SCR device. The PS and PD ESD currents can be discharged through the two-branched ESD protection device, and NS and ND ESD currents can be discharged through the unidirectional

ability, that is the secondary breakdown current (It2).

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

3. ESD protection strategy

the power-rail ESD clamp circuit.

11

Figure 1. ESD design window.

Figure 2. (a) Parasitic capacitances seen at I/O pads cause signal loss to ground and (b) Simulated loss of parasitic capacitances.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

breakdown voltage (VBD) of internal circuit. First, the internal circuit normally operates between VDD and VSS, and the ESD protection circuit cannot turn on in this normal circuit operation region. Second, the internal circuit causes failure beyond the positive or negative VBD, so the ESD protection circuit becomes invalid in this internal circuit failure region. Besides, it usually reserves some safety margin. Therefore, the ESD protection circuit must shunt ESD current with the voltage within ESD design window as shown in Figure 1. As ESD stresses at the I/O pad, the ESD protection circuit turns on at its trigger voltage (Vt1) and clamps to the holding voltage (Vh). The turn-on resistance (Ron) should be minimized to reduce the joule heat generated in the ESD protection circuit and enhance the current-handling ability, that is the secondary breakdown current (It2).

A typical method to enhance the current-handling ability is to widen the ESD device dimension; however, the large ESD protection device has too large parasitic capacitance to be tolerable for the high-frequency ICs. As shown in Figure 2(a), the parasitic capacitances seen at the input and output (I/O) pads cause signal loss to ground. The parasitic capacitances come from not only the ESD protection circuits but also the pads and the metal connections [13, 14]. If the parasitic capacitance increases, the signal loss dramatically increases at high frequency, as shown in Figure 2(b). To mitigate the performance degradation caused by the parasitic capacitance, the ESD protection circuit must carefully design. For example, a typical specification for the parasitic capacitance of input terminal of a gigahertz IC is 200fF [15].

#### 3. ESD protection strategy

Figure 1. ESD design window.

Figure 2.

10

capacitances.

(a) Parasitic capacitances seen at I/O pads cause signal loss to ground and (b) Simulated loss of parasitic

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

At an I/O pad of IC, it may be stressed by positive or negative ESD with grounded VDD or VSS. A whole-chip ESD protection design must provide the ESD current paths of all possible combinations, including the positive I/O-to-VDD (PD), positive I/O-to-VSS (PS), negative I/O-to-VDD (ND), and negative I/O-to-VSS (NS) [16]. Since the common ESD protection devices in CMOS technologies include diode, MOSFET, and silicon controlled rectifier (SCR), they are used to implement the ESD protection circuits [17]. To achieve the whole-chip ESD protection, three types of ESD protection schemes are introduced in this chapter.

Type I ESD protection circuit uses one bidirectional ESD protection device between I/O pad and VSS and one bidirectional power-rail ESD clamp circuit between VDD and VSS, as shown in Figure 3(a). The bidirectional ESD protection device could be an NMOS or SCR device. Both PS and NS ESD currents can be discharged through the ESD protection device. Besides, PD and ND ESD currents can be discharged through the ESD protection device and the power-rail ESD clamp circuit.

Type II ESD protection circuit uses two unidirectional ESD protection devices from I/O pad to VDD and from VSS to I/O pad, respectively, and one bidirectional power-rail ESD clamp circuit between VDD and VSS, as shown in Figure 3(b). The unidirectional ESD protection device was a diode. Both PD and NS ESD currents can be discharged through one unidirectional ESD protection device. For the PS and ND ESD currents, they can be discharged through one ESD protection device and the power-rail ESD clamp circuit.

Type III ESD protection circuit uses a two-branched ESD protection device and an unidirectional ESD protection device between I/O pad and VSS and one bidirectional power-rail ESD clamp circuit between VDD and VSS, as shown in Figure 3(c). The two-branched ESD protection device was usually an SCR device. The PS and PD ESD currents can be discharged through the two-branched ESD protection device, and NS and ND ESD currents can be discharged through the unidirectional ESD protection device and the power-rail ESD clamp circuit.

The GGNMOS turns on as the positive voltage excursions above the trigger voltage (Vt1). Figure 5 shows the positive I-V curve of a GGNMOS in 0.18 μm CMOS technology, which is measured by a transmission-line-pulsing (TLP) system. The TLP system with a 10 ns rise time and a 100 ns pulse width is used to investigate the turn-on behavior and the I-V characteristics in high-current regions of the test devices [20]. The trigger voltage (Vt1), holding voltage (Vh), and secondary breakdown current (It2) of test devices in the time domain of HBM ESD event can be extracted from the TLP-measured I-V curves. This GGMOS triggers on at 5.6 V, snapbacks to 4.0 V, and discharges ESD current until 1.1A. The GGNMOS with the help of parasitic junction diode turns on as the I/O voltage excursions below

TLP-measured I-V curve of a GGNMOS (W = 120 μm) in 0.18 μm CMOS technology.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

The GGNMOS is generally drawn in the multi-finger structure with central drain to save total layout area [21]. Figure 4(b) shows the device cross-sectional view of a single-finger GGNMOS. The multi-finger structure can be realized by combining such single-finger structures with sharing drain and source regions between every two adjacent fingers. For the high-frequency applications, the parasitic capacitance of GGNMOS has to be considered. For a given drain width (Wn) and length (Ln), the total capacitance of a GGNMOS (Cn) is given by the draingate overlap capacitance (Coverlap), the N+/P-well bottom junction capacitance

All the parasitic capacitance (Coverlap, Cj, and Cjsw) are given by the process. Besides the drain width, the Ln strongly affects the total capacitance. For highfrequency applications, the Ln needs to be optimized by reducing the contact rows, the enclosure of contacts, and the extension of silicide [22, 23]. Also the extension of silicide on drain side increases the ESD robustness of GGNMOS, it implies a larger junction area and thus induces additional parasitic capacitance of the N+/P-well bottom junction. Therefore, a trade-off between the ESD robustness and the parasitic capacitance has to be found. A possible solution to reduce the bottom capacitance with the given Ln is to use an N-well implant below the N+ drain, as shown in Figure 4(c). Most of the bottom N+/P-well capacitance is then replaced by an Nwell/P-well sidewall capacitance and N-well/P-substrate bottom capacitance.

Instead of GGNMOS, gate-coupled NMOS and substrate-coupled NMOS have also been used as ESD protection circuit [24]. However, the parasitic capacitance of

(Cj), and the N+/P-well sidewall capacitance (Cjsw), according to the

the VSS voltage.

Figure 5.

following equation:

13

Figure 3. ESD protection schemes: (a) type I, (b) type II, and (c) type III.

All the ESD protection devices at I/O pad should be shrunk to lower the parasitic capacitance, while the power-rail ESD clamp circuit could be as large as possible. The large-sized power-rail ESD clamp circuit can help to reduce Ron during ESD current discharging, but it will not cause the parasitic capacitance to the I/O pad.

#### 4. ESD protection circuit design: Type I

A common ESD protection circuit used in CMOS technology is the groundedgate NMOS (GGNMOS), as shown in Figure 4(a) [18, 19]. In this ESD protection circuit, the NMOS's gate is grounded to keep it off during normal circuit operation.

#### Figure 4.

(a) ESD protection circuit with GGNMOS. Device cross-sectional view of (b) GGNMOS and (c) GGNMOS with additional N-well.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

The GGNMOS turns on as the positive voltage excursions above the trigger voltage (Vt1). Figure 5 shows the positive I-V curve of a GGNMOS in 0.18 μm CMOS technology, which is measured by a transmission-line-pulsing (TLP) system. The TLP system with a 10 ns rise time and a 100 ns pulse width is used to investigate the turn-on behavior and the I-V characteristics in high-current regions of the test devices [20]. The trigger voltage (Vt1), holding voltage (Vh), and secondary breakdown current (It2) of test devices in the time domain of HBM ESD event can be extracted from the TLP-measured I-V curves. This GGMOS triggers on at 5.6 V, snapbacks to 4.0 V, and discharges ESD current until 1.1A. The GGNMOS with the help of parasitic junction diode turns on as the I/O voltage excursions below the VSS voltage.

The GGNMOS is generally drawn in the multi-finger structure with central drain to save total layout area [21]. Figure 4(b) shows the device cross-sectional view of a single-finger GGNMOS. The multi-finger structure can be realized by combining such single-finger structures with sharing drain and source regions between every two adjacent fingers. For the high-frequency applications, the parasitic capacitance of GGNMOS has to be considered. For a given drain width (Wn) and length (Ln), the total capacitance of a GGNMOS (Cn) is given by the draingate overlap capacitance (Coverlap), the N+/P-well bottom junction capacitance (Cj), and the N+/P-well sidewall capacitance (Cjsw), according to the following equation:

$$\mathbb{C}\_n = \mathbb{C}\_{overlap} \times W\_n + \mathbb{C}\_j \times W\_n \times L\_n + \mathbb{C}\_{j \text{sw}} \times 2 \times (W\_n + L\_n)$$

All the parasitic capacitance (Coverlap, Cj, and Cjsw) are given by the process. Besides the drain width, the Ln strongly affects the total capacitance. For highfrequency applications, the Ln needs to be optimized by reducing the contact rows, the enclosure of contacts, and the extension of silicide [22, 23]. Also the extension of silicide on drain side increases the ESD robustness of GGNMOS, it implies a larger junction area and thus induces additional parasitic capacitance of the N+/P-well bottom junction. Therefore, a trade-off between the ESD robustness and the parasitic capacitance has to be found. A possible solution to reduce the bottom capacitance with the given Ln is to use an N-well implant below the N+ drain, as shown in Figure 4(c). Most of the bottom N+/P-well capacitance is then replaced by an Nwell/P-well sidewall capacitance and N-well/P-substrate bottom capacitance.

Instead of GGNMOS, gate-coupled NMOS and substrate-coupled NMOS have also been used as ESD protection circuit [24]. However, the parasitic capacitance of

All the ESD protection devices at I/O pad should be shrunk to lower the parasitic capacitance, while the power-rail ESD clamp circuit could be as large as possible. The large-sized power-rail ESD clamp circuit can help to reduce Ron during ESD current discharging, but it will not cause the parasitic capacitance to the I/O pad.

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

A common ESD protection circuit used in CMOS technology is the groundedgate NMOS (GGNMOS), as shown in Figure 4(a) [18, 19]. In this ESD protection circuit, the NMOS's gate is grounded to keep it off during normal circuit operation.

(a) ESD protection circuit with GGNMOS. Device cross-sectional view of (b) GGNMOS and (c) GGNMOS

4. ESD protection circuit design: Type I

ESD protection schemes: (a) type I, (b) type II, and (c) type III.

Figure 4.

12

Figure 3.

with additional N-well.

MOS-based ESD protection device is usually too large to be tolerable for the highfrequency circuits.

An alternative ESD protection device used in Type I ESD protection circuit is a silicon controlled rectifier (SCR) [25]. The SCR device has been reported to be useful for ESD protection in high-frequency circuits due to its higher ESD robustness within a smaller layout area and lower parasitic capacitance [22]. Besides, the SCR device can be safely used without latchup danger in advanced CMOS technologies with low supply voltage [26]. The equivalent circuit of the SCR consists of a PNP BJT and an NPN BJT, as shown in Figure 6(a). As ESD zapping from I/O to VSS, the positive-feedback regenerative mechanism of PNP and NPN results in the SCR device highly conductive to make SCR very robust against ESD stresses. The device structure of the SCR device is illustrated in Figure 6(b). The I/O pad is connected to the first P+ and the pickup N+, which is formed in the N-well. The VSS pad is connected to the second N+ and the pickup P+, which are formed in the nearby P-well. The SCR path between I/O and VSS consists of P+, N-well, P-well, and N+. Besides, the parasitic diode path from VSS to I/O consists of P-well and Nwell. The SCR with the help of P-well/N-well junction diode turns on as the I/O voltage excursions below the VSS voltage.

Figure 7 shows the TLP-measured positive I-V curve of an SCR in 0.18 μm CMOS technology. This SCR triggers on at 16.7 V, snapbacks to 2.1 V, and discharges ESD current until 9.5A. The main drawback of SCR device is the higher trigger voltage and thus the slower turn-on speed. Research works have demonstrated that separation of the N-well and P-well junction can play an important role. The typical SCR device uses the shallow trench isolation (STI) to separate the Nwell and P-well. To reduce the trigger voltage of an SCR device, a gate-bounded SCR has been reported, as shown in Figure 6(c) [27].

Another alternative method to reduce the trigger voltage of an SCR device uses

Recently, an inductor-assisted diode-triggered SCR (LASCR) has been presented to further reduce the parasitic capacitance [31]. As shown in Figure 9, the LASCR consists of an SCR, an inductor, and a diode string. The ESD current path from I/O to VSS consists of P+/N-well/P-well/N+ SCR. The diode string drawn the trigger current from the N-well (base of PNP) to VSS is used to enhance the turn-on efficiency of SCR. As the I/O voltage excursions below the VSS voltage, the ESD

Under normal circuit operating condition, the inductor can resonate with

the parasitic capacitance, and hence the signal loss can be compensated.

the substrate-triggered technique. The trigger signal can be sent into the base terminal of PNP or NPN to enhance the turn-on speed. Some circuit design techniques are reported to enhance the turn-on efficiency of SCR devices, such as the gate-coupled, substrate-triggered, diode-triggered, and gate-grounded-NMOStriggered (GGNMOS-triggered) techniques [28–30]. Figure 8(a) shows the schematic of a GGNMOS-triggered SCR device, and Figure 8(b) shows its device crosssectional view. The GGNMOS is connected between the second N+ in the N-well and VSS. The trigger current is drawn from the N-well (base of PNP) to VSS through the GGNMOS. Similarly, the trigger device can be connected between I/O pad and the base and NPN, but the trigger device will also add the parasitic capacitance to I/O. A diode string could also be used as the trigger device, and its parasitic

(a) ESD protection circuit with GGNMOS-triggered SCR and (b) device cross-sectional view of

TLP-measured I-V curve of an SCR (W = 120 μm) in 0.18 μm CMOS technology.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

capacitance is lower than the GGNMOS.

Figure 7.

Figure 8.

15

GGNMOS-triggered SCR.

current path consists of P-well/N-well diode and inductor.

Figure 6.

(a) ESD protection circuit with SCR. Device cross-sectional view of (b) STI-bounded SCR and (c) gate-bounded SCR.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

Figure 7. TLP-measured I-V curve of an SCR (W = 120 μm) in 0.18 μm CMOS technology.

#### Figure 8.

MOS-based ESD protection device is usually too large to be tolerable for the high-

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

Figure 7 shows the TLP-measured positive I-V curve of an SCR in 0.18 μm CMOS technology. This SCR triggers on at 16.7 V, snapbacks to 2.1 V, and

discharges ESD current until 9.5A. The main drawback of SCR device is the higher trigger voltage and thus the slower turn-on speed. Research works have demonstrated that separation of the N-well and P-well junction can play an important role. The typical SCR device uses the shallow trench isolation (STI) to separate the Nwell and P-well. To reduce the trigger voltage of an SCR device, a gate-bounded

(a) ESD protection circuit with SCR. Device cross-sectional view of (b) STI-bounded SCR and

An alternative ESD protection device used in Type I ESD protection circuit is a silicon controlled rectifier (SCR) [25]. The SCR device has been reported to be useful for ESD protection in high-frequency circuits due to its higher ESD robustness within a smaller layout area and lower parasitic capacitance [22]. Besides, the SCR device can be safely used without latchup danger in advanced CMOS technologies with low supply voltage [26]. The equivalent circuit of the SCR consists of a PNP BJT and an NPN BJT, as shown in Figure 6(a). As ESD zapping from I/O to VSS, the positive-feedback regenerative mechanism of PNP and NPN results in the SCR device highly conductive to make SCR very robust against ESD stresses. The device structure of the SCR device is illustrated in Figure 6(b). The I/O pad is connected to the first P+ and the pickup N+, which is formed in the N-well. The VSS pad is connected to the second N+ and the pickup P+, which are formed in the nearby P-well. The SCR path between I/O and VSS consists of P+, N-well, P-well, and N+. Besides, the parasitic diode path from VSS to I/O consists of P-well and Nwell. The SCR with the help of P-well/N-well junction diode turns on as the I/O

frequency circuits.

Figure 6.

14

(c) gate-bounded SCR.

voltage excursions below the VSS voltage.

SCR has been reported, as shown in Figure 6(c) [27].

(a) ESD protection circuit with GGNMOS-triggered SCR and (b) device cross-sectional view of GGNMOS-triggered SCR.

Another alternative method to reduce the trigger voltage of an SCR device uses the substrate-triggered technique. The trigger signal can be sent into the base terminal of PNP or NPN to enhance the turn-on speed. Some circuit design techniques are reported to enhance the turn-on efficiency of SCR devices, such as the gate-coupled, substrate-triggered, diode-triggered, and gate-grounded-NMOStriggered (GGNMOS-triggered) techniques [28–30]. Figure 8(a) shows the schematic of a GGNMOS-triggered SCR device, and Figure 8(b) shows its device crosssectional view. The GGNMOS is connected between the second N+ in the N-well and VSS. The trigger current is drawn from the N-well (base of PNP) to VSS through the GGNMOS. Similarly, the trigger device can be connected between I/O pad and the base and NPN, but the trigger device will also add the parasitic capacitance to I/O. A diode string could also be used as the trigger device, and its parasitic capacitance is lower than the GGNMOS.

Recently, an inductor-assisted diode-triggered SCR (LASCR) has been presented to further reduce the parasitic capacitance [31]. As shown in Figure 9, the LASCR consists of an SCR, an inductor, and a diode string. The ESD current path from I/O to VSS consists of P+/N-well/P-well/N+ SCR. The diode string drawn the trigger current from the N-well (base of PNP) to VSS is used to enhance the turn-on efficiency of SCR. As the I/O voltage excursions below the VSS voltage, the ESD current path consists of P-well/N-well diode and inductor.

Under normal circuit operating condition, the inductor can resonate with the parasitic capacitance, and hence the signal loss can be compensated.

devices is shown in Figure 10(b). The LASCR devices exhibit sufficiently low loss even if the frequency is up to 30GHz. Therefore, LASCR can be a good solution for

Diode is a typical ESD protection device with unidirectional discharging path [32, 33]. A dual-diode ESD protection circuit for high-frequency applications is shown in Figure 11(a), where two ESD diodes at I/O pad are cooperated with the turn-on efficient power-rail ESD clamp circuit to discharge ESD current in the

In the CMOS process, the choice for ESD protection diodes includes P+/Nwell, N+/P-well, and N-well/P-well diodes. The P+/N-well diode, as shown in Figure 11(b), is used between I/O pad and VDD. For the N-well/P-well diode, it may occupy larger layout area than the N+/P-well diode. Thus, the N+/P-well diode, as

The typical diodes use the STI to separate the PN junctions. Besides the STI-bounded diodes, the gate-bounded diodes have been reported, as shown in Figure 11(d) and (e). The gate-bounded diodes were introduced by Voldman

In order to reduce the parasitic capacitance or provide the large signal-swing tolerance, the ESD protection diodes in stacked configuration have been presented [36, 37], as shown in Figure 12(a). The device cross-sectional views of the conventional stacked diodes are shown in Figure 12(b) and (c). Two P+/N-well diodes (stacked P diodes) can apply to I/O-to-VDD, and two N+/P-well diodes (stacked N diodes) can apply to VSS-to-I/O, as shown in Figure 12(b) and (c), respectively. With the stacked diodes, the junction capacitances are connected in series, and the

(a) ESD protection circuit with diodes. Device cross-sectional view of (b) STI-bounded P+/N-well diode, (c) STI-bounded N+/P-well diode, (d) gate-bounded P+/N-well diode, and (e) gate-bounded

in order to improve the ESD robustness of STI bounded diodes [35].

ESD protection of high-speed applications.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

forward-biased condition [13, 34].

Figure 11.

17

N+/P-well diode.

5. ESD protection circuit design: Type II

shown in Figure 11(c), is used between VSS and I/O pad.

Figure 9. (a) ESD protection circuit with LASCR and (b) device cross-sectional view of LASCR.

Once the dimension of SCR has been chosen, the inductance (L) can be designed to minimize the high-frequency performance degradation by using the following equation:

$$L = \frac{1}{\mathbb{C}\_{P+/N-well} \times (2\pi f\_o)^2}$$

where CP+/N-well is the parasitic capacitance of P+/N-well junction, and fo is the operating frequency. For example, the dimension of SCR is selected to be 30 μm, and the CP+/N-well in a 0.18 μm CMOS process is 60fF around 30GHz. Therefore, the required L for 30GHz applications is 460pH.

Figure 10(a) shows the TLP-measured I-V curves of LASCR with 3 and 5 diodes in diode string (LASCR\_3D and LASCR\_5D) in a 0.18 μm CMOS process. The LASCR\_3D triggers on at 5.2 V, snapbacks to 2.9 V, and discharges ESD current until 2.4A, while LASCR\_5D triggers on at 7.6 V, snapbacks to 2.9 V, and discharges ESD current until 2.1A. The trigger voltage can be adjusted by adding or reducing the diode numbers. The holding voltage of both LASCR devices exceed VDD (1.8 V in the given CMOS process), which is safe from latchup event.

The signal losses of both LASCR devices are measured through the on-wafer two-port measurement. The measured loss versus frequencies of both LASCR

(a) TLP-measured I-V curves and (b) loss of LASCR (W = 30 μm) with 3 and 5 trigger diodes in 0.18 μm CMOS technology.

devices is shown in Figure 10(b). The LASCR devices exhibit sufficiently low loss even if the frequency is up to 30GHz. Therefore, LASCR can be a good solution for ESD protection of high-speed applications.

#### 5. ESD protection circuit design: Type II

Diode is a typical ESD protection device with unidirectional discharging path [32, 33]. A dual-diode ESD protection circuit for high-frequency applications is shown in Figure 11(a), where two ESD diodes at I/O pad are cooperated with the turn-on efficient power-rail ESD clamp circuit to discharge ESD current in the forward-biased condition [13, 34].

In the CMOS process, the choice for ESD protection diodes includes P+/Nwell, N+/P-well, and N-well/P-well diodes. The P+/N-well diode, as shown in Figure 11(b), is used between I/O pad and VDD. For the N-well/P-well diode, it may occupy larger layout area than the N+/P-well diode. Thus, the N+/P-well diode, as shown in Figure 11(c), is used between VSS and I/O pad.

The typical diodes use the STI to separate the PN junctions. Besides the STI-bounded diodes, the gate-bounded diodes have been reported, as shown in Figure 11(d) and (e). The gate-bounded diodes were introduced by Voldman in order to improve the ESD robustness of STI bounded diodes [35].

In order to reduce the parasitic capacitance or provide the large signal-swing tolerance, the ESD protection diodes in stacked configuration have been presented [36, 37], as shown in Figure 12(a). The device cross-sectional views of the conventional stacked diodes are shown in Figure 12(b) and (c). Two P+/N-well diodes (stacked P diodes) can apply to I/O-to-VDD, and two N+/P-well diodes (stacked N diodes) can apply to VSS-to-I/O, as shown in Figure 12(b) and (c), respectively. With the stacked diodes, the junction capacitances are connected in series, and the

#### Figure 11.

(a) ESD protection circuit with diodes. Device cross-sectional view of (b) STI-bounded P+/N-well diode, (c) STI-bounded N+/P-well diode, (d) gate-bounded P+/N-well diode, and (e) gate-bounded N+/P-well diode.

Once the dimension of SCR has been chosen, the inductance (L) can be designed to

where CP+/N-well is the parasitic capacitance of P+/N-well junction, and fo is the operating frequency. For example, the dimension of SCR is selected to be 30 μm, and the CP+/N-well in a 0.18 μm CMOS process is 60fF around 30GHz. Therefore,

Figure 10(a) shows the TLP-measured I-V curves of LASCR with 3 and 5 diodes

The signal losses of both LASCR devices are measured through the on-wafer two-port measurement. The measured loss versus frequencies of both LASCR

(a) TLP-measured I-V curves and (b) loss of LASCR (W = 30 μm) with 3 and 5 trigger diodes in 0.18 μm

in diode string (LASCR\_3D and LASCR\_5D) in a 0.18 μm CMOS process. The LASCR\_3D triggers on at 5.2 V, snapbacks to 2.9 V, and discharges ESD current until 2.4A, while LASCR\_5D triggers on at 7.6 V, snapbacks to 2.9 V, and discharges ESD current until 2.1A. The trigger voltage can be adjusted by adding or reducing the diode numbers. The holding voltage of both LASCR devices exceed VDD (1.8 V

in the given CMOS process), which is safe from latchup event.

minimize the high-frequency performance degradation by using the

(a) ESD protection circuit with LASCR and (b) device cross-sectional view of LASCR.

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

the required L for 30GHz applications is 460pH.

following equation:

Figure 9.

Figure 10.

16

CMOS technology.

Figure 12.

ESD protection circuit with stacked diodes. (a) ESD protection circuit with stacked diodes. Device cross-sectional view of (b) stacked P+/N-well diode and (c) stacked N+/P-well diode.

overall parasitic capacitance becomes smaller. However, the stacked configuration is adverse to ESD protection because the overall turn-on resistance and the clamping voltage of the stacked diodes during ESD stresses are increased as well.

For effective ESD protection, the stacked diodes with embedded SCR (SDSCR) have been presented [38, 39]. The SCR device has been reported to be useful for ESD protection with low turn-on resistance, low parasitic effects, and high ESD robustness. The stacked diodes with embedded SCR are illustrated in Figure 13. In this design, a P+/N-well diode and an N+/P-well diode are stacked, and a P+/Nwell/P-well/N+ SCR is embedded to form the ESD current path. A deep N-well structure is used to isolate the P-well region from the common P-substrate, so the SDSCR can apply to I/O-to-VDD or VSS-to-I/O. In the beginning of ESD stress, the initial current will be discharged through the stacked diodes, and then the primary current will be discharged through the embedded SCR. The stacked diodes also play the role of trigger circuit of SCR, because the current drawn from N-well and

injected into P-well can also trigger the PNP and the NPN of SCR. Figure 14 shows the TLP-measured I-V curves of P+/N-well diode (DP), stacked P+/N-well diodes (SDP), and stacked diodes with embedded SCR (SDSCR) in a 0.18 μm CMOS process. We can find that turn-on resistance or the clamping voltage of single diode is much lower than that of the stacked diodes. The embedded SCR can help to slightly reduce the turn-on resistance and the clamping voltage of the stacked diodes. In fact, some layout skills can be used to further improve the turn-on

(a) ESD protection circuit with RTSCR. (b) device cross-sectional view and (c) simplified model of RTSCR.

TLP-measured I-V curves of DP, SDP, and SDSCR (W = 20 μm) in 0.18 μm CMOS technology.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

Recently, a similar structure of the stacked diodes with embedded SCR, where a resistor uses to separate two diodes, has been reported [41]. The resistor acts as the trigger element of SCR, so the device is named resistor-triggered SCR (RTSCR). Figure 15(a) and (b) shows the schematic and the device cross-sectional view of RTSCR. The resistor can also reduce the parasitic capacitance of the ESD protection

efficient of the stacked diodes with embedded SCR [40].

Figure 14.

Figure 15.

19

Figure 13. (a) ESD protection circuit with SDSCR and (b) device cross-sectional view of SDSCR.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

Figure 14. TLP-measured I-V curves of DP, SDP, and SDSCR (W = 20 μm) in 0.18 μm CMOS technology.

Figure 15. (a) ESD protection circuit with RTSCR. (b) device cross-sectional view and (c) simplified model of RTSCR.

injected into P-well can also trigger the PNP and the NPN of SCR. Figure 14 shows the TLP-measured I-V curves of P+/N-well diode (DP), stacked P+/N-well diodes (SDP), and stacked diodes with embedded SCR (SDSCR) in a 0.18 μm CMOS process. We can find that turn-on resistance or the clamping voltage of single diode is much lower than that of the stacked diodes. The embedded SCR can help to slightly reduce the turn-on resistance and the clamping voltage of the stacked diodes. In fact, some layout skills can be used to further improve the turn-on efficient of the stacked diodes with embedded SCR [40].

Recently, a similar structure of the stacked diodes with embedded SCR, where a resistor uses to separate two diodes, has been reported [41]. The resistor acts as the trigger element of SCR, so the device is named resistor-triggered SCR (RTSCR). Figure 15(a) and (b) shows the schematic and the device cross-sectional view of RTSCR. The resistor can also reduce the parasitic capacitance of the ESD protection

overall parasitic capacitance becomes smaller. However, the stacked configuration is adverse to ESD protection because the overall turn-on resistance and the clamping voltage of the stacked diodes during ESD stresses are increased as well. For effective ESD protection, the stacked diodes with embedded SCR (SDSCR) have been presented [38, 39]. The SCR device has been reported to be useful for ESD protection with low turn-on resistance, low parasitic effects, and high ESD robustness. The stacked diodes with embedded SCR are illustrated in Figure 13. In this design, a P+/N-well diode and an N+/P-well diode are stacked, and a P+/Nwell/P-well/N+ SCR is embedded to form the ESD current path. A deep N-well structure is used to isolate the P-well region from the common P-substrate, so the SDSCR can apply to I/O-to-VDD or VSS-to-I/O. In the beginning of ESD stress, the initial current will be discharged through the stacked diodes, and then the primary current will be discharged through the embedded SCR. The stacked diodes also play the role of trigger circuit of SCR, because the current drawn from N-well and

ESD protection circuit with stacked diodes. (a) ESD protection circuit with stacked diodes. Device

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

cross-sectional view of (b) stacked P+/N-well diode and (c) stacked N+/P-well diode.

(a) ESD protection circuit with SDSCR and (b) device cross-sectional view of SDSCR.

Figure 12.

Figure 13.

18

circuit. Considering the simplified SCR model by using junction capacitances, as shown in Figure 15(c), the equivalent capacitance seen at anode or cathode of RTSCR can be calculated by the following equation:

$$\text{C}\_{\text{RTSNR}} = \frac{\text{Im}(Y\_{\text{RTSNR}})}{\alpha} = \frac{\text{Im}\left(\frac{1}{\frac{1}{\rho c C\_{P+/N-\text{Mdl}}} + \frac{1}{\frac{1}{\rho c} + j\alpha C\_{P-\text{Mdl}/N-\text{Mdl}(\text{Dap}\,\,\text{N}-\text{Mdl})}{N}} + \frac{1}{\rho c C\_{P-\text{Mdl}/N+\text{Mdl}}}\right)}{\alpha}$$

where YRTSCR denotes the admittance of the RTSCR, RT is the resistance, and CP+/N-Well, CP-Well/N-Well(Deep N-Well) and CP-Well/N+ denote the junction capacitances. To simplify the above equation, the junction capacitance is rewritten to CJ, and then the parasitic capacitance of the RTSCR can be expressed by the following equation:

$$C\_{\rm RTSCR} = \operatorname{Im} \left( \frac{1}{\frac{2}{jC\_{\uparrow}} + \frac{1}{\frac{1}{4a^2\_{\Upsilon}} + jC\_{\uparrow}}} \right) = \frac{\frac{2}{C\_{\uparrow}} + \frac{a^2 R r^2 C\_{\uparrow}}{1 + a^2 R r^2 C\_{\uparrow}^2}}{\left(\frac{2}{C\_{\uparrow}} + \frac{a^2 R r^2 C\_{\uparrow}}{1 + a^2 R r^2 C\_{\uparrow}^2} \right)^2 + \left(\frac{a R r}{1 + a^2 R r^2 C\_{\uparrow}^2} \right)^2} \approx \frac{C\_{\rm f}}{2 + \frac{3}{2} a a^2 R r^2 C\_{\uparrow}^2} \approx \frac{C\_{\rm f}}{2 + \frac{3}{2} a^2 R r^2 C\_{\uparrow}^2}$$

The SCR device in this ESD protection circuit still has the drawbacks of higher trigger voltage and the slower turn-on speed. The circuit design techniques, including the gate-coupled, substrate-triggered, diode-triggered, and GGNMOS-triggered techniques can be used to enhance the turn-on efficiency of SCR device. Of course, the capacitive triggering device increases the total parasitic capacitance seen at the I/O pad, even if the triggering device is not directly connected to I/O. Recently, an

ESD protection circuit with LTSCR and reverse diode. (a) ESD protection circuit with LTSCR and reverse

diode and (b) device cross-sectional view of LTSCR and reverse diode.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

inductor-triggered SCR (LTSCR) is proposed for ESD protection of high-frequency applications to achieve low high-frequency performance degradation, low trigger voltage, and high ESD robustness. In this design, the inductor provides a current path to trigger the SCR device, and it can also compensate the parasitic capacitance

Figure 17(a) shows the ESD protection circuit with an LTSCR and a reverse diode. This design consists of an SCR device and a reverse diode as the main ESD current path, and an inductor (Ltrig), a MOS transistor (Mtrig), and an RC-based ESD detection circuit as the trigger circuit. The initial-on PMOS transistor is selected for Mtrig to quickly pass the trigger current to SCR device [44]. The positive and negative ESD current discharging paths for the I/O pad are provided by the SCR and the reverse diode. Figure 17(b) shows the device cross-sectional view of inductor-triggered SCR. Under ESD stress conditions, the inductor and PMOS are used to provide the trigger path between the I/O pad and the base of NPN of the SCR device. When the trigger current is sent into the base of NPN of the SCR device, the SCR device can be quickly triggered on to discharge the ESD current from the I/O pad to VSS. The ESD detection circuit usually uses RC timer to distinguish the ESD-stress conditions from the normal circuit operating conditions, and the PMOS transistor is well controlled to turn on or off by the ESD detection circuit. Under normal circuit operating conditions, the inductor can compensate the para-

In this circuit, the dimensions of the inductor (Ltrig), PMOS transistor (Mtrig), SCR device, and reverse diode can be designed to minimize the high-frequency performance degradation. Since the capacitor used in power-rail ESD clamp circuit is large enough to keep the node between R and C at AC ground under normal circuit operating conditions, the impedance of the trigger path (Ztrig) seen at the I/O

> 1 jωCtrig

<sup>¼</sup> <sup>j</sup><sup>ω</sup> Ltrig � <sup>1</sup> <sup>ω</sup><sup>2</sup>Ctrig

SCR device with inductive triggering device has been presented [43]. That

of ESD protection devices.

Figure 17.

sitic capacitance of SCR and diode.

pad to ground can be calculated as:

21

Ztrig ≈jωLtrig þ

It can be noted that the parasitic capacitance of the RTSCR can be reduced by adding the resistor. Generally, the capacitance reduction of RTSCR can be up to 30%. Therefore, the ESD protection circuit with dual RTSCRs can be used for highfrequency applications.

#### 6. ESD protection circuit design: Type III

Figure 16(a) shows another SCR-based ESD protection circuit [13]. The typical SCR device in CMOS process consists of P+, N-well, P-well, and N+. Instead of connecting the N-well to I/O pad, connecting the N-well to VDD avoids the parasitic capacitance or noise coupling from P-substrate or P-well to N-well and I/O [42]. As shown in Figure 16(b), the I/O pad is connected to the first P+, which is formed in the N-well. The pickup N+ in the N-well is biased to VDD. The VSS pad is connected to the second N+ and the pickup P+, which are formed in the nearby P-well. The SCR path between I/O and VSS consists of P+, N-well, P-well, and N+. Besides, the parasitic diode path from I/O to VDD consists of P+ and N-well. In this structure, the PS and the PD ESD currents can be discharged through the SCR path and its parasitic diode path. The NS and the ND ESD currents need reverse diode and power-rail ESD clamp circuit to form their discharging paths.

Figure 16.

(a) ESD protection circuit with SCR and diode and (b) device cross-sectional view of SCR and diode.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

Figure 17.

circuit. Considering the simplified SCR model by using junction capacitances, as shown in Figure 15(c), the equivalent capacitance seen at anode or cathode of

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

Im <sup>1</sup> <sup>1</sup> <sup>j</sup>ωCPþ=N�Well<sup>þ</sup> <sup>1</sup> <sup>1</sup> RT

where YRTSCR denotes the admittance of the RTSCR, RT is the resistance, and CP+/N-Well, CP-Well/N-Well(Deep N-Well) and CP-Well/N+ denote the junction capacitances. To simplify the above equation, the junction capacitance is rewritten to CJ, and then the parasitic capacitance of the RTSCR can be expressed by the following equation:

> 2 CJ <sup>þ</sup> <sup>ω</sup><sup>2</sup>RT<sup>2</sup>

It can be noted that the parasitic capacitance of the RTSCR can be reduced by adding the resistor. Generally, the capacitance reduction of RTSCR can be up to 30%. Therefore, the ESD protection circuit with dual RTSCRs can be used for high-

Figure 16(a) shows another SCR-based ESD protection circuit [13]. The typical SCR device in CMOS process consists of P+, N-well, P-well, and N+. Instead of connecting the N-well to I/O pad, connecting the N-well to VDD avoids the parasitic capacitance or noise coupling from P-substrate or P-well to N-well and I/O [42]. As shown in Figure 16(b), the I/O pad is connected to the first P+, which is formed in the N-well. The pickup N+ in the N-well is biased to VDD. The VSS pad is connected to the second N+ and the pickup P+, which are formed in the nearby P-well. The SCR path between I/O and VSS consists of P+, N-well, P-well, and N+. Besides, the parasitic diode path from I/O to VDD consists of P+ and N-well. In this structure, the PS and the PD ESD currents can be discharged through the SCR path and its parasitic diode path. The NS and the ND ESD currents need reverse diode and

CJ <sup>þ</sup> <sup>ω</sup><sup>2</sup>RT<sup>2</sup>CJ <sup>1</sup>þω<sup>2</sup>RT<sup>2</sup> CJ 2

� �<sup>2</sup>

<sup>þ</sup>jωCP�Well=N�Well Deep N ð Þ �Well

ω

CJ <sup>1</sup>þω<sup>2</sup>RT<sup>2</sup>CJ 2

<sup>þ</sup> <sup>ω</sup>RT <sup>1</sup>þω<sup>2</sup>RT<sup>2</sup>CJ 2 � �<sup>2</sup> <sup>≈</sup> CJ

!

<sup>þ</sup> <sup>1</sup> <sup>j</sup>ωCP�Well=N<sup>þ</sup>

<sup>2</sup> <sup>þ</sup> <sup>3</sup> <sup>2</sup> ω<sup>2</sup>RT 2 CJ 2

RTSCR can be calculated by the following equation:

ω ¼

1 A ¼

6. ESD protection circuit design: Type III

power-rail ESD clamp circuit to form their discharging paths.

(a) ESD protection circuit with SCR and diode and (b) device cross-sectional view of SCR and diode.

2

CRTSCR <sup>¼</sup> Imð Þ YRTSCR

2 jCJ <sup>þ</sup> <sup>1</sup> <sup>1</sup> ωRT þjCJ

0 @

CRTSCR <sup>¼</sup> Im <sup>1</sup>

frequency applications.

Figure 16.

20

ESD protection circuit with LTSCR and reverse diode. (a) ESD protection circuit with LTSCR and reverse diode and (b) device cross-sectional view of LTSCR and reverse diode.

The SCR device in this ESD protection circuit still has the drawbacks of higher trigger voltage and the slower turn-on speed. The circuit design techniques, including the gate-coupled, substrate-triggered, diode-triggered, and GGNMOS-triggered techniques can be used to enhance the turn-on efficiency of SCR device. Of course, the capacitive triggering device increases the total parasitic capacitance seen at the I/O pad, even if the triggering device is not directly connected to I/O. Recently, an SCR device with inductive triggering device has been presented [43]. That inductor-triggered SCR (LTSCR) is proposed for ESD protection of high-frequency applications to achieve low high-frequency performance degradation, low trigger voltage, and high ESD robustness. In this design, the inductor provides a current path to trigger the SCR device, and it can also compensate the parasitic capacitance of ESD protection devices.

Figure 17(a) shows the ESD protection circuit with an LTSCR and a reverse diode. This design consists of an SCR device and a reverse diode as the main ESD current path, and an inductor (Ltrig), a MOS transistor (Mtrig), and an RC-based ESD detection circuit as the trigger circuit. The initial-on PMOS transistor is selected for Mtrig to quickly pass the trigger current to SCR device [44]. The positive and negative ESD current discharging paths for the I/O pad are provided by the SCR and the reverse diode. Figure 17(b) shows the device cross-sectional view of inductor-triggered SCR. Under ESD stress conditions, the inductor and PMOS are used to provide the trigger path between the I/O pad and the base of NPN of the SCR device. When the trigger current is sent into the base of NPN of the SCR device, the SCR device can be quickly triggered on to discharge the ESD current from the I/O pad to VSS. The ESD detection circuit usually uses RC timer to distinguish the ESD-stress conditions from the normal circuit operating conditions, and the PMOS transistor is well controlled to turn on or off by the ESD detection circuit. Under normal circuit operating conditions, the inductor can compensate the parasitic capacitance of SCR and diode.

In this circuit, the dimensions of the inductor (Ltrig), PMOS transistor (Mtrig), SCR device, and reverse diode can be designed to minimize the high-frequency performance degradation. Since the capacitor used in power-rail ESD clamp circuit is large enough to keep the node between R and C at AC ground under normal circuit operating conditions, the impedance of the trigger path (Ztrig) seen at the I/O pad to ground can be calculated as:

$$Z\_{\rm trig} \approx j a \rho L\_{\rm trig} + \frac{1}{j a \rho C\_{\rm trig}} = j a \left( L\_{\rm trig} - \frac{1}{a^2 C\_{\rm trg}} \right).$$

where Ctrig is the sum of gate-to-source, gate-to-body, and drain-to-body capacitances of the PMOS. The resonance angular frequency (ωo) can be obtained by

References

366-385

2015;63:1910-1922

(RFIT). 2014

(EOS/ESD). 2011

2005. p. 59-66

2006

23

[1] Rangan S, Rappaport T, Erkip E. Millimeter-wave cellular wireless networks: Potentials and challenges. Proceedings of the IEEE. 2014;102:

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

> [9] Ker M, Lin C, Hsiao Y. Overview on ESD protection designs of low-parasitic capacitance for RF ICs in CMOS technologies. IEEE Transactions on Device and Materials Reliability. 2011;

[10] Voldman S. ESD: Analog Circuits and Design. Chichester: John Wiley &

[11] Amerasekera A, Duvvury C. ESD in Silicon Integrated Circuits. Chichester:

[12] Li J, Chatty K, Gauthier R, Mishra R, Russ C. Technology scaling of advanced bulk CMOS on-chip ESD protection down to the 32nm node. In: Proceedings of the Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD).

[13] Galy P, Jimenez J, Meuris P, Schoenmaker W, Dupuis O. ESD RF protections in advanced CMOS technologies and its parasitic

capacitance evaluation. In: Proceedings of the IEEE International Conference on IC Design & Technology (ICICDT);

[14] Peng B, Lin C. Low-loss I/O pad with ESD protection for K/Ka-bands applications in nanoscale CMOS process. IEEE Transactions on Circuits and Systems II: Express Briefs. 2018;65:

[15] Soldner W, Streibl M, Hodel U, Tiebout M, Gossner H, Schmitt-Landsiedel D, et al. RF ESD protection

[16] Ker M. Whole-chip ESD protection design with efficient VDD-to-VSS ESD clamp circuit for submicron CMOS

strategies: Codesign vs. low-C protection. In: Proceedings of the Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD). 2005

John Wiley & Sons; 2002

11:207-218

Sons; 2015

2009

2011

1475-1479

[2] Fritsche D, Tretter G, Carta C, Ellinger F. Millimeter-wave low-noise amplifier design in 28-nm low-power digital CMOS. IEEE Transactions on Microwave Theory and Techniques.

[3] Abidi A. CMOS microwave and millimeter-wave ICs: The historical background. In: Proceedings of the IEEE International Symposium on Radio-Frequency Integration Technology

[4] Gossner H. Design for ESD protection at its limits. In: Proceedings of the Symposium on VLSI Technology. 2013

[5] Li J, Mishra R, Shrivastava M, Yang Y, Gauthier R, Russ C. Technology scaling effects on the ESD performance of silicide-blocked PMOSFET devices in nanometer bulk CMOS technologies. In: Proceedings of the Electrical Overstress/ Electrostatic Discharge Symposium

[6] Wang A, Feng H, Zhan R, Xie H, Chen G, Wu Q, et al. A review on RF ESD protection design. IEEE Transactions on Electron Devices. 2005;52:1304-1311

[7] Natarajan M, Linten D, Thijs S, Jansen P, Trémouilles D, Jeamsaksiri W,

Decoutere S, Groeseneken G. RFCMOS ESD protection and reliability. In: Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA);

[8] Voldman S. ESD: RF Technology and Circuits. Chichester: John Wiley & Sons;

Nakaie T, Sawada M, Hasebe T,

$$w\_{\bullet} = \frac{1}{\sqrt{\left(L\_{\text{trig}} - \frac{1}{w\_{\bullet} \, ^\circ \text{C}\_{\text{trig}}}\right) \mathcal{C}\_{\text{ESD}}}}$$

where ω<sup>o</sup> is designed to be the operating frequency, and CESD is the parasitic capacitance contributed by the SCR and diode. The sizes of SCR and diode depend on the required ESD robustness, while the size of Mtrig transistor depends on the required trigger current. Once the sizes of Mtrig transistor, SCR, and diode have been chosen, the required inductance (Ltrig) can be determined.

#### 7. Conclusion

A comprehensive review in the field of ESD protection design for highfrequency integrated circuits is presented in this chapter. Besides improving the ESD robustness, the parasitic effects from ESD protection devices must be minimized or canceled to optimize the high-frequency performance simultaneously. Furthermore, the ESD protection circuits and high-frequency circuits can be codesigned to achieve both good circuit performance and high ESD robustness. The on-chip ESD protection designs for high-frequency circuits will be continuously an important design task in CMOS technology.

#### Author details

Chun-Yu Lin Department of Electrical Engineering, National Taiwan Normal University, Taipei, Taiwan

\*Address all correspondence to: cy.lin@ieee.org

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/ by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

#### References

where Ctrig is the sum of gate-to-source, gate-to-body, and drain-to-body capacitances of the PMOS. The resonance angular frequency (ωo) can be obtained by

> <sup>ω</sup><sup>o</sup> <sup>¼</sup> <sup>1</sup> ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi Ltrig � <sup>1</sup> ωo<sup>2</sup>Ctrig � �

where ω<sup>o</sup> is designed to be the operating frequency, and CESD is the parasitic capacitance contributed by the SCR and diode. The sizes of SCR and diode depend on the required ESD robustness, while the size of Mtrig transistor depends on the required trigger current. Once the sizes of Mtrig transistor, SCR, and diode have

A comprehensive review in the field of ESD protection design for highfrequency integrated circuits is presented in this chapter. Besides improving the ESD robustness, the parasitic effects from ESD protection devices must be minimized or canceled to optimize the high-frequency performance simultaneously. Furthermore, the ESD protection circuits and high-frequency circuits can be codesigned to achieve both good circuit performance and high ESD robustness. The on-chip ESD protection designs for high-frequency circuits will be continuously an

Department of Electrical Engineering, National Taiwan Normal University, Taipei,

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/ by/3.0), which permits unrestricted use, distribution, and reproduction in any medium,

r

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

been chosen, the required inductance (Ltrig) can be determined.

important design task in CMOS technology.

\*Address all correspondence to: cy.lin@ieee.org

provided the original work is properly cited.

7. Conclusion

Author details

Chun-Yu Lin

Taiwan

22

CESD

[1] Rangan S, Rappaport T, Erkip E. Millimeter-wave cellular wireless networks: Potentials and challenges. Proceedings of the IEEE. 2014;102: 366-385

[2] Fritsche D, Tretter G, Carta C, Ellinger F. Millimeter-wave low-noise amplifier design in 28-nm low-power digital CMOS. IEEE Transactions on Microwave Theory and Techniques. 2015;63:1910-1922

[3] Abidi A. CMOS microwave and millimeter-wave ICs: The historical background. In: Proceedings of the IEEE International Symposium on Radio-Frequency Integration Technology (RFIT). 2014

[4] Gossner H. Design for ESD protection at its limits. In: Proceedings of the Symposium on VLSI Technology. 2013

[5] Li J, Mishra R, Shrivastava M, Yang Y, Gauthier R, Russ C. Technology scaling effects on the ESD performance of silicide-blocked PMOSFET devices in nanometer bulk CMOS technologies. In: Proceedings of the Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ESD). 2011

[6] Wang A, Feng H, Zhan R, Xie H, Chen G, Wu Q, et al. A review on RF ESD protection design. IEEE Transactions on Electron Devices. 2005;52:1304-1311

[7] Natarajan M, Linten D, Thijs S, Jansen P, Trémouilles D, Jeamsaksiri W, Nakaie T, Sawada M, Hasebe T, Decoutere S, Groeseneken G. RFCMOS ESD protection and reliability. In: Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA); 2005. p. 59-66

[8] Voldman S. ESD: RF Technology and Circuits. Chichester: John Wiley & Sons; 2006

[9] Ker M, Lin C, Hsiao Y. Overview on ESD protection designs of low-parasitic capacitance for RF ICs in CMOS technologies. IEEE Transactions on Device and Materials Reliability. 2011; 11:207-218

[10] Voldman S. ESD: Analog Circuits and Design. Chichester: John Wiley & Sons; 2015

[11] Amerasekera A, Duvvury C. ESD in Silicon Integrated Circuits. Chichester: John Wiley & Sons; 2002

[12] Li J, Chatty K, Gauthier R, Mishra R, Russ C. Technology scaling of advanced bulk CMOS on-chip ESD protection down to the 32nm node. In: Proceedings of the Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD). 2009

[13] Galy P, Jimenez J, Meuris P, Schoenmaker W, Dupuis O. ESD RF protections in advanced CMOS technologies and its parasitic capacitance evaluation. In: Proceedings of the IEEE International Conference on IC Design & Technology (ICICDT); 2011

[14] Peng B, Lin C. Low-loss I/O pad with ESD protection for K/Ka-bands applications in nanoscale CMOS process. IEEE Transactions on Circuits and Systems II: Express Briefs. 2018;65: 1475-1479

[15] Soldner W, Streibl M, Hodel U, Tiebout M, Gossner H, Schmitt-Landsiedel D, et al. RF ESD protection strategies: Codesign vs. low-C protection. In: Proceedings of the Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD). 2005

[16] Ker M. Whole-chip ESD protection design with efficient VDD-to-VSS ESD clamp circuit for submicron CMOS

VLSI. IEEE Transactions on Electron Devices. 1999;46:173-183

[17] Voldman S. ESD: Circuits and Devices. Chichester: John Wiley & Sons; 2015

[18] Wang W, Dong S, Zhong L, Zeng J, Yu Z, Liu Z. GGNMOS as ESD protection in different nanometer CMOS process. In: Proceedings of the IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC); 2014

[19] Paul M, Russ C, Kumar B, Gossner H, Shrivastava M. Physics of current filamentation in ggNMOS devices under ESD condition revisited. IEEE Transactions on Electron Devices. 2018; 65:2981-2989

[20] Maloney T, Khurana N. Transmission line pulsing techniques for circuit modeling of phenomena. In: Proceedings of the Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ESD). 1985

[21] Lee J, Wu K, Huang S, Tang C. The dynamic current distribution of a multifingered GGNMOS under high current stress and HBM ESD events. In: Proceedings of the IEEE International Reliability Physics Symposium (IRPS); 2006

[22] Richier C, Salome P, Mabboux G, Zaza I, Juge A, Mortini P. Investigation on different ESD protection strategies devoted to 3.3 V RF applications (2 GHz) in a 0.18 μm CMOS process. Journal of Electrostatics. 2002;54:55-71

[23] Chen T, Ker M, Wu C. Experimental investigation on the HBM ESD characteristics of CMOS devices in a 0.35-μm silicided process. In: Proceedings of the IEEE International Symposium on VLSI Technology, Systems, and Applications. VLSI-TSA; 1999; Hsinchu

[24] Song B, Han Y, Li M, Liou J, Dong S, Guo W, Huang D, Ma F, Miao M. Design analysis of novel substratetriggered GGNMOS in 65nm CMOS process. In: Proceedings of the IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA); 2010

[31] Lin C, Chang R. Design of ESD protection device for K/Ka-band applications in nanoscale CMOS process. IEEE Transactions on Electron

Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

> Proceedings of the IEEE International Reliability Physics Symposium (IRPS);

[39] Lin C, Fu W. Diode string with reduced clamping voltage for efficient

Transactions on Device and Materials

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[41] Lin C, Chen C. Resistor-triggered SCR device for ESD protection in highspeed I/O interface circuits. IEEE Electron Device Letters. 2017;38:712-715

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process. IEEE Transactions on Microwave Theory and Techniques.

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protection design for 60-GHz LNA with inductor-triggered SCR in 65-nm CMOS

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Boschke R, Song M, See Y, Groeseneken G, Thean A. Proceedings of the IEEE International Electron Devices Meeting

Devices. 2015;62:2824-2829

Reliability. 2009;9:465-475

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Optimization on layout style of ESD protection diode for radio-frequency front-end and high-speed I/O interface circuits. IEEE Transactions on Device and Materials Reliability. 2010;10:

[35] Voldmm S, Schulz R, Howard J, Gross V, Wu S, Yapsir A, et al. CMOSon-SOI ESD protection networks. In: Proceedings of the Electrical Overstress/ Electrostatic Discharge Symposium

[36] Ruberto M, Degani O, Wail S, Tendler A, Fridman A, Goltman G. A reliability-aware RF power amplifier design for CMOS radio chip integration.

In: Proceedings of the IEEE International Reliability Physics Symposium (IRPS); 2008

[37] Son M, Park C. Electrostatic

discharge protection devices with series connection using distributed cell-based diodes. Electronics Letters. 2014;50:168-

[38] Lin C, Fan M, Ker M, Chu L, Tseng J, Song M. Improving ESD robustness of stacked diodes with embedded SCR for RF applications in 65-nm CMOS. In:

(IEDM); 2014

238-246

170

25

(EOS/ESD). 1996

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[27] Chang T, Hsu Y, Tsai T, Tseng J, Lee J, Song M. High-k metal gate-bounded silicon controlled rectifier for ESD protection. In: Proceedings of the Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD). 2012

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Low-C ESD Protection Design in CMOS Technology DOI: http://dx.doi.org/10.5772/intechopen.85594

[31] Lin C, Chang R. Design of ESD protection device for K/Ka-band applications in nanoscale CMOS process. IEEE Transactions on Electron Devices. 2015;62:2824-2829

VLSI. IEEE Transactions on Electron

[24] Song B, Han Y, Li M, Liou J, Dong S, Guo W, Huang D, Ma F, Miao M. Design analysis of novel substratetriggered GGNMOS in 65nm CMOS process. In: Proceedings of the IEEE International Symposium on

Analysis of Integrated Circuits (IPFA);

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[30] Russ C, Mergens M, Verhaege K, Armer J, Jozwiak P, Kolluri G, et al. GGSCRs: GGNMOS triggered silicon controlled rectifiers for ESD protection in deep sub-micron CMOS processes. In: Proceedings of the Electrical Overstress/ Electrostatic Discharge Symposium

(EOS/ESD). 2001; Portland

Devices. 2003;50:397-405

2000;44:1297-1303

International Reliability Physics Symposium (IRPS); 2017

the Physical and Failure

2010

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

2005;5:235-249

[17] Voldman S. ESD: Circuits and Devices. Chichester: John Wiley & Sons;

Yu Z, Liu Z. GGNMOS as ESD protection in different nanometer CMOS process. In: Proceedings of the IEEE International Conference on Electron Devices and Solid-State

ESD condition revisited. IEEE

[20] Maloney T, Khurana N.

Circuits (EDSSC); 2014

65:2981-2989

(EOS/ESD). 1985

2006

[18] Wang W, Dong S, Zhong L, Zeng J,

[19] Paul M, Russ C, Kumar B, Gossner H, Shrivastava M. Physics of current filamentation in ggNMOS devices under

Transactions on Electron Devices. 2018;

Transmission line pulsing techniques for circuit modeling of phenomena. In: Proceedings of the Electrical Overstress/ Electrostatic Discharge Symposium

[21] Lee J, Wu K, Huang S, Tang C. The dynamic current distribution of a multifingered GGNMOS under high current stress and HBM ESD events. In: Proceedings of the IEEE International Reliability Physics Symposium (IRPS);

[22] Richier C, Salome P, Mabboux G, Zaza I, Juge A, Mortini P. Investigation on different ESD protection strategies devoted to 3.3 V RF applications (2 GHz) in a 0.18 μm CMOS process. Journal of Electrostatics. 2002;54:55-71

[23] Chen T, Ker M, Wu C. Experimental

Proceedings of the IEEE International Symposium on VLSI Technology, Systems, and Applications. VLSI-TSA;

investigation on the HBM ESD characteristics of CMOS devices in a

0.35-μm silicided process. In:

1999; Hsinchu

24

Devices. 1999;46:173-183

2015

[32] Bhatia K, Jack N, Rosenbaum E. Layout optimization of ESD protection diodes for high-frequency I/Os. IEEE Transactions on Device and Materials Reliability. 2009;9:465-475

[33] Chen S, Linten D, Lee J, Scholz M, Hellings G, Sibaja-Hernandez A, Boschke R, Song M, See Y, Groeseneken G, Thean A. Proceedings of the IEEE International Electron Devices Meeting (IEDM); 2014

[34] Yeh C, Ker M, Liang Y. Optimization on layout style of ESD protection diode for radio-frequency front-end and high-speed I/O interface circuits. IEEE Transactions on Device and Materials Reliability. 2010;10: 238-246

[35] Voldmm S, Schulz R, Howard J, Gross V, Wu S, Yapsir A, et al. CMOSon-SOI ESD protection networks. In: Proceedings of the Electrical Overstress/ Electrostatic Discharge Symposium (EOS/ESD). 1996

[36] Ruberto M, Degani O, Wail S, Tendler A, Fridman A, Goltman G. A reliability-aware RF power amplifier design for CMOS radio chip integration. In: Proceedings of the IEEE International Reliability Physics Symposium (IRPS); 2008

[37] Son M, Park C. Electrostatic discharge protection devices with series connection using distributed cell-based diodes. Electronics Letters. 2014;50:168- 170

[38] Lin C, Fan M, Ker M, Chu L, Tseng J, Song M. Improving ESD robustness of stacked diodes with embedded SCR for RF applications in 65-nm CMOS. In:

Proceedings of the IEEE International Reliability Physics Symposium (IRPS); 2014

[39] Lin C, Fu W. Diode string with reduced clamping voltage for efficient on-chip ESD protection. IEEE Transactions on Device and Materials Reliability. 2016;16:688-690

[40] Lin C, Fan M. Optimization on layout style of diode stackup for on-chip ESD protection. IEEE Transactions on Device and Materials Reliability. 2014; 14:775-777

[41] Lin C, Chen C. Resistor-triggered SCR device for ESD protection in highspeed I/O interface circuits. IEEE Electron Device Letters. 2017;38:712-715

[42] Afzali-Kusha A, Nagata M, Verghese N, Allstot D. Substrate noise coupling in SoC design: Modeling, avoidance, and validation. Proceedings of the IEEE. 2006;94:2109-2138

[43] Lin C, Chu L, Ker M. ESD protection design for 60-GHz LNA with inductor-triggered SCR in 65-nm CMOS process. IEEE Transactions on Microwave Theory and Techniques. 2012;60:714-723

[44] Ker M, Chen S. Implementation of initial-on ESD protection concept with PMOS-triggered SCR devices in deepsubmicron CMOS technology. IEEE Journal of Solid-State Circuits. 2007;42: 1158-1168

**27**

Section 2

Breakdown in Micro-gaps

Section 2

## Breakdown in Micro-gaps

**29**

**Chapter 3**

**Abstract**

**1. Introduction**

**1.1 Background and motivation**

Microgaps

*Guodong Meng and Yonghong Cheng*

Electrical Breakdown Behaviors in

The study of electrical breakdown behaviors in microgaps has drawn intensive attention around the world due to the miniaturization of electronic devices that allows electronic circuits to be packaged more densely, making possible compact computers, advanced radar and navigation systems, and other devices that use very large numbers of components. Therefore, a clear understanding of the electrical breakdown behaviors in microgaps is required to avoid the dielectric breakdown or to trigger the breakdown at microscale. This chapter introduces the significance of understanding breakdown characterization and reliability assessment for electrostatically actuated devices, magnetic recording devices, photomasks, RF MEMS switches, and micromachines and points out the derivation of the classical Paschen's law at microscale. Then it summarizes the state-of-the-art research work on the methodology, influencing factors, dynamics, and physical mechanisms of electrical breakdown in microgaps, which is expected to expand the general knowledge of electrical breakdown to the microscale regime or more and benefits the reliability

assessment and ESD protection of microscale and nanoscale devices.

field emission, influencing factors, dynamics, physical mechanism

**Keywords:** electrical breakdown behaviors, microscale, Townsend avalanche,

Device miniaturization has revolutionized electronics, allowing denser packaging of electronic circuits to make possible compact computers, advanced radar and navigation systems, and other devices that use very large numbers of components [1]. In practical applications, micro-electromechanical systems (MEMSs), like micromachines and micro-mirror arrays, function by electrostatic actuation [2, 3], while the electronic devices, like photomasks [4, 5] and magnetoresistive (MR), giant magnetoresistive (GMR), and tunneling magnetoresistive (TMR) devices used in the magnetic recording industry [6–8], are at risk of accumulating static charges and the consequent threats of electrostatic discharge (ESD); both the microdevices and microstructures are associated with a strong electric field strength within microgaps [9]. For instance, the high operating voltages required for RF MEMS switches [10–13], micro-motors [14, 15] and micro-mirror [16, 17] can create sparking or breakdown across microgap structures due to electrical overstress (EOS) that may damage or destroy sensitive equipment, especially when the devices are subjected to a complex electromagnetic environment [7, 18].

#### **Chapter 3**

## Electrical Breakdown Behaviors in Microgaps

*Guodong Meng and Yonghong Cheng*

#### **Abstract**

The study of electrical breakdown behaviors in microgaps has drawn intensive attention around the world due to the miniaturization of electronic devices that allows electronic circuits to be packaged more densely, making possible compact computers, advanced radar and navigation systems, and other devices that use very large numbers of components. Therefore, a clear understanding of the electrical breakdown behaviors in microgaps is required to avoid the dielectric breakdown or to trigger the breakdown at microscale. This chapter introduces the significance of understanding breakdown characterization and reliability assessment for electrostatically actuated devices, magnetic recording devices, photomasks, RF MEMS switches, and micromachines and points out the derivation of the classical Paschen's law at microscale. Then it summarizes the state-of-the-art research work on the methodology, influencing factors, dynamics, and physical mechanisms of electrical breakdown in microgaps, which is expected to expand the general knowledge of electrical breakdown to the microscale regime or more and benefits the reliability assessment and ESD protection of microscale and nanoscale devices.

**Keywords:** electrical breakdown behaviors, microscale, Townsend avalanche, field emission, influencing factors, dynamics, physical mechanism

#### **1. Introduction**

#### **1.1 Background and motivation**

Device miniaturization has revolutionized electronics, allowing denser packaging of electronic circuits to make possible compact computers, advanced radar and navigation systems, and other devices that use very large numbers of components [1]. In practical applications, micro-electromechanical systems (MEMSs), like micromachines and micro-mirror arrays, function by electrostatic actuation [2, 3], while the electronic devices, like photomasks [4, 5] and magnetoresistive (MR), giant magnetoresistive (GMR), and tunneling magnetoresistive (TMR) devices used in the magnetic recording industry [6–8], are at risk of accumulating static charges and the consequent threats of electrostatic discharge (ESD); both the microdevices and microstructures are associated with a strong electric field strength within microgaps [9]. For instance, the high operating voltages required for RF MEMS switches [10–13], micro-motors [14, 15] and micro-mirror [16, 17] can create sparking or breakdown across microgap structures due to electrical overstress (EOS) that may damage or destroy sensitive equipment, especially when the devices are subjected to a complex electromagnetic environment [7, 18].

Besides, the photomasks, which are used in front-end semiconductor photolithography processing to project a desired pattern onto the wafer surface, could become charged and a spark can occur either due to the real charge on the chrome guard ring or the induced charge caused by fields from surface charge on the quartz [4, 19]. Meanwhile, multiple applications in combustion, chemistry, biology, and medicine require the intentional creation of microplasmas or microdischarges [20, 21]. For instance, various microelectric propulsion systems have been proposed for ultra-small satellites, including Hall thrusters or pulsed plasma thrusters [22–25], which utilize microdischarges. As the devices are getting smaller from microscale to nanoscale and even molecular scale, the reliability assessment and underlying physics about the static charge and ESD events draw increasing attentions from both academics and industry [26–28]. Hence, predicting dielectric breakdown thresholds and figuring out the physical mechanism of microgap structures are critical to avoid undesired discharge or improve the microplasma performance, which would be of great interest to the microelectronic and plasma communities.

#### **1.2 Derivation from the classical Paschen's law**

The gas breakdown phenomenon was recognized ever since the creation of human beings thousands of years ago, but firstly systematically investigated by German physicist Paschen in 1889 [29]. Through conducting a series of electrical discharge experiments, Paschen established the widely used Paschen's law, which described the relationship between the breakdown voltage *V*bd and the product of the pressure *p* and gap length *d*. Since then, Paschen's law has been employed for predicting breakdown thresholds and insulation performance of power equipment, electronic devices, etc.

Generally, Paschen's law could be explained by the Townsend avalanche mechanism, which considers that the electrons collide and ionize with neutral particles (α process) and positive ions bombard the cathode and generate secondary electrons (γ process), which are the primary processes during the discharge. Paschen's law could be described by the equation *Ubd* <sup>=</sup> *Bpd* \_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_ ln(*Apd*) <sup>−</sup> ln(ln(1 <sup>+</sup> 1/γ)) (1)

$$dU\_{bd} = \frac{Bpd}{\ln\left(Apd\right) - \ln\left(\ln\left(1 + 1/\gamma\right)\right)}\tag{1}$$

**31**

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

nanoelectronic industries.

**1.3 The main chapter content**

outlook are provided in Section 6.

methods are discussed and summarized.

**2.1 The macroelectrode structure**

**2. Methodology**

based on the research work in the last two decades.

simulation [33, 34], from atmosphere environment [35] to vacuum [36, 37]. Torres et al. and Slade et al. carried out a series of experimental investigations on microgap breakdown in air and vacuum, respectively. They both found out the plateau stage in the modified Paschen's law and the transition point of gap widths was 4 μm. Besides the numerical simulation, analytic and theoretical calculations have been also carried out. Go [38], Klas [39, 40], Buendia [41], and Loveless [42] calculated the breakdown thresholds at microscale coupling with field emission and Townsend avalanche, considering the ion-enhance field emission, where the electron collision ionization coefficient α and the secondary electron emission coefficient γ dictate the breakdown process, where the secondary electron emission coefficient γ would be enhanced by the space charge accumulation and the cathode charge production through secondary emission. Therefore, the investigation of electrical breakdown behaviors at microscale, including the methodology, fundamental properties, influencing factors, and physical mechanisms, is urgently demanded, which is of critical importance not only for the plasma physics community but also for micro-/

This chapter summarizes the state-of-the-art methodologies, influencing factors, dynamics, and physical mechanisms of the electrical breakdown in microscale

Section 2 summarizes the methodology for investigating the electrical breakdown in microgaps. Section 3 summarizes the influencing factors of the electrical breakdown in microgaps. Section 4 and 5 summarize the dynamic process and physical mechanism of the electrical breakdown in microgaps. Summary and

Different from the routine gas breakdown experiments in large gaps (>0.1 mm), the electrical breakdown experiments in microgaps (<0.1 mm) require a much better spatial resolution in terms of both observation and gap adjustment. Accordingly, the methodology is very diverse, including the macro electrode structure prepared by the mechanical technique, the planar electrode structure and MEMS device structure prepared by the microfabrication technique, and the microelectrode structure prepared by the electrochemical etching technique. Moreover, the in-situ electro-optical measurement technique has also been proposed for exploring the breakdown dynamic process at microscale. In this chapter, various experimental

At the initial stage, the study was basically conducted with the macroelectrode structure and experimental setup similar to that at macroscale. **Figure 1a** shows the schematic diagram of a typical macro electrode-based experimental setup and (b) shows the picture of a spherical electrode-based experimental setup used in the literature. The electrode size is in the order of millimeters in radius, which could be fabricated by mechanical machining. One electrode is fixed with the base (also known as static electrode) and the other is movable with the screw micrometer or stepping motor (also known as movable electrode). Both electrodes are required to be aligned on a straight line to ensure the consistence of the discharge experiments.

where *U*bd is the breakdown voltage, *d* is the gap separation, *p* is the gas pressure, *γ* is the secondary electron emission coefficient, and A and B are constants determined by the gap type.

While the classical Paschen curve has a right branch with the breakdown voltage decreasing as *pd* decreases, a characteristic minimum, and a left branch with the breakdown voltage increasing as *pd* decreases, research has shown that the left branch continues to decrease nearly linearly with *d*, that is, in microscale gaps, *pd* scaling fails. Early experiments noted that reducing gap sizes to microscale at atmospheric pressure led to deviations in the traditional breakdown mechanism driven by Townsend avalanche and represented mathematically by Paschen's law (PL) [30]. Departing from the traditional PL, the breakdown voltage would undergo a plateau when the gap width is smaller than ~10 μm and then continue to decrease with the gap width. The gap widths for the transition processes vary with the experimental conditions, such as electrode materials, electrode geometry, applied voltage waveform, gap pressures, etc.

Since the derivation of Paschen's law in the microscale regime was discovered in 1950s, a large number of research work has been dedicated to modification of the classical Paschen's law, from experimental investigation [31, 32] to numerical

#### *Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

**1.2 Derivation from the classical Paschen's law**

electronic devices, etc.

mined by the gap type.

law could be described by the equation

voltage waveform, gap pressures, etc.

Besides, the photomasks, which are used in front-end semiconductor photolithography processing to project a desired pattern onto the wafer surface, could become charged and a spark can occur either due to the real charge on the chrome guard ring or the induced charge caused by fields from surface charge on the quartz [4, 19]. Meanwhile, multiple applications in combustion, chemistry, biology, and medicine require the intentional creation of microplasmas or microdischarges [20, 21]. For instance, various microelectric propulsion systems have been proposed for ultra-small satellites, including Hall thrusters or pulsed plasma thrusters [22–25], which utilize microdischarges. As the devices are getting smaller from microscale to nanoscale and even molecular scale, the reliability assessment and underlying physics about the static charge and ESD events draw increasing attentions from both academics and industry [26–28]. Hence, predicting dielectric breakdown thresholds and figuring out the physical mechanism of microgap structures are critical to avoid undesired discharge or improve the microplasma performance, which would be of great interest to the microelectronic and plasma communities.

The gas breakdown phenomenon was recognized ever since the creation of human beings thousands of years ago, but firstly systematically investigated by German physicist Paschen in 1889 [29]. Through conducting a series of electrical discharge experiments, Paschen established the widely used Paschen's law, which described the relationship between the breakdown voltage *V*bd and the product of the pressure *p* and gap length *d*. Since then, Paschen's law has been employed for predicting breakdown thresholds and insulation performance of power equipment,

Generally, Paschen's law could be explained by the Townsend avalanche mechanism, which considers that the electrons collide and ionize with neutral particles (α process) and positive ions bombard the cathode and generate secondary electrons (γ process), which are the primary processes during the discharge. Paschen's

*Ubd* <sup>=</sup> *Bpd* \_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_\_ ln(*Apd*) <sup>−</sup> ln(ln(1 <sup>+</sup> 1/γ)) (1)

where *U*bd is the breakdown voltage, *d* is the gap separation, *p* is the gas pressure, *γ* is the secondary electron emission coefficient, and A and B are constants deter-

While the classical Paschen curve has a right branch with the breakdown voltage decreasing as *pd* decreases, a characteristic minimum, and a left branch with the breakdown voltage increasing as *pd* decreases, research has shown that the left branch continues to decrease nearly linearly with *d*, that is, in microscale gaps, *pd* scaling fails. Early experiments noted that reducing gap sizes to microscale at atmospheric pressure led to deviations in the traditional breakdown mechanism driven by Townsend avalanche and represented mathematically by Paschen's law (PL) [30]. Departing from the traditional PL, the breakdown voltage would undergo a plateau when the gap width is smaller than ~10 μm and then continue to decrease with the gap width. The gap widths for the transition processes vary with the experimental conditions, such as electrode materials, electrode geometry, applied

Since the derivation of Paschen's law in the microscale regime was discovered in 1950s, a large number of research work has been dedicated to modification of the classical Paschen's law, from experimental investigation [31, 32] to numerical

**30**

simulation [33, 34], from atmosphere environment [35] to vacuum [36, 37]. Torres et al. and Slade et al. carried out a series of experimental investigations on microgap breakdown in air and vacuum, respectively. They both found out the plateau stage in the modified Paschen's law and the transition point of gap widths was 4 μm. Besides the numerical simulation, analytic and theoretical calculations have been also carried out. Go [38], Klas [39, 40], Buendia [41], and Loveless [42] calculated the breakdown thresholds at microscale coupling with field emission and Townsend avalanche, considering the ion-enhance field emission, where the electron collision ionization coefficient α and the secondary electron emission coefficient γ dictate the breakdown process, where the secondary electron emission coefficient γ would be enhanced by the space charge accumulation and the cathode charge production through secondary emission. Therefore, the investigation of electrical breakdown behaviors at microscale, including the methodology, fundamental properties, influencing factors, and physical mechanisms, is urgently demanded, which is of critical importance not only for the plasma physics community but also for micro-/ nanoelectronic industries.

#### **1.3 The main chapter content**

This chapter summarizes the state-of-the-art methodologies, influencing factors, dynamics, and physical mechanisms of the electrical breakdown in microscale based on the research work in the last two decades.

Section 2 summarizes the methodology for investigating the electrical breakdown in microgaps. Section 3 summarizes the influencing factors of the electrical breakdown in microgaps. Section 4 and 5 summarize the dynamic process and physical mechanism of the electrical breakdown in microgaps. Summary and outlook are provided in Section 6.

### **2. Methodology**

Different from the routine gas breakdown experiments in large gaps (>0.1 mm), the electrical breakdown experiments in microgaps (<0.1 mm) require a much better spatial resolution in terms of both observation and gap adjustment. Accordingly, the methodology is very diverse, including the macro electrode structure prepared by the mechanical technique, the planar electrode structure and MEMS device structure prepared by the microfabrication technique, and the microelectrode structure prepared by the electrochemical etching technique. Moreover, the in-situ electro-optical measurement technique has also been proposed for exploring the breakdown dynamic process at microscale. In this chapter, various experimental methods are discussed and summarized.

#### **2.1 The macroelectrode structure**

At the initial stage, the study was basically conducted with the macroelectrode structure and experimental setup similar to that at macroscale. **Figure 1a** shows the schematic diagram of a typical macro electrode-based experimental setup and (b) shows the picture of a spherical electrode-based experimental setup used in the literature. The electrode size is in the order of millimeters in radius, which could be fabricated by mechanical machining. One electrode is fixed with the base (also known as static electrode) and the other is movable with the screw micrometer or stepping motor (also known as movable electrode). Both electrodes are required to be aligned on a straight line to ensure the consistence of the discharge experiments.

#### **Figure 1.**

*(a) Schematic diagram of macroelectrode-based experimental setup. The gap distance is controlled and adjusted by the screw micrometer or stepping motor [43]; (b) the picture of two spherical electrode experimental setup for vacuum breakdown test [44].*

Therefore, the gap distance could be controlled by adjusting the screw micrometer or stepping motor, with an accuracy of 2 μm. Therefore, this method applies for the electrical breakdown in microgaps ranging from 5 to 500 μm.

#### **2.2 The planar electrode structure**

The emerging of microelectronic devices drew intensive attention to the electrical reliability issues, and thus, the planar electrode structure was proposed. Through the standard fabrication process, such as oxidation, lithography, deposition, etching, etc., the planar metal electrode (aluminum, copper, gold, and platinum) is patterned on the silicon dioxide/silicon substrate with a thickness of several hundreds of nanometers and a gap distance ranging from several nanometers to micrometers.

(a) shows the typical planar electrode-based experimental setup. The semicircular type electrode pattern was fabricated on the substrates and the electrical breakdown experiments could be conducted between microgaps. In addition, the suspended planar electrode was also proposed by sacrificing layer process as shown in **Figure 2b**, in which electrical breakdown properties of MEMS devices (such as MEMS switches and MEMS motors) could be investigated. Therefore, this method is dedicated to the study of device reliability issues with typical and simple structures.

#### **2.3 The MEMS device structure**

Apart from the typical simplified electrode structures above, lots of research work has also focused on the breakdown characterization and reliability assessment of real device structures under ESD impact, especially for those devices that require electrostatic actuation (i.e., RF MEMS switch, micro-motor, and micro-mirror) or are very susceptible to static charge accumulation (i.e., photomask). **Figure 3** shows the pictures of different RF MEMS devices for ESD impact testing, which are gold-based capacitive (a) and ohmic (b–d) RF-MEMS switches with vertical air-gap structure from 1.0 to 4.5 μm and lateral air-gap structure of 6.7 μm. For this

**33**

**Figure 4.**

*reticle with 4 μm gap [7].*

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

*(b) suspended semicircular type electrode [46].*

**Figure 2.**

**Figure 3.**

configuration, the breakdown may occur across the micron air gaps of RF MEMS

*Schematic diagram of planar electrode-based experimental setup: (a) semicircular type electrode [45] and* 

**Figure 4a** shows the SEM image of a torsional ratcheting actuator (TRA) in which the ratchet gear and curved comb fingers are used for electrostatic actuation and (b) shows the optical image of metal-air-metal device on reticle with 4 μm gap,

*(a) SEM image of a torsional ratcheting actuator (TRA). The inset shows an enlarged view of the ratchet gear and curved comb fingers used for electrostatic actuation [15]; (b) optical image of metal-air-metal device on* 

switches and result in permanent physical damage on the devices.

*Tested devices were gold-based (a) capacitive and (b–d) ohmic RF-MEMS switches [10].*

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

#### **Figure 2.**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

Therefore, the gap distance could be controlled by adjusting the screw micrometer or stepping motor, with an accuracy of 2 μm. Therefore, this method applies for the

*(a) Schematic diagram of macroelectrode-based experimental setup. The gap distance is controlled and adjusted by the screw micrometer or stepping motor [43]; (b) the picture of two spherical electrode* 

The emerging of microelectronic devices drew intensive attention to the electrical reliability issues, and thus, the planar electrode structure was proposed. Through the standard fabrication process, such as oxidation, lithography, deposition, etching, etc., the planar metal electrode (aluminum, copper, gold, and platinum) is patterned on the silicon dioxide/silicon substrate with a thickness of several hundreds of nanometers and a gap distance ranging from several

(a) shows the typical planar electrode-based experimental setup. The semicircular type electrode pattern was fabricated on the substrates and the electrical breakdown experiments could be conducted between microgaps. In addition, the suspended planar electrode was also proposed by sacrificing layer process as shown in **Figure 2b**, in which electrical breakdown properties of MEMS devices (such as MEMS switches and MEMS motors) could be investigated. Therefore, this method is dedicated to the study of device reliability issues with typical and simple structures.

Apart from the typical simplified electrode structures above, lots of research work has also focused on the breakdown characterization and reliability assessment of real device structures under ESD impact, especially for those devices that require electrostatic actuation (i.e., RF MEMS switch, micro-motor, and micro-mirror) or are very susceptible to static charge accumulation (i.e., photomask). **Figure 3** shows the pictures of different RF MEMS devices for ESD impact testing, which are gold-based capacitive (a) and ohmic (b–d) RF-MEMS switches with vertical air-gap structure from 1.0 to 4.5 μm and lateral air-gap structure of 6.7 μm. For this

electrical breakdown in microgaps ranging from 5 to 500 μm.

**2.2 The planar electrode structure**

*experimental setup for vacuum breakdown test [44].*

**Figure 1.**

nanometers to micrometers.

**2.3 The MEMS device structure**

**32**

*Schematic diagram of planar electrode-based experimental setup: (a) semicircular type electrode [45] and (b) suspended semicircular type electrode [46].*

**Figure 3.** *Tested devices were gold-based (a) capacitive and (b–d) ohmic RF-MEMS switches [10].*

configuration, the breakdown may occur across the micron air gaps of RF MEMS switches and result in permanent physical damage on the devices.

**Figure 4a** shows the SEM image of a torsional ratcheting actuator (TRA) in which the ratchet gear and curved comb fingers are used for electrostatic actuation and (b) shows the optical image of metal-air-metal device on reticle with 4 μm gap,

#### **Figure 4.**

*(a) SEM image of a torsional ratcheting actuator (TRA). The inset shows an enlarged view of the ratchet gear and curved comb fingers used for electrostatic actuation [15]; (b) optical image of metal-air-metal device on reticle with 4 μm gap [7].*

which has been developed to check the ESD threat to reticles in a photolithography bay. For this configuration, the breakdown may occur across the surface of the airgap structure and result in permanent physical damage on the devices.

#### **2.4 The microelectrode structure**

While the planar electrode and MEMS device structure are employed to explore the electrical reliability of microelectronic devices, the intrinsic properties of electrical breakdown in microgaps require microelectrodes with precisely controllable morphology and geometry, which were proposed and fabricated by combining the electrochemical etching and Joule melting method [47]. **Figure 5** shows the microelectrode structure-based experimental setup, of which the hemisphere electrodes were made of tungsten, and the radius of the electrodes ranged from 50 nm to 200 μm. The hemisphere electrodes have a regular and contaminant-free surface. The three-dimensional piezoelectric displacement could align the electrode pair with the aid of an optical microscope, allowing precise gap adjustment from 1 to 25 μm with an uncertainty of ±100 nm.

#### **2.5 The in-situ electro-optical experimental setup**

Basically, the fundamental properties and influencing factors of the electrical breakdown in microgaps could be obtained by measuring the electrical parameters; however, to further understand the dynamics and physical mechanism, additional physical parameters during the breakdown are required. Monitoring the optical properties of the breakdown dynamic process is the primary way, which may need to satisfy two requirements simultaneously: (1) how to observe the breakdown channel at microscale and (2) how to capture the breakdown appearance in nanoseconds.

**Figure 6** shows the electro-optical measurement setup that can simultaneously fulfill these requirements. The system consists of a nanosecond pulse generation unit, a synchronous and delay triggering unit, an in-situ optical imaging unit, and an electrical parameter measurement unit. The nanosecond pulse generation unit can provide amplitude-adjustable pulses up to 5 kV. The synchronous and delay triggering unit is achieved by a dual-channel function signal generator which can adjust the relative time delay between the two TTL triggering signals and ensure the synchronism of the test. The in-situ optical imaging unit integrates the optical microscope for micron-scale spatial resolution (1 μm) and the high-speed gated ICCD camera for nanosecond-scale temporal resolution (2 ns). The breakdown current and voltage are measured by a current coil (1 A/V) and a voltage attenuator (100:1), and then recorded by a digital oscilloscope. This system allows temporal

#### **Figure 5.**

*Schematic diagram of sphere-to-sphere microelectrode-based experimental setup: (a) 10×, (b) 50×, and (c) 1000× magnification [48].*

**35**

**Figure 6.**

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

and spatial-resolved optical measurement and images the discharge appearance of pulse breakdown across microgaps, which will be a promising method to further explore the underlying principle of gas breakdown at microscale and evaluate the

As the gap size decreases, the classical Paschen's law demonstrates a significant derivation at microscale which implies the different physical mechanisms from Townsend avalanche breakdown. Since a lot of influencing factors could affect the electrical breakdown, this section gives some of the influencing factors such as the gap widths, the atmospheric pressures, and the applied voltages. These results determine quantitative relationships between the breakdown and the factors, and

**Figure 7** shows the breakdown thresholds as a function of gap width in atmospheric air (101 kPa) at room temperature (298.15 K). The electrode configuration is hemisphere-hemisphere with gap widths from 1 to 25 μm. For gap widths <5 μm, the breakdown voltage decreases with decreasing gap width. For gap widths between 5 and 10 μm, the breakdown voltages almost remain constant at about 490V regardless of the gap width, demonstrating a "plateau" stage. Although numerous microscale breakdown studies have noted this plateau [50], a strong hypothesis has not yet been developed. For gap widths larger than 10 μm, breakdown voltage increases dramatically with increasing gap width, indicating the increasing importance of Townsend avalanche. It can be noted that the breakdown voltage is 386 V when the gap width is 1 μm and the breakdown voltage is 842 V when the gap width is 25 μm. As the gap width shrinks to several micrometers, the

insulation performance in micro-/nanoelectronics.

*Schematic diagram of in-situ electro-optical measurement system [48, 49].*

**3.1 The effect of the gap widths**

**3. Influencing factors of electrical breakdown in microgaps**

thus provide an overall picture of the electrical breakdown in microgaps.

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

gap structure and result in permanent physical damage on the devices.

**2.4 The microelectrode structure**

to 25 μm with an uncertainty of ±100 nm.

nanoseconds.

**2.5 The in-situ electro-optical experimental setup**

which has been developed to check the ESD threat to reticles in a photolithography bay. For this configuration, the breakdown may occur across the surface of the air-

While the planar electrode and MEMS device structure are employed to explore

Basically, the fundamental properties and influencing factors of the electrical breakdown in microgaps could be obtained by measuring the electrical parameters; however, to further understand the dynamics and physical mechanism, additional physical parameters during the breakdown are required. Monitoring the optical properties of the breakdown dynamic process is the primary way, which may need to satisfy two requirements simultaneously: (1) how to observe the breakdown channel at microscale and (2) how to capture the breakdown appearance in

**Figure 6** shows the electro-optical measurement setup that can simultaneously fulfill these requirements. The system consists of a nanosecond pulse generation unit, a synchronous and delay triggering unit, an in-situ optical imaging unit, and an electrical parameter measurement unit. The nanosecond pulse generation unit can provide amplitude-adjustable pulses up to 5 kV. The synchronous and delay triggering unit is achieved by a dual-channel function signal generator which can adjust the relative time delay between the two TTL triggering signals and ensure the synchronism of the test. The in-situ optical imaging unit integrates the optical microscope for micron-scale spatial resolution (1 μm) and the high-speed gated ICCD camera for nanosecond-scale temporal resolution (2 ns). The breakdown current and voltage are measured by a current coil (1 A/V) and a voltage attenuator (100:1), and then recorded by a digital oscilloscope. This system allows temporal

*Schematic diagram of sphere-to-sphere microelectrode-based experimental setup: (a) 10×, (b) 50×, and* 

the electrical reliability of microelectronic devices, the intrinsic properties of electrical breakdown in microgaps require microelectrodes with precisely controllable morphology and geometry, which were proposed and fabricated by combining the electrochemical etching and Joule melting method [47]. **Figure 5** shows the microelectrode structure-based experimental setup, of which the hemisphere electrodes were made of tungsten, and the radius of the electrodes ranged from 50 nm to 200 μm. The hemisphere electrodes have a regular and contaminant-free surface. The three-dimensional piezoelectric displacement could align the electrode pair with the aid of an optical microscope, allowing precise gap adjustment from 1

**34**

**Figure 5.**

*(c) 1000× magnification [48].*

**Figure 6.** *Schematic diagram of in-situ electro-optical measurement system [48, 49].*

and spatial-resolved optical measurement and images the discharge appearance of pulse breakdown across microgaps, which will be a promising method to further explore the underlying principle of gas breakdown at microscale and evaluate the insulation performance in micro-/nanoelectronics.

### **3. Influencing factors of electrical breakdown in microgaps**

As the gap size decreases, the classical Paschen's law demonstrates a significant derivation at microscale which implies the different physical mechanisms from Townsend avalanche breakdown. Since a lot of influencing factors could affect the electrical breakdown, this section gives some of the influencing factors such as the gap widths, the atmospheric pressures, and the applied voltages. These results determine quantitative relationships between the breakdown and the factors, and thus provide an overall picture of the electrical breakdown in microgaps.

#### **3.1 The effect of the gap widths**

**Figure 7** shows the breakdown thresholds as a function of gap width in atmospheric air (101 kPa) at room temperature (298.15 K). The electrode configuration is hemisphere-hemisphere with gap widths from 1 to 25 μm. For gap widths <5 μm, the breakdown voltage decreases with decreasing gap width. For gap widths between 5 and 10 μm, the breakdown voltages almost remain constant at about 490V regardless of the gap width, demonstrating a "plateau" stage. Although numerous microscale breakdown studies have noted this plateau [50], a strong hypothesis has not yet been developed. For gap widths larger than 10 μm, breakdown voltage increases dramatically with increasing gap width, indicating the increasing importance of Townsend avalanche. It can be noted that the breakdown voltage is 386 V when the gap width is 1 μm and the breakdown voltage is 842 V when the gap width is 25 μm. As the gap width shrinks to several micrometers, the

#### **Figure 7.**

*Measured breakdown voltage and electric field as a function of gap widths, the error bars represent the standard deviation of the measured breakdown voltage.*

number of gas molecules inside the gap would be not enough for impact ionization, thus higher field strength is demanded for electron avalanche. When the gap width is reduced to <5 μm, the electric field strength is calculated to be ~108 V/m, which has reached the threshold of field electron emission from the electrode surface. The obvious transition in the curves can be noticed and the cathode field emission plays a dominant role in the generation of free electrons.

#### **3.2 The effect of applied voltages**

**Figure 8** shows the breakdown thresholds as a function of applied voltages in atmospheric air (760 Torr) and room temperature (298.15 K), the electrode configuration is hemisphere-hemisphere type with various gap widths from 1 to 25 μm, and

**Figure 8.** *Breakdown thresholds as a function of gap widths under nanosecond pulsed voltage and DC voltage.*

**37**

following equation.

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

the error bars in all these figures show the standard deviation above and below the mean value of measurement. The results of pulsed breakdown [51] and DC breakdown [32] are plotted for comparisons. Generally, the nanosecond pulsed breakdown thresholds are at least two or three times higher than DC breakdown [52]; however, an interesting phenomenon can be observed from **Figure 8** when the gap width is scaled down to 15 μm. It can be seen that, overall, Actually, a lot of numerical under nanosecond pulsed voltage (blue solid square) shows a similar trend and amplitude to those under DC voltage (black solid square). For a 15-μm gap, the pulsed breakdown voltage is 639 V while the DC breakdown voltage is 571 V. For a 5-μm gap, the pulsed breakdown voltage is 450 V while the DC breakdown voltage is 499 V. More specifically, it can be noted that there is also a "plateau" stage between 5 and 10 μm, with a constant breakdown voltage of about 490 V, which is considered to be the transition region from Townsend avalanche to ion-enhanced field emission. When the gap width is <5 μm, the breakdown voltage decreases with the decrease of gap width, demonstrating a good consistence with the DC breakdown voltage (*U*pulsed = 432 V ≈ *U*DC = 435 V for the 3-μm gap). Meanwhile, the pulsed breakdown voltage is found to have a power law dependence on the gap width through conducting the fitting analysis: *U* = 396 × *b*0.14, where *U* is the breakdown voltage in Volt, *b* is the gap width in micrometer and the Adj. R-Square is 0.99195. That is in good agreement with the vacuum breakdown behaviors proposed by Staprans in 1966 [53, 54], implying that while the gap width is reduced to 5 μm, the pulsed breakdown in air might be similar to the vacuum breakdown. So as the gap width shrinks to several micrometers, the number of gas molecules inside the gap would be not enough for the collision ionization, and thus, higher field strength is demanded for electron avalanche. When the gap width is reduced to <5 μm, the electric field strength is calculated to be 108 V/m, which has reached the threshold of field electron emission from the electrode surface. The obvious transition in the curves can be noticed and the cathode field emission is believed

to play a dominant role in the generation of free electrons.

DC breakdown values as mentioned above.

**3.3 The effect of atmospheric pressures**

*λ<sup>e</sup>*

as the gas molecule, the mean free path of an electron *λ<sup>e</sup>*

However, as the gap width continues to increase from 15 μm, it is noteworthy that pulsed breakdown demonstrates larger thresholds, and furthermore exhibits a linear increase with a positive slope of 21.5 compared to the positive slope of 8.4 for the DC breakdown voltages, which indicates that the duration of applied voltage determines the amplitude of breakdown voltage [55], that is, the breakdown under the nanosecond pulse would be much more difficult to breakdown than the DC voltage, and thus, it could be expected to become two or three times larger than the

**Figure 9** shows the breakdown thresholds as a function of atmospheric pressures

´ = \_\_\_\_\_\_\_\_\_\_ *KB* · *<sup>T</sup> π*( \_\_\_\_\_ *dm* + *de* <sup>2</sup> ) 2 · *p*

´ can be derived from the

(2)

[56], the squares represent the breakdown thresholds at a pressure of 760 Torr, the circles represent the breakdown thresholds at a pressure of 375 Torr, and the triangles represent the breakdown thresholds at a pressure of 23 Torr. The electrode configuration is hemisphere-hemisphere type with various gap widths from 1 to 25 μm. Apparently, the curves demonstrate a similar trend; however, the breakdown voltages are almost the same when the gap width is <5 μm. Considering an electron

#### *Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

number of gas molecules inside the gap would be not enough for impact ionization, thus higher field strength is demanded for electron avalanche. When the gap width

*Measured breakdown voltage and electric field as a function of gap widths, the error bars represent the* 

has reached the threshold of field electron emission from the electrode surface. The obvious transition in the curves can be noticed and the cathode field emission plays

**Figure 8** shows the breakdown thresholds as a function of applied voltages in atmospheric air (760 Torr) and room temperature (298.15 K), the electrode configuration is hemisphere-hemisphere type with various gap widths from 1 to 25 μm, and

*Breakdown thresholds as a function of gap widths under nanosecond pulsed voltage and DC voltage.*

V/m, which

is reduced to <5 μm, the electric field strength is calculated to be ~108

a dominant role in the generation of free electrons.

*standard deviation of the measured breakdown voltage.*

**3.2 The effect of applied voltages**

**Figure 7.**

**36**

**Figure 8.**

the error bars in all these figures show the standard deviation above and below the mean value of measurement. The results of pulsed breakdown [51] and DC breakdown [32] are plotted for comparisons. Generally, the nanosecond pulsed breakdown thresholds are at least two or three times higher than DC breakdown [52]; however, an interesting phenomenon can be observed from **Figure 8** when the gap width is scaled down to 15 μm. It can be seen that, overall, Actually, a lot of numerical under nanosecond pulsed voltage (blue solid square) shows a similar trend and amplitude to those under DC voltage (black solid square). For a 15-μm gap, the pulsed breakdown voltage is 639 V while the DC breakdown voltage is 571 V. For a 5-μm gap, the pulsed breakdown voltage is 450 V while the DC breakdown voltage is 499 V. More specifically, it can be noted that there is also a "plateau" stage between 5 and 10 μm, with a constant breakdown voltage of about 490 V, which is considered to be the transition region from Townsend avalanche to ion-enhanced field emission.

When the gap width is <5 μm, the breakdown voltage decreases with the decrease of gap width, demonstrating a good consistence with the DC breakdown voltage (*U*pulsed = 432 V ≈ *U*DC = 435 V for the 3-μm gap). Meanwhile, the pulsed breakdown voltage is found to have a power law dependence on the gap width through conducting the fitting analysis: *U* = 396 × *b*0.14, where *U* is the breakdown voltage in Volt, *b* is the gap width in micrometer and the Adj. R-Square is 0.99195. That is in good agreement with the vacuum breakdown behaviors proposed by Staprans in 1966 [53, 54], implying that while the gap width is reduced to 5 μm, the pulsed breakdown in air might be similar to the vacuum breakdown. So as the gap width shrinks to several micrometers, the number of gas molecules inside the gap would be not enough for the collision ionization, and thus, higher field strength is demanded for electron avalanche. When the gap width is reduced to <5 μm, the electric field strength is calculated to be 108 V/m, which has reached the threshold of field electron emission from the electrode surface. The obvious transition in the curves can be noticed and the cathode field emission is believed to play a dominant role in the generation of free electrons.

However, as the gap width continues to increase from 15 μm, it is noteworthy that pulsed breakdown demonstrates larger thresholds, and furthermore exhibits a linear increase with a positive slope of 21.5 compared to the positive slope of 8.4 for the DC breakdown voltages, which indicates that the duration of applied voltage determines the amplitude of breakdown voltage [55], that is, the breakdown under the nanosecond pulse would be much more difficult to breakdown than the DC voltage, and thus, it could be expected to become two or three times larger than the DC breakdown values as mentioned above.

#### **3.3 The effect of atmospheric pressures**

**Figure 9** shows the breakdown thresholds as a function of atmospheric pressures [56], the squares represent the breakdown thresholds at a pressure of 760 Torr, the circles represent the breakdown thresholds at a pressure of 375 Torr, and the triangles represent the breakdown thresholds at a pressure of 23 Torr. The electrode configuration is hemisphere-hemisphere type with various gap widths from 1 to 25 μm. Apparently, the curves demonstrate a similar trend; however, the breakdown voltages are almost the same when the gap width is <5 μm. Considering an electron as the gas molecule, the mean free path of an electron *λ<sup>e</sup>* ´ can be derived from the following equation.

$$\dot{\lambda}\_e = \frac{K\_B \cdot T}{\pi \left(\frac{d\_m \ast d\_e}{2}\right)^2 \cdot p} \tag{2}$$

#### **Figure 9.** *Breakdown voltages as a function of gas pressure at different pressures.*

where *KB* is the Boltzmann constant (1.38 × 10<sup>−</sup>23 J/K), *T* is the ambient temperature in Kelvins, *dm* is the atom or molecular diameter in meter, *d*e is the electron diameter in meter, and *p* is the atmospheric pressure in Pascal. Since *d*<sup>e</sup> is 5.62 × 10<sup>−</sup>15 m which is <1/1000 of the proton diameter, the collision between electrons could be neglected, so the mean free path of an electron could be defined to be the average distance the electron travels between successive collisions with the gas atom or molecule, that is, *<sup>λ</sup><sup>e</sup>* ´ <sup>=</sup> \_\_\_\_\_\_\_\_\_ *KB* · *<sup>T</sup>* π( \_\_\_ *dm*2 ) 2 ·*<sup>p</sup>* , which is inversely proportional to the square of the gas molecule diameter [57]. According to Eq. (2), when the gas pressure is 760, 375, and 23 Torr, the mean free path of an electron in air is calculated to be 539 nm, 1.1 μm, and 18 μm, respectively, which are either much smaller or comparable with the gap length (5 μm), so the moving electrons can seldom collide with the gas molecules in the gap space and the number of collisions is so small that no considerable electrons and ions could be produced, in other words, the gaseous gap is almost equivalent to vacuum gap at this scale. As the gap width increases, sufficient and more collision ionization can take place at 760 Torr than those at 23 and 375 Torr due to larger propagation distances (>5 μm), which result in the significant difference between the breakdown thresholds. This implies that the role of gas molecule density or atmospheric pressure inside the gap could be eliminated when the gap width is <5 μm but will greatly affect the breakdown process in larger gaps. However, it also demonstrates a different trend that the breakdown thresholds at 375 Torr are larger than those at 23 Torr, which will be further investigated in the future study.

#### **4. The dynamics of electrical breakdown in microgaps**

Except for the fundamental properties of electrical breakdown in microgaps, the breakdown evolution process was also investigated for further understanding the dynamics properties, with the aid of the in-situ electro-optical measurement system introduced in Section 2.5. This section provides the temporal evolution of gas breakdown which exhibits various breakdown channel morphologies and transitions dependent upon the gap width, and highlights the breakdown dynamics in microgaps.

**39**

**Figure 10.**

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

**Figure 10** shows the breakdown morphology and discharge paths for various gap widths ranging from 1 to 20 μm. The sphere-sphere electrodes are employed in the atmospheric air environment, and the triggering time of the ICCD shutter is 10 μs prior to the breakdown moment with an exposure time of 200 ms, which guarantees that the entire breakdown process could be captured and recorded within one shot. It can be seen from **Figure 10a**–**c** with a gap width of 20, 15, and 12 μm, that the luminescence fills the entire gap and surroundings, in which an intense light channel can be clearly observed between the electrodes. Typically, the discharge plasma would propagate along the shortest distance between the electrodes, and the spot with maximum electric field strength is at the apex of the sphere electrodes, so the straight line connecting the apexes is considered to be the shortest path for the breakdown, which could be proved by the captured images. However, an interesting phenomenon is observed in **Figure 10d**–**f** with a gap width of 9, 7, and 5 μm, that the intense light channel does not follow the very straight line between the electrodes; on the contrary, it initiates from the cathode apex and propagates along a curved line

*Breakdown morphology at gap widths from 1 to 20 μm. (a–c) show the breakdown propagating along the shortest path with luminescence filling the surrounding area, (d–f) show the roughly constant path lengths regardless of gap width which is consistent with the plateau of breakdown voltage in this region, and (g–i)* 

*indicate no obvious breakdown channel arising at these smallest gap distances [48].*

**4.1 The breakdown paths**

### **4.1 The breakdown paths**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

where *KB* is the Boltzmann constant (1.38 × 10<sup>−</sup>23 J/K), *T* is the ambient temperature in Kelvins, *dm* is the atom or molecular diameter in meter, *d*e is the electron diameter in meter, and *p* is the atmospheric pressure in Pascal. Since *d*<sup>e</sup> is 5.62 × 10<sup>−</sup>15 m which is <1/1000 of the proton diameter, the collision between electrons could be neglected, so the mean free path of an electron could be defined to be the average distance the electron travels between successive collisions with the

760, 375, and 23 Torr, the mean free path of an electron in air is calculated to be 539 nm, 1.1 μm, and 18 μm, respectively, which are either much smaller or comparable with the gap length (5 μm), so the moving electrons can seldom collide with the gas molecules in the gap space and the number of collisions is so small that no considerable electrons and ions could be produced, in other words, the gaseous gap is almost equivalent to vacuum gap at this scale. As the gap width increases, sufficient and more collision ionization can take place at 760 Torr than those at 23 and 375 Torr due to larger propagation distances (>5 μm), which result in the significant difference between the breakdown thresholds. This implies that the role of gas molecule density or atmospheric pressure inside the gap could be eliminated when the gap width is <5 μm but will greatly affect the breakdown process in larger gaps. However, it also demonstrates a different trend that the breakdown thresholds at 375 Torr are larger than those at 23 Torr, which will be further investigated in the

·*<sup>p</sup>* , which is inversely proportional to the square

. According to Eq. (2), when the gas pressure is

π( \_\_\_ *dm* 2 ) 2

[57]

*Breakdown voltages as a function of gas pressure at different pressures.*

**4. The dynamics of electrical breakdown in microgaps**

Except for the fundamental properties of electrical breakdown in microgaps, the breakdown evolution process was also investigated for further understanding the dynamics properties, with the aid of the in-situ electro-optical measurement system introduced in Section 2.5. This section provides the temporal evolution of gas breakdown which exhibits various breakdown channel morphologies and transitions dependent upon the gap width, and highlights the breakdown dynamics in microgaps.

gas atom or molecule, that is, *<sup>λ</sup><sup>e</sup>* ´ <sup>=</sup> \_\_\_\_\_\_\_\_\_ *KB* · *<sup>T</sup>*

of the gas molecule diameter

**38**

future study.

**Figure 9.**

**Figure 10** shows the breakdown morphology and discharge paths for various gap widths ranging from 1 to 20 μm. The sphere-sphere electrodes are employed in the atmospheric air environment, and the triggering time of the ICCD shutter is 10 μs prior to the breakdown moment with an exposure time of 200 ms, which guarantees that the entire breakdown process could be captured and recorded within one shot. It can be seen from **Figure 10a**–**c** with a gap width of 20, 15, and 12 μm, that the luminescence fills the entire gap and surroundings, in which an intense light channel can be clearly observed between the electrodes. Typically, the discharge plasma would propagate along the shortest distance between the electrodes, and the spot with maximum electric field strength is at the apex of the sphere electrodes, so the straight line connecting the apexes is considered to be the shortest path for the breakdown, which could be proved by the captured images. However, an interesting phenomenon is observed in **Figure 10d**–**f** with a gap width of 9, 7, and 5 μm, that the intense light channel does not follow the very straight line between the electrodes; on the contrary, it initiates from the cathode apex and propagates along a curved line

#### **Figure 10.**

*Breakdown morphology at gap widths from 1 to 20 μm. (a–c) show the breakdown propagating along the shortest path with luminescence filling the surrounding area, (d–f) show the roughly constant path lengths regardless of gap width which is consistent with the plateau of breakdown voltage in this region, and (g–i) indicate no obvious breakdown channel arising at these smallest gap distances [48].*

**Figure 11.** *The effective lengths of breakdown path for various gap widths [48].*

to the neighbor region of the anode apex, which is a significant deviation from the theoretical prediction. In **Figure 10g**–**i** with a gap width of 3, 2, and 1 μm, the entire gap is full of luminescence and no obvious breakdown channel could be observed. While a channel may arise for the 2 and 3 μm gaps, it is much fainter compared to overall luminous intensity of the remainder of the diffuse discharge, unlike the noticeably higher intensity channels that connect both electrodes at larger gaps [48].

**Figure 11** shows the effective lengths of breakdown paths in different gaps according to the breakdown channel images in **Figure 10**. It can be noteworthy that the curved path in **Figure 10d**–**f** is almost the same (about 11.7 μm) regardless of the gap widths, which is well consistent with the trend of the breakdown voltages in **Figure 7** and would be a very straight evidence to explain the "plateau" stage from 5 to 10 μm. That is, the consistency between the plateau in breakdown voltage and the constant breakdown path length for gap widths ranging from 5 to 10 μm is critical for understanding the transition in breakdown mechanism both experimentally and theoretically. It implies that the extension of breakdown path provides more collision ionization and electron avalanches for the breakdown which means that the ion-enhanced field emission must play an important role in breakdown rather than the Townsend avalanche alone, thus resulting in the "plateau" stage. Therefore, this evidence directly shows the transition from Townsend avalanche to ion-enhanced field emission, in which the field emission begins to dominate over Townsend avalanche for gaps smaller than ~10 μm and Townsend avalanche becomes continuously less important for smaller gaps, and finally, the field emission will dominate the breakdown for gaps shorter than 5 μm [48].

#### **5. The physical mechanism of electrical breakdown in microgaps**

Based on the captured breakdown morphology across various microgaps, the physical mechanisms could be summarized as follows:

a.When the gap width *d* is larger than 10 μm, the breakdown threshold is expressed as a function of the product gas pressure *p* and gap width *d*, and the

**41**

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

*(a) d > 10 μm, (b) d = 5–10 μm, and (c) d = 1–5 μm [48].*

electric field (~108

**Figure 12.**

**6. Summary and outlook**

Townsend avalanche is considered to be the dominant mechanism. The breakdown demonstrates a clear electron avalanche plasma trajectory connecting the

b.When the gap width *d* lies between 10 and 5 μm, Townsend avalanche still plays a role in breakdown but the contribution of ion enhanced field emission becomes more important. In this regime, a plateau can be observed indicating that the breakdown thresholds almost remain invariant as the decease of the gap width, which shows the transient from Townsend avalanche to the field emission process. Although the gap length is not long enough for the collision ionization, the initial electron avalanche is generated in the vicinity of the cathode and propagates along a curved path following the electric field lines. This could extend the effective propagation width and then may increase the collision ionization probability and frequency. The successive electron avalanches would be produced and may ultimately contribute to inducing breakdown, as shown in **Figure 12b**.

cathode tip and the anode tip by a straight path, as shown in **Figure 12a**.

*The physical process unifying Townsend avalanche and field emission for microscale breakdown for* 

c.When the gap width *d* is smaller than 5 μm, the breakdown threshold demonstrates a linear relationship with the gap width. In this regime, a high

nated mechanism for gap width <5 μm, as shown in **Figure 12c**.

This chapter provides a general review of the electrical breakdown in microgaps, including the methodology, influencing factors, dynamics, and physical mechanism. The breakdown thresholds in various conditions and the transition from Townsend avalanche to field emission-driven breakdown were demonstrated, which would be vital to the electrical breakdown theory at microscale. Meanwhile, understanding the fundamental mechanism of gas breakdown at microscale will have far reaching impact on practical devices due to the numerous applications that

and electrons would be emitted into the gap, so the initial electron avalanche can be generated around the cathode tip. Since the electron mean free path is comparable to the gap length, the emitted electrons would drift toward the anode and collide with the anode directly, resulting in the heating and release of anode and cathode materials due to the Nottingham effect. Then the thermal electron emission would turn on and more electrons would be generated by the combination of field emission and thermal emission. The outgas and atoms would fill the gap, and finally breakdown would occur with a steep decline of predicted voltage thresholds, which indicates that field emission is the domi-

V/m) would reduce the potential barrier of the cathode

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

**Figure 12.**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

to the neighbor region of the anode apex, which is a significant deviation from the theoretical prediction. In **Figure 10g**–**i** with a gap width of 3, 2, and 1 μm, the entire gap is full of luminescence and no obvious breakdown channel could be observed. While a channel may arise for the 2 and 3 μm gaps, it is much fainter compared to overall luminous intensity of the remainder of the diffuse discharge, unlike the noticeably higher intensity channels that connect both electrodes at larger gaps [48]. **Figure 11** shows the effective lengths of breakdown paths in different gaps according to the breakdown channel images in **Figure 10**. It can be noteworthy that the curved path in **Figure 10d**–**f** is almost the same (about 11.7 μm) regardless of the gap widths, which is well consistent with the trend of the breakdown voltages in **Figure 7** and would be a very straight evidence to explain the "plateau" stage from 5 to 10 μm. That is, the consistency between the plateau in breakdown voltage and the constant breakdown path length for gap widths ranging from 5 to 10 μm is critical for understanding the transition in breakdown mechanism both experimentally and theoretically. It implies that the extension of breakdown path provides more collision ionization and electron avalanches for the breakdown which means that the ion-enhanced field emission must play an important role in breakdown rather than the Townsend avalanche alone, thus resulting in the "plateau" stage. Therefore, this evidence directly shows the transition from Townsend avalanche to ion-enhanced field emission, in which the field emission begins to dominate over Townsend avalanche for gaps smaller than ~10 μm and Townsend avalanche becomes continuously less important for smaller gaps, and finally, the field emission will dominate the breakdown for gaps shorter than 5 μm [48].

*The effective lengths of breakdown path for various gap widths [48].*

**5. The physical mechanism of electrical breakdown in microgaps**

physical mechanisms could be summarized as follows:

Based on the captured breakdown morphology across various microgaps, the

expressed as a function of the product gas pressure *p* and gap width *d*, and the

a.When the gap width *d* is larger than 10 μm, the breakdown threshold is

**40**

**Figure 11.**

*The physical process unifying Townsend avalanche and field emission for microscale breakdown for (a) d > 10 μm, (b) d = 5–10 μm, and (c) d = 1–5 μm [48].*

Townsend avalanche is considered to be the dominant mechanism. The breakdown demonstrates a clear electron avalanche plasma trajectory connecting the cathode tip and the anode tip by a straight path, as shown in **Figure 12a**.


#### **6. Summary and outlook**

This chapter provides a general review of the electrical breakdown in microgaps, including the methodology, influencing factors, dynamics, and physical mechanism. The breakdown thresholds in various conditions and the transition from Townsend avalanche to field emission-driven breakdown were demonstrated, which would be vital to the electrical breakdown theory at microscale. Meanwhile, understanding the fundamental mechanism of gas breakdown at microscale will have far reaching impact on practical devices due to the numerous applications that leverage microplasmas [21], including excimer lamps with emissions in the VUV [58], ozone generators [59], arrays for flat panel light sources [60], nanoparticle synthesis [61], medicine [62], environmental remediation [63], detectors [64, 65], microthrusters [66], and combustion [67]. While a lot of numerical calculation work devoted to this subject could be found in somewhere else, this chapter focuses on the experimental investigations of breakdown behaviors in microgaps, which helps to pave the way for insulation design and discharge applications at small scales.

As the miniaturization trend of devices and equipment continues along with the great demand in civil and military industries, the electrostatic sensitivity increases accordingly, leading to a new failure mechanism [26]. When the physical size downscales to nanoscale and molecular scale, the quantum effect, space charge effect, and other effects should be considered, and this will also require novel experimental techniques that can obtain more physical parameters during the breakdown process. Therefore, with advanced experimental techniques, more and more explorations in breakdown behaviors at microscale, nanoscale, and molecular scale will surely be carried out, and new physical mechanisms will be put forward in the future.

#### **Acknowledgements**

This chapter was supported by the National Natural Science Foundation of China (Grant No. 51607138, 51521065), the Fundamental Research Funds for the Central Universities (Grant No. xzy012019030), and China Postdoctoral Science Foundation (Grant No. 2016M602820).

#### **Conflict of interest**

The authors declare that there is no conflict of interest regarding the publication of this chapter.

#### **Author details**

Guodong Meng\* and Yonghong Cheng Xi'an Jiaotong University, Xi'an, China

\*Address all correspondence to: gdmengxjtu@xjtu.edu.cn

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/ by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

**43**

10.1109/20.908596

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

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**References**

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

#### **References**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

leverage microplasmas [21], including excimer lamps with emissions in the VUV [58], ozone generators [59], arrays for flat panel light sources [60], nanoparticle synthesis [61], medicine [62], environmental remediation [63], detectors [64, 65], microthrusters [66], and combustion [67]. While a lot of numerical calculation work devoted to this subject could be found in somewhere else, this chapter focuses on the experimental investigations of breakdown behaviors in microgaps, which helps to pave the way for insulation design and discharge applications at small

As the miniaturization trend of devices and equipment continues along with the great demand in civil and military industries, the electrostatic sensitivity increases accordingly, leading to a new failure mechanism [26]. When the physical size downscales to nanoscale and molecular scale, the quantum effect, space charge effect, and other effects should be considered, and this will also require novel experimental techniques that can obtain more physical parameters during the breakdown process. Therefore, with advanced experimental techniques, more and more explorations in breakdown behaviors at microscale, nanoscale, and molecular scale will surely be carried out, and new physical mechanisms will be put forward

This chapter was supported by the National Natural Science Foundation of China (Grant No. 51607138, 51521065), the Fundamental Research Funds for the Central Universities (Grant No. xzy012019030), and China Postdoctoral Science

The authors declare that there is no conflict of interest regarding the publication

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/ by/3.0), which permits unrestricted use, distribution, and reproduction in any medium,

**42**

scales.

in the future.

**Acknowledgements**

**Conflict of interest**

of this chapter.

**Author details**

Foundation (Grant No. 2016M602820).

Guodong Meng\* and Yonghong Cheng Xi'an Jiaotong University, Xi'an, China

provided the original work is properly cited.

\*Address all correspondence to: gdmengxjtu@xjtu.edu.cn

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[28] Voldman SH. ESD: Failure Mechanisms and Models. Chichester: John Wiley & Sons; 2009. DOI:10.1002/9780470747254

[29] Paschen F. On sparking over in air, hydrogen, carbon dioxide under the potentials corresponding to various pressures. Wiedemann Annalen der Physik und Chemie. 1889;**37**:69-96

[30] Boyle W, Kisliuk P. Departure from Paschen's law of breakdown in gases. Physical Review. 1955;**97**(2):255-259. DOI: 10.1103/PhysRev.97.255

[31] Iwabuchi H, Morimoto T, Matsuoka S, Kumada A, Hidaka K. Pre-breakdown phenomenon in micrometer-scale gap. In: 31st ICPIG; 2013

[32] Radmilović-Radjenović M, Matejčik Š, Klas M, Radjenović B. The role of the field emission effect in direct-current argon discharges for the gaps ranging from 1 to 100 μm. Journal of Physics D: Applied Physics. 2012;**46**(1):015302. DOI: 10.1088/0022-3727/46/1/015302

**45**

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[41] Buendia JA, Venkattraman A.

[42] Loveless AM, Garner AL. A universal theory for gas breakdown from microscale to the classical Paschen law. Physics of Plasmas. 2017;**24**(11):113522. DOI: 10.1063/1.5004654

[43] Cheng Y, Meng G, Dong C. Review on the breakdown characteristics and discharge behaviors at the micro&nano scale. Transactions of China Electrotechnical

Society. 2017;**32**(2):13-23. DOI: CNKI:SUN:DGJS.0.2017-02-002

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[45] Meng G, Cheng Y, Gao X, Wang K,

Dong C, Zhu B. In-situ optical observation of dynamic breakdown process across microgaps at atmospheric

pressure. IEEE Transactions on Dielectrics and Electrical Insulation. 2018;**25**(4):1502-1507. DOI: 10.1109/

[46] Strong F, Skinner JL, Tien NC. Electrical discharge across micrometerscale gaps for planar MEMS structures in air at atmospheric pressure. Journal of

2008;**18**(7):075025. DOI: 10.1088/0960-1317/18/7/075025

Micromechanics and Microengineering.

TDEI.2018.007017

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[35] Venkattraman A, Alexeenko AA.

Plasmas. 2012;**19**(12):123515. DOI:

[36] Marić R, Stanković K, Vujisić M, Osmokrović P. Electrical breakdown mechanisms in vacuum diodes. Vacuum. 2010;**84**(11):1291-1295. DOI: 10.12693/

[37] Sudarshan T, Ma X, Muzykov P. High field insulation relevant to vacuum microelectronic devices. IEEE Transactions on Dielectrics and Electrical Insulation. 2002;**9**(2):216-225.

mathematical model of the modified Paschen's curve for breakdown in microscale gaps. Journal of Applied Physics. 2010;**107**(10):103303. DOI:

[39] Klas M, Matejcik S, Radjenovic B, Radmilovic-Radjenovic M. Experimental and theoretical studies of the direct-current breakdown voltage in argon at micrometer separations. Physica Scripta. 2011;**83**(4):045503. DOI: 10.1088/0031-8949/83/04/045503

[40] Klas M, Matejcik S, Radjenovic B,

Radmilovic-Radjenovic M.

Scaling law for direct current field emission-driven microscale gas breakdown. Physics of

10.1109/TPS.2012.2224380

DOI: 10.1063/1.3688176

10.1063/1.4773399

APhysPolA.118.585

DOI: 10.1109/94.993738

10.1063/1.3380855

[38] Go DB, Pohlman DA. A

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

[24] Levchenko I, Xu S, Teel G, Mariotti

D, Walker M, Keidar M. Recent progress and perspectives of space electric propulsion systems based on smart nanomaterials. Nature Communications. 2018;**9**(1):879. DOI:

10.1038/s41467-017-02269-7

10.2514/2.5331

[25] Martinez-Sanchez M, Pollard JE. Spacecraft electric propulsion-an overview. Journal of Propulsion and Power. 1998;**14**(5):688-699. DOI:

[26] Voldman SH. Nano electrostatic discharge. IEEE Nanotechnology Magazine. 2009;**3**(3):12-15. DOI: 10.1109/MNANO.2009.934212

[27] Voldman SH. Electrical Overstress (EOS): Devices, Circuits and Systems. Chichester: John Wiley & Sons; 2013.

[29] Paschen F. On sparking over in air, hydrogen, carbon dioxide under the potentials corresponding to various pressures. Wiedemann Annalen der Physik und Chemie. 1889;**37**:69-96

[30] Boyle W, Kisliuk P. Departure from Paschen's law of breakdown in gases. Physical Review. 1955;**97**(2):255-259.

[31] Iwabuchi H, Morimoto T, Matsuoka S, Kumada A, Hidaka K. Pre-breakdown phenomenon in micrometer-scale gap.

Matejčik Š, Klas M, Radjenović B. The role of the field emission effect in direct-current argon discharges for the gaps ranging from 1 to 100 μm. Journal of Physics D: Applied Physics. 2012;**46**(1):015302. DOI: 10.1088/0022-3727/46/1/015302

DOI: 10.1103/PhysRev.97.255

[32] Radmilović-Radjenović M,

In: 31st ICPIG; 2013

DOI: 10.1002/9781118511886

[28] Voldman SH. ESD: Failure Mechanisms and Models. Chichester:

John Wiley & Sons; 2009. DOI:10.1002/9780470747254

microelectromechanical systems (MEMS): A case study on micromirrors. In: IEEE 30th Electrical Overstress/ Electrostatic Discharge Symposium; 2008

microrel.2010.07.079

10.1109/CEIDP.2012.6378790

Symposium; 2010

e2015-60618-1

epjst/e2016-60375-4

[17] Sangameswaran S et al. Impact of design factors and environment on the ESD sensitivity of MEMS micromirrors. Microelectronics Reliability. 2010;**50** (9-11):1383-1387. DOI: 10.1016/j.

[18] Cheng Y, Meng G, You XG, Chen L, Wu K, Pan C. Experimental study on electrical breakdown of micro-electromechanical systems with micro-gaps. In: 2012 Annual Report Conference on Electrical Insulation and Dielectric Phenomena; 2012. pp. 339-342. DOI:

[19] Steinman A, Henry LG, Hernandez M. Measurements to establish process ESD compatibility. In: IEEE Electrical Overstress/Electrostatic Discharge

[20] Schoenbach KH, Becker K. 20 years of microplasma research: A status report. The European Physical Journal D. 2016;**70**(2):29. DOI: 10.1140/epjd/

[21] Becker K. Microplasmas, a platform technology for a plethora of plasma applications. The European Physical Journal Special Topics. 2017;**226**(13):2853-2858. DOI: 10.1140/

[22] Charles C, Bish A, Boswell R, Dedrick J, Greig A, Hawkins R, et al. A short review of experimental and computational diagnostics for radiofrequency plasma micro-thrusters.

Plasma Chemistry and Plasma Processing. 2016;**36**(1):29-44. DOI:

[23] Wright W, Ferrer P. Electric micropropulsion systems. Progress in Aerospace Sciences. 2015;**74**:48-61. DOI:

10.1016/j.paerosci.2014.10.003

10.1007/s11090-015-9654-5

**44**

[33] Li Y, Tirumala R, Rumbach P, Go DB. The coupling of ion-enhanced field emission and the discharge during microscale breakdown at moderately high pressures. IEEE Transactions on Plasma Science. 2013;**41**(1):24-35. DOI: 10.1109/TPS.2012.2224380

[34] Venkattraman A, Garg A, Peroulis D, Alexeenko AA. Direct measurements and numerical simulations of gas charging in microelectromechanical system capacitive switches. Applied Physics Letters. 2012;**100**(8):083503. DOI: 10.1063/1.3688176

[35] Venkattraman A, Alexeenko AA. Scaling law for direct current field emission-driven microscale gas breakdown. Physics of Plasmas. 2012;**19**(12):123515. DOI: 10.1063/1.4773399

[36] Marić R, Stanković K, Vujisić M, Osmokrović P. Electrical breakdown mechanisms in vacuum diodes. Vacuum. 2010;**84**(11):1291-1295. DOI: 10.12693/ APhysPolA.118.585

[37] Sudarshan T, Ma X, Muzykov P. High field insulation relevant to vacuum microelectronic devices. IEEE Transactions on Dielectrics and Electrical Insulation. 2002;**9**(2):216-225. DOI: 10.1109/94.993738

[38] Go DB, Pohlman DA. A mathematical model of the modified Paschen's curve for breakdown in microscale gaps. Journal of Applied Physics. 2010;**107**(10):103303. DOI: 10.1063/1.3380855

[39] Klas M, Matejcik S, Radjenovic B, Radmilovic-Radjenovic M. Experimental and theoretical studies of the direct-current breakdown voltage in argon at micrometer separations. Physica Scripta. 2011;**83**(4):045503. DOI: 10.1088/0031-8949/83/04/045503

[40] Klas M, Matejcik S, Radjenovic B, Radmilovic-Radjenovic M.

Experimental and theoretical studies of the breakdown voltage characteristics at micrometre separations in air. Europhysics Letters. 2011;**95**(3):35002. DOI: 10.1209/0295-5075/95/35002

[41] Buendia JA, Venkattraman A. Field enhancement factor dependence on electric field and implications on microscale gas breakdown: Theory and experimental interpretation. EPL (Europhysics Letters). 2015;**112**(5):55002. DOI: 10.1209/0295-5075/112/55002

[42] Loveless AM, Garner AL. A universal theory for gas breakdown from microscale to the classical Paschen law. Physics of Plasmas. 2017;**24**(11):113522. DOI: 10.1063/1.5004654

[43] Cheng Y, Meng G, Dong C. Review on the breakdown characteristics and discharge behaviors at the micro&nano scale. Transactions of China Electrotechnical Society. 2017;**32**(2):13-23. DOI: CNKI:SUN:DGJS.0.2017-02-002

[44] Torres JM, Dhariwal RS. Electric field breakdown at micrometer separations in air and vacuum. Microsystem Technologies. 1999;**6**(1): 6-10. DOI: 10.1007/s005420050166

[45] Meng G, Cheng Y, Gao X, Wang K, Dong C, Zhu B. In-situ optical observation of dynamic breakdown process across microgaps at atmospheric pressure. IEEE Transactions on Dielectrics and Electrical Insulation. 2018;**25**(4):1502-1507. DOI: 10.1109/ TDEI.2018.007017

[46] Strong F, Skinner JL, Tien NC. Electrical discharge across micrometerscale gaps for planar MEMS structures in air at atmospheric pressure. Journal of Micromechanics and Microengineering. 2008;**18**(7):075025. DOI: 10.1088/0960-1317/18/7/075025

[47] Meng G, Cheng Y, Wu K, Chen L. Electrical characteristics of nanometer gaps in vacuum under direct voltage. IEEE Transactions on Dielectrics and Electrical Insulation. 2014;**21**(4): 1950-1956. DOI: 10.1109/TDEI. 2014.004376

[48] Meng G, Gao X, Loveless AM, Dong C, Zhang D, Wang K, et al. Demonstration of field emission driven microscale gas breakdown for pulsed voltages using in-situ optical imaging. Physics of Plasmas. 2018;**25**(8):082116. DOI: 10.1063/1.5046335

[49] Meng G, Ying Q, Loveless AM, Wu F, Wang K, Fu Y, et al. Spatiotemporal dynamics of pulsed gas breakdown in microgaps. Physics of Plasmas. 2019;**26**(1):014506. DOI: 10.1063/1.5081009

[50] Go D, Venkattraman A. Microscale gas breakdown: Ion-enhanced field emission and the modified Paschen's curve. Journal of Physics D: Applied Physics. 2014;**47**(50):503001. DOI: 10.1088/0022-3727/47/50/503001

[51] Meng G. Experimental and numerical investigation of the influencing factors on pulsed gas breakdown in microgaps. In: Preparation; 2019

[52] Schnyder R, Howling A, Bommottet D, Hollenstein C. Direct current breakdown in gases for complex geometries from high vacuum to atmospheric pressure. Journal of Physics D: Applied Physics. 2013;**46**(28):285205. DOI: 10.1088/0022-3727/46/28/285205

[53] Lyon D, Hubler A. Gap size dependence of the dielectric strength in nano vacuum gaps. IEEE Transactions on Dielectrics and Electrical Insulation. 2013;**20**:1467-1471. DOI: 10.1109/ TDEI.2013.6571470

[54] Staprans A. Voltage breakdown limitations of electron guns for high power microwave tubes. In: Proceedings of the Second International Symposium Insulation of High Voltages Vacuum; 1966. pp. 293-303

[55] Tao S, Guangsheng S, Ping Y, Jue W, Weiqun Y, Yaohong S, et al. An experimental investigation of repetitive nanosecond-pulse breakdown in air. Journal of Physics D: Applied Physics. 2006;**39**(10):2192. DOI: 10.1088/0022-3727/39/10/030

[56] Loveless AM, Meng G, Ying Q, Wu F, Wang K, Cheng Y, et al. The transition to Paschen's law for microscale gas breakdown at subatmospheric pressure. Scientific Reports. 2019;**9**(1):5669. DOI: 10.1038/s41598-019-42111-2

[57] Compton KT. The mean free path of an electron in a gas and its minimum ionizing potential. Physical Review. 1916;**8**(4):386. DOI: 10.1103/ PhysRev.8.386

[58] Kogelschatz U. Ultraviolet excimer radiation from nonequilibrium gas discharges and its application in photophysics, photochemistry and photobiology. Journal of Optical Technology. 2012;**79**(8):484-493. DOI: 10.1364/JOT.79.000484

[59] Kim K, Park S, Eden J. Selfpatterned aluminium interconnects and ring electrodes for arrays of microcavity plasma devices encapsulated in Al2O3. Journal of Physics D: Applied Physics. 2007;**41**(1):012004. DOI: 10.1088/0022-3727/41/1/012004

[60] Eun CK, Gianchandani YB. Microdischarge-based sensors and actuators for portable microsystems: Selected examples. IEEE Journal of Quantum Electronics. 2012;**48**(6): 814-826. DOI: 10.1109/JQE.2012.2189199

[61] Lin L, Wang Q. Microplasma: A new generation of technology for functional nanomaterial synthesis. Plasma Chemistry and Plasma Processing.

**47**

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[62] Iza F, Kim GJ, Lee SM, Lee JK, Walsh JL, Zhang YT, et al. Microplasmas: Sources, particle kinetics, and biomedical applications. Plasma Processes and Polymers. 2008;**5**(4): 322-344. DOI: 10.1002/ppap.200700162

[63] Becker KH. The use of nonthermal plasmas in environmental applications.

Plasmas. Berlin Heidelberg: Springer-Verlag; 2010. pp. 367-394. DOI: 10.1007/978-3-642-10592-0

[64] Zhu Z, Chan GC-Y, Ray SJ, Zhang X, Hieftje GM. Microplasma source based on a dielectric barrier discharge for the determination of mercury by atomic emission spectrometry. Analytical Chemistry. 2008;**80**(22):8622-8627.

In: Introduction to Complex

DOI: 10.1021/ac801531j

10.3390/mi8090259

TPS.2017.2773073

[65] Joffrion JB, Mills D, Clower W, Wilson CG. On-chip microplasmas for the detection of radioactive cesium contamination in seawater. Micromachines. 2017;**8**(9):259. DOI:

[66] Baranov OO, Xu S, Xu L, Huang S, Lim J, Cvelbar U, et al. Miniaturized plasma sources: Can technological solutions help electric micropropulsion? IEEE Transactions on Plasma Science. 2018;**46**(2):230-238. DOI: 10.1109/

[67] Elkholy A, Shoshyn Y, Nijdam S, van Oijen J, van Veldhuizen E, Ebert U, et al. Burning velocity measurement of lean methane-air flames in a new nanosecond DBD microplasma burner platform. Experimental Thermal and Fluid Science. 2018;**95**:18-26. DOI: 10.1016/j.expthermflusci.2018.01.011

2015;**35**(6):925-962. DOI: 10.1007/

s11090-015-9640-y

*Electrical Breakdown Behaviors in Microgaps DOI: http://dx.doi.org/10.5772/intechopen.86915*

2015;**35**(6):925-962. DOI: 10.1007/ s11090-015-9640-y

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

power microwave tubes. In: Proceedings of the Second International Symposium Insulation of High Voltages Vacuum;

[55] Tao S, Guangsheng S, Ping Y, Jue W, Weiqun Y, Yaohong S, et al. An experimental investigation of repetitive nanosecond-pulse breakdown in air. Journal of Physics D: Applied Physics. 2006;**39**(10):2192. DOI: 10.1088/0022-3727/39/10/030

[56] Loveless AM, Meng G, Ying Q, Wu F, Wang K, Cheng Y, et al. The transition to Paschen's law for microscale gas breakdown at subatmospheric pressure. Scientific Reports. 2019;**9**(1):5669. DOI:

10.1038/s41598-019-42111-2

PhysRev.8.386

10.1364/JOT.79.000484

[59] Kim K, Park S, Eden J. Self-

plasma devices encapsulated in Al2O3. Journal of Physics D: Applied Physics. 2007;**41**(1):012004. DOI: 10.1088/0022-3727/41/1/012004

[60] Eun CK, Gianchandani YB. Microdischarge-based sensors and actuators for portable microsystems: Selected examples. IEEE Journal of Quantum Electronics. 2012;**48**(6): 814-826. DOI: 10.1109/JQE.2012.2189199

nanomaterial synthesis. Plasma Chemistry and Plasma Processing.

patterned aluminium interconnects and ring electrodes for arrays of microcavity

[61] Lin L, Wang Q. Microplasma: A new generation of technology for functional

[57] Compton KT. The mean free path of an electron in a gas and its minimum ionizing potential. Physical Review. 1916;**8**(4):386. DOI: 10.1103/

[58] Kogelschatz U. Ultraviolet excimer radiation from nonequilibrium gas discharges and its application in photophysics, photochemistry and photobiology. Journal of Optical Technology. 2012;**79**(8):484-493. DOI:

1966. pp. 293-303

[47] Meng G, Cheng Y, Wu K, Chen L. Electrical characteristics of nanometer gaps in vacuum under direct voltage. IEEE Transactions on Dielectrics and Electrical Insulation. 2014;**21**(4): 1950-1956. DOI: 10.1109/TDEI.

[48] Meng G, Gao X, Loveless AM, Dong C, Zhang D, Wang K, et al. Demonstration of field emission driven microscale gas breakdown for pulsed voltages using in-situ optical imaging. Physics of Plasmas. 2018;**25**(8):082116.

[49] Meng G, Ying Q, Loveless AM, Wu F, Wang K, Fu Y, et al. Spatiotemporal dynamics of pulsed gas breakdown in microgaps. Physics of Plasmas. 2019;**26**(1):014506. DOI:

[50] Go D, Venkattraman A. Microscale gas breakdown: Ion-enhanced field emission and the modified Paschen's curve. Journal of Physics D: Applied Physics. 2014;**47**(50):503001. DOI: 10.1088/0022-3727/47/50/503001

[52] Schnyder R, Howling A, Bommottet

atmospheric pressure. Journal of Physics D: Applied Physics. 2013;**46**(28):285205. DOI: 10.1088/0022-3727/46/28/285205

dependence of the dielectric strength in nano vacuum gaps. IEEE Transactions on Dielectrics and Electrical Insulation. 2013;**20**:1467-1471. DOI: 10.1109/

[54] Staprans A. Voltage breakdown limitations of electron guns for high

[51] Meng G. Experimental and numerical investigation of the influencing factors on pulsed gas breakdown in microgaps. In:

D, Hollenstein C. Direct current breakdown in gases for complex geometries from high vacuum to

[53] Lyon D, Hubler A. Gap size

TDEI.2013.6571470

DOI: 10.1063/1.5046335

10.1063/1.5081009

Preparation; 2019

2014.004376

**46**

[62] Iza F, Kim GJ, Lee SM, Lee JK, Walsh JL, Zhang YT, et al. Microplasmas: Sources, particle kinetics, and biomedical applications. Plasma Processes and Polymers. 2008;**5**(4): 322-344. DOI: 10.1002/ppap.200700162

[63] Becker KH. The use of nonthermal plasmas in environmental applications. In: Introduction to Complex Plasmas. Berlin Heidelberg: Springer-Verlag; 2010. pp. 367-394. DOI: 10.1007/978-3-642-10592-0

[64] Zhu Z, Chan GC-Y, Ray SJ, Zhang X, Hieftje GM. Microplasma source based on a dielectric barrier discharge for the determination of mercury by atomic emission spectrometry. Analytical Chemistry. 2008;**80**(22):8622-8627. DOI: 10.1021/ac801531j

[65] Joffrion JB, Mills D, Clower W, Wilson CG. On-chip microplasmas for the detection of radioactive cesium contamination in seawater. Micromachines. 2017;**8**(9):259. DOI: 10.3390/mi8090259

[66] Baranov OO, Xu S, Xu L, Huang S, Lim J, Cvelbar U, et al. Miniaturized plasma sources: Can technological solutions help electric micropropulsion? IEEE Transactions on Plasma Science. 2018;**46**(2):230-238. DOI: 10.1109/ TPS.2017.2773073

[67] Elkholy A, Shoshyn Y, Nijdam S, van Oijen J, van Veldhuizen E, Ebert U, et al. Burning velocity measurement of lean methane-air flames in a new nanosecond DBD microplasma burner platform. Experimental Thermal and Fluid Science. 2018;**95**:18-26. DOI: 10.1016/j.expthermflusci.2018.01.011

**49**

Section 3

Nanogenerators

Section 3

## Nanogenerators

**51**

**Chapter 4**

**Abstract**

self-powered systems

**1. Introduction**

Discharge

Nanogenerators from Electrical

Electrical discharge is generally considered as a negative effect in the electronic industry and often causes electrostatic discharge (ESD) and thus failure of electronic components and integrated circuits (IC). However, this effect was recently used to develop a new energy-harvesting technology, direct-current triboelectric nanogenerator (DC-TENG). In this chapter, its fundamental mechanism and the working modes of the nanogenerator will be presented. They are different from the general alternating current TENG (AC-TENG) invented in 2012, which is based on triboelectrification and electrostatic induction. Taking advantage of the electrostatic discharge, it can not only promote the miniaturization trend of TENG and self-powered systems, but also provide a paradigm shifting technique to in situ gain electrical energy.

**Keywords:** electrostatic discharge, mechanical energy harvesting, nanogenerators,

Static electricity is a documented phenomenon since the ancient Greek era of 2600 years ago [1–3]. At that time, people found that the amber through friction can attract lightweight particles, attracting a lot of researchers to study the physical principle behind this interesting phenomenon. Triboelectrification (or contact electrification), which refers to the charge transfer between two surfaces in contact, is the principle behind natural phenomena such as the amber effect and lighting [4–8]. Generally, two different materials will have net negative and positive charges, respectively, after contact or by friction based on their capability of gaining and losing electrons. The material which has strong capability of losing electrons will easily be positively charged, and the other has the tendency to be negatively charged. The presence of triboelectric charges on the surface of dielectric will build a strong electric field. When two materials of different polarities are close to each other, a charged material close to either a metal or ground, the electrostatic field between the

two materials may break down the air and finally form electrical discharge.

ing ESD to protect electronic components and instruments' safety [14–20].

Electrostatic discharge is a ubiquitous phenomenon in our daily life which is a sudden flow of electricity between two charged materials caused by contact or dielectric breakdown [9–13]. For instance, during dry winters, the body easily accumulates static electricity, and it is very prone to discharge when it makes contact with conductors or other people. Generally, electrical discharge is considered as a negative effect in the electronic industry and often causes electrostatic discharge (ESD) failure of electronic components and integrated circuits (IC). Intensive work has been dedicated to avoid-

*Jie Wang, Di Liu, Linglin Zhou and Zhong Lin Wang*

#### **Chapter 4**

## Nanogenerators from Electrical Discharge

*Jie Wang, Di Liu, Linglin Zhou and Zhong Lin Wang*

#### **Abstract**

Electrical discharge is generally considered as a negative effect in the electronic industry and often causes electrostatic discharge (ESD) and thus failure of electronic components and integrated circuits (IC). However, this effect was recently used to develop a new energy-harvesting technology, direct-current triboelectric nanogenerator (DC-TENG). In this chapter, its fundamental mechanism and the working modes of the nanogenerator will be presented. They are different from the general alternating current TENG (AC-TENG) invented in 2012, which is based on triboelectrification and electrostatic induction. Taking advantage of the electrostatic discharge, it can not only promote the miniaturization trend of TENG and self-powered systems, but also provide a paradigm shifting technique to in situ gain electrical energy.

**Keywords:** electrostatic discharge, mechanical energy harvesting, nanogenerators, self-powered systems

#### **1. Introduction**

Static electricity is a documented phenomenon since the ancient Greek era of 2600 years ago [1–3]. At that time, people found that the amber through friction can attract lightweight particles, attracting a lot of researchers to study the physical principle behind this interesting phenomenon. Triboelectrification (or contact electrification), which refers to the charge transfer between two surfaces in contact, is the principle behind natural phenomena such as the amber effect and lighting [4–8]. Generally, two different materials will have net negative and positive charges, respectively, after contact or by friction based on their capability of gaining and losing electrons. The material which has strong capability of losing electrons will easily be positively charged, and the other has the tendency to be negatively charged. The presence of triboelectric charges on the surface of dielectric will build a strong electric field. When two materials of different polarities are close to each other, a charged material close to either a metal or ground, the electrostatic field between the two materials may break down the air and finally form electrical discharge.

Electrostatic discharge is a ubiquitous phenomenon in our daily life which is a sudden flow of electricity between two charged materials caused by contact or dielectric breakdown [9–13]. For instance, during dry winters, the body easily accumulates static electricity, and it is very prone to discharge when it makes contact with conductors or other people. Generally, electrical discharge is considered as a negative effect in the electronic industry and often causes electrostatic discharge (ESD) failure of electronic components and integrated circuits (IC). Intensive work has been dedicated to avoiding ESD to protect electronic components and instruments' safety [14–20].

With the rapid development of science and technology, the structure of energy demand has changed dramatically. Conventional ordered energy cannot fully meet modern society's demand of a clean and sustainable power source with the increasing demand of wearable electronics and Internet of Things (IoTs). We need "disordered energy" to meet the remaining energy demand of electronics, which are widely distributed, possibly moved and large quantity [21]. At present, most electronic devices are powered by batteries and/or local power generators. However, a battery has limited life cycle which has to be constantly monitored, recharged, or replaced, and it needs a lot of manpower and material resources, thus increasing the maintenance cost [22]. With considering the working status of each electronics, a variety of energy-harvesting methods show their respective characteristics. For example, solar cells can harvest solar energy except in the day time when there is sun light [23]; wind power generation [24] works under abundant wind energy; a thermal generator can convert temperature difference into electricity [25]; and piezoelectric nanogenerators can convert tiny physical deformations into electricity to self-power small-scale devices [26]. Based on the triboelectrification effect and electrostatic induction, the use of triboelectric nanogenerators (TENGs) has been demonstrated as a cost-effective, clean, and sustainable strategy to convert mechanical energy into electricity with comprehensive advantages of light weight, small size, a wide choice of materials, and high efficiency even at low frequencies [27–30].

#### **2. Triboelectric nanogenerators**

In 2012, triboelectric nanogenerators (TENGs) based on triboelectrification effect and electrostatic induction were invented by Zhong Lin Wang to harvest mechanical energy from ambient environment [31]. In addition, the self-powered systems based on TENGs demonstrated an effective solution to supply energy for micro/nano electronics. A conventional TENG can generate AC by the friction of two materials with different electron affinity, where charge transfer occurs between the two surfaces of materials, and then inducing electron transfer between two back electrodes under the periodical mechanical force. Recent research indicates that its fundamental theory lies in Maxwell's displacement current and change in surface polarization [32]. Based on this principle, four different modes of TENGs are built according to different device structures and working environments: vertical contact-separation mode, lateral siding mode, single-electrode mode, and freestanding triboelectric-layer mode (**Figure 1**) [33]. Based on the four modes of TENG, several works have demonstrated that TENGs can harvest various forms of mechanical energy, such as human motion, vibration, wind and even blue energy, making possible their applications in wearable electronics, remote and mobile environmental sensors, and IoTs [34–38].

As an energy harvester, the output power density is one of the key properties to measure the output capability of TENGs. Recent progress indicates that the power density is quadratically related to triboelectric charge density [39, 40], and thus, great efforts have been concentrated on increasing the triboelectric charge density by means of material improvement, structural optimization, surface modification, and so on [41–43]. Jie Wang et al. fabricated a flexible TENG with the silicon rubber as a triboelectric layer and a mixture of silicon rubber [44], carbon black, and carbon nanotubes as a triboelectric electrode. With optimized structural design, the triboelectric charge density is increased up to 250 μC m<sup>−</sup><sup>2</sup> . By designing a three-layer TENG, the triboelectric charge density increases to ~270 μC m<sup>−</sup><sup>2</sup> , which is the theoretical limit of air breakdown [45]. Then, a high-vacuum environment was adopted to suppress electrostatic breakdown and a triboelectric

**53**

*Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422*

charge density of 660 μC m<sup>−</sup><sup>2</sup>

**Figure 1.**

pressure (P) and is given by

the constraint of air breakdown [46].

TENGs is gradually increased from 50 to ~1000 μC m<sup>−</sup><sup>2</sup>

*mode, (c) single-electrode mode, and (d) freestanding triboelectric-layer mode [33].*

*Vb* = \_\_\_\_\_\_\_\_ *APd*

of a TENG (Vgap) under short-circuit condition is given by

*Vgap* = \_\_\_\_\_\_\_\_ *td*

the vacuum permittivity (ε0 ~ 8.85 × 10<sup>−</sup>12 F m−<sup>1</sup>

tion condition of a TENG), A = 273.75 V Pa<sup>−</sup><sup>1</sup>

is achieved. By further coupling surface polarization

*ln*(*Pd*) <sup>+</sup> *<sup>B</sup>* (1)

<sup>ε</sup>0(*<sup>t</sup>* <sup>+</sup> *<sup>d</sup>*ε*r*) (2)

and B = 1.08.

, and electrostatic break-

without

from triboelectrification and hysteretic dielectric polarization from ferroelectric material in vacuum, the triboelectric charge density boosts to 1003 μC m<sup>−</sup><sup>2</sup>

*The four fundamental modes of TENGs: (a) vertical contact-separation mode, (b) in-plane contact-sliding* 

Triboelectric charge density as one of the main optimization directions of

down becomes a problem that must to be considered. Generally, a high electrostatic field will be built between the two charged surfaces with opposite triboelectric charges during the working process of TENG. Paschen's law describes the empirical relationship between gaseous breakdown voltage (Vb), gap distance (x), and gas

where A and B are constants determined by the composition and the pressure of the gas. For air at standard atmospheric pressure (atm, i.e., the conventional opera-

According to the theoretical derivation, the gap voltage between contact surfaces

where t is the thickness of the polytetrafluoroethylene (PTFE) film, σ the triboelectric surface charge density, εr the relative permittivity of PTFE (εr ~ 2.1), and ε<sup>0</sup>

m<sup>−</sup><sup>1</sup>

).

*Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422*

**Figure 1.**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

**2. Triboelectric nanogenerators**

environmental sensors, and IoTs [34–38].

With the rapid development of science and technology, the structure of energy

In 2012, triboelectric nanogenerators (TENGs) based on triboelectrification effect and electrostatic induction were invented by Zhong Lin Wang to harvest mechanical energy from ambient environment [31]. In addition, the self-powered systems based on TENGs demonstrated an effective solution to supply energy for micro/nano electronics. A conventional TENG can generate AC by the friction of two materials with different electron affinity, where charge transfer occurs between the two surfaces of materials, and then inducing electron transfer between two back electrodes under the periodical mechanical force. Recent research indicates that its fundamental theory lies in Maxwell's displacement current and change in surface polarization [32]. Based on this principle, four different modes of TENGs are built according to different device structures and working environments: vertical contact-separation mode, lateral siding mode, single-electrode mode, and freestanding triboelectric-layer mode (**Figure 1**) [33]. Based on the four modes of TENG, several works have demonstrated that TENGs can harvest various forms of mechanical energy, such as human motion, vibration, wind and even blue energy, making possible their applications in wearable electronics, remote and mobile

As an energy harvester, the output power density is one of the key properties to measure the output capability of TENGs. Recent progress indicates that the power density is quadratically related to triboelectric charge density [39, 40], and thus, great efforts have been concentrated on increasing the triboelectric charge density by means of material improvement, structural optimization, surface modification, and so on [41–43]. Jie Wang et al. fabricated a flexible TENG with the silicon rubber as a triboelectric layer and a mixture of silicon rubber [44], carbon black, and carbon nanotubes as a triboelectric electrode. With optimized structural design, the triboelectric charge density is increased up to 250 μC m<sup>−</sup><sup>2</sup>

By designing a three-layer TENG, the triboelectric charge density increases to ~270

environment was adopted to suppress electrostatic breakdown and a triboelectric

, which is the theoretical limit of air breakdown [45]. Then, a high-vacuum

demand has changed dramatically. Conventional ordered energy cannot fully meet modern society's demand of a clean and sustainable power source with the increasing demand of wearable electronics and Internet of Things (IoTs). We need "disordered energy" to meet the remaining energy demand of electronics, which are widely distributed, possibly moved and large quantity [21]. At present, most electronic devices are powered by batteries and/or local power generators. However, a battery has limited life cycle which has to be constantly monitored, recharged, or replaced, and it needs a lot of manpower and material resources, thus increasing the maintenance cost [22]. With considering the working status of each electronics, a variety of energy-harvesting methods show their respective characteristics. For example, solar cells can harvest solar energy except in the day time when there is sun light [23]; wind power generation [24] works under abundant wind energy; a thermal generator can convert temperature difference into electricity [25]; and piezoelectric nanogenerators can convert tiny physical deformations into electricity to self-power small-scale devices [26]. Based on the triboelectrification effect and electrostatic induction, the use of triboelectric nanogenerators (TENGs) has been demonstrated as a cost-effective, clean, and sustainable strategy to convert mechanical energy into electricity with comprehensive advantages of light weight, small size, a wide choice of materials, and high efficiency even at low frequencies [27–30].

**52**

μC m<sup>−</sup><sup>2</sup>

*The four fundamental modes of TENGs: (a) vertical contact-separation mode, (b) in-plane contact-sliding mode, (c) single-electrode mode, and (d) freestanding triboelectric-layer mode [33].*

charge density of 660 μC m<sup>−</sup><sup>2</sup> is achieved. By further coupling surface polarization from triboelectrification and hysteretic dielectric polarization from ferroelectric material in vacuum, the triboelectric charge density boosts to 1003 μC m<sup>−</sup><sup>2</sup> without the constraint of air breakdown [46].

Triboelectric charge density as one of the main optimization directions of TENGs is gradually increased from 50 to ~1000 μC m<sup>−</sup><sup>2</sup> , and electrostatic breakdown becomes a problem that must to be considered. Generally, a high electrostatic field will be built between the two charged surfaces with opposite triboelectric charges during the working process of TENG. Paschen's law describes the empirical relationship between gaseous breakdown voltage (Vb), gap distance (x), and gas pressure (P) and is given by

$$V\_b = \frac{APd}{\ln(Pd) \star B} \tag{1}$$

where A and B are constants determined by the composition and the pressure of the gas. For air at standard atmospheric pressure (atm, i.e., the conventional operation condition of a TENG), A = 273.75 V Pa<sup>−</sup><sup>1</sup> m<sup>−</sup><sup>1</sup> and B = 1.08.

According to the theoretical derivation, the gap voltage between contact surfaces of a TENG (Vgap) under short-circuit condition is given by

$$V\_{gap} = \frac{\sigma td}{\varepsilon\_0 \{t \star d\,\varepsilon\_r\}}\tag{2}$$

where t is the thickness of the polytetrafluoroethylene (PTFE) film, σ the triboelectric surface charge density, εr the relative permittivity of PTFE (εr ~ 2.1), and ε<sup>0</sup> the vacuum permittivity (ε0 ~ 8.85 × 10<sup>−</sup>12 F m−<sup>1</sup> ).

.

To avoid air breakdown, Vgap must be smaller than Vb at any operation gap distance. Large efforts have been dedicated to study the electrostatic breakdown of TENGs.

#### **3. The confirmation and study of air breakdown in TENG**

Using the ion-injection method for introducing surface charges into the dielectric layer, the power density of TENG greatly increases to ~315 W m<sup>−</sup><sup>2</sup> [39]. With the help of this method, the maximum surface charge density of TENG with the limitation of electrostatic breakdown was observed and confirmed for the first time. As shown in **Figure 2a**, the maximum surface charge density gradually increased with the ioninjection process (the thickness of the utilized FEP film is 50 μm). In the initial state, the surface charge density only generated by triboelectrification is nearly 50 μC m<sup>−</sup><sup>2</sup> . Subsequently, step-by-step ion injection was adopted for effective accumulation of the negative charges on the FEP surface, and it is very important to connect the FEP's bottom electrode to the ground in each ion-injection step. After a few ion injections, the surface charge density increased to ~240 μC m<sup>−</sup><sup>2</sup> (**Figure 2b**). After the ninth injection, the performance of transferred charges became distinctively different that this abrupt decrease of surface charge resulted from air breakdown. The schematic and numerical simulation results showing the voltage drop in the air gap between the Al and FEP layers, which could cause the air breakdown is shown in **Figure 2c**. This provides a new optimization direction for realizing high output performance of TENG.

After confirming the existence of air breakdown, many researchers studied the electrostatic breakdown of TENGs and various experiments demonstrated the

#### **Figure 2.**

*Step-by-step measurement of the surface charge density by ion-injection process. (a) In situ measurement of the charge density of the FEP film during the step-by-step ion-injection process. (b) The short-circuit charge density (*Δ*σSC) measured by the TENG when the FEP film was injected with ions time-by-time. (c) Schematic and numerical simulation results showing the voltage drop (*V*gap) between the Al and the FEP layers, at which the air breakdown may occur [39].*

**55**

**Figure 3.**

*Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422*

*layer feature in three different minutes of ADR [47].*

existence of air breakdown. Haixia Zhang et al. [47] fabricated a symmetric structure and an asymmetric structure of TENG, discovered the phenomenon of electrostatic breakdown in the asymmetric structure, and then studied the four steps of electrostatic breakdown in detail. **Figure 3a, b** shows the comparison of the symmetric structure and the asymmetric structure. A low-dark-current photoelectric detector is used to test photocurrent signals and an obvious light signal can be observed between the abrupt output decline in **Figure 3b(iv)**, while no light signal has been detected in **Figure 3a(iv)**. The transition process of electrostatic breakdown has been investigated and summarized, and the changes in triboelectric charges with time at four different regions in electrostatic breakdown, which are charge accumulation region (CAR), intermittent discharge region (IDR), accelerated discharge region (ADR), and uniform discharge region (UDR) are shown in **Figure 3c–f**. Meanwhile, the influence of several factors including contact materials, contact pressure, titled angle, and

*Comparison of S-TENG with A-TENG, and the demonstration of ESD. (a) The structure (i), stable output voltage (ii), stable Q waveforms (iii), and signals detected by a photocurrent detector of S-TENG (iv). (b) The structure (i), abrupt voltage decline (ii), abrupt declined Q waveforms (iii), and signals detected by a photocurrent detector of A-TENG (iv). (c) Triboelectric charges in four different regions of ESD processes. (d) Picked-up, 20-s waveforms for each marked point in (c). (e) ND and η change with time in IDR. (f) Double-*

Yunlong Zi et al. [48] confirmed that the threshold surface charge density of

breakdown by the theoretical study of the maximized effective energy output, and then the effects of gas pressure (higher than the atmosphere) and gas composition were also studied. **Figure 4a** shows the breakdown voltage as calculated by Paschen's law in 1 atm air, in which the points A–E show the voltage V1 between triboelectric surfaces of contact-separation mode TENG under different transferred charges. The potential distribution of A–D is simulated by COMSOL Multiphysics software shown in **Figure 4b**. In **Figure 4c,d** are shown the voltage V1 between the two triboelectric surfaces and the breakdown voltage Vb. To further clearly explain the relationship of V1 and Vb, **Figure 4e** shows the distribution of Vb-V1 in a V-Q plot with the contour line of 0 V displayed as the red dashed line. The negative ("−") and positive ("+") areas are divided by this contour line. They also did experiments to demonstrate the existence of air breakdown. **Figure 4f** is the

with the existence of air

surface morphology on electrostatic breakdown has been studied.

contact-separation mode TENG is nearly 40~50 μC m<sup>−</sup><sup>2</sup>

#### *Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422*

#### **Figure 3.**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

**3. The confirmation and study of air breakdown in TENG**

layer, the power density of TENG greatly increases to ~315 W m<sup>−</sup><sup>2</sup>

surface charge density increased to ~240 μC m<sup>−</sup><sup>2</sup>

To avoid air breakdown, Vgap must be smaller than Vb at any operation gap distance. Large efforts have been dedicated to study the electrostatic breakdown of

Using the ion-injection method for introducing surface charges into the dielectric

of this method, the maximum surface charge density of TENG with the limitation of electrostatic breakdown was observed and confirmed for the first time. As shown in **Figure 2a**, the maximum surface charge density gradually increased with the ioninjection process (the thickness of the utilized FEP film is 50 μm). In the initial state, the surface charge density only generated by triboelectrification is nearly 50 μC m<sup>−</sup><sup>2</sup>

Subsequently, step-by-step ion injection was adopted for effective accumulation of the negative charges on the FEP surface, and it is very important to connect the FEP's bottom electrode to the ground in each ion-injection step. After a few ion injections, the

the performance of transferred charges became distinctively different that this abrupt decrease of surface charge resulted from air breakdown. The schematic and numerical simulation results showing the voltage drop in the air gap between the Al and FEP layers, which could cause the air breakdown is shown in **Figure 2c**. This provides a new

After confirming the existence of air breakdown, many researchers studied the electrostatic breakdown of TENGs and various experiments demonstrated the

*Step-by-step measurement of the surface charge density by ion-injection process. (a) In situ measurement of the charge density of the FEP film during the step-by-step ion-injection process. (b) The short-circuit charge density (*Δ*σSC) measured by the TENG when the FEP film was injected with ions time-by-time. (c) Schematic and numerical simulation results showing the voltage drop (*V*gap) between the Al and the FEP layers, at which the* 

optimization direction for realizing high output performance of TENG.

[39]. With the help

(**Figure 2b**). After the ninth injection,

.

**54**

**Figure 2.**

*air breakdown may occur [39].*

TENGs.

*Comparison of S-TENG with A-TENG, and the demonstration of ESD. (a) The structure (i), stable output voltage (ii), stable Q waveforms (iii), and signals detected by a photocurrent detector of S-TENG (iv). (b) The structure (i), abrupt voltage decline (ii), abrupt declined Q waveforms (iii), and signals detected by a photocurrent detector of A-TENG (iv). (c) Triboelectric charges in four different regions of ESD processes. (d) Picked-up, 20-s waveforms for each marked point in (c). (e) ND and η change with time in IDR. (f) Doublelayer feature in three different minutes of ADR [47].*

existence of air breakdown. Haixia Zhang et al. [47] fabricated a symmetric structure and an asymmetric structure of TENG, discovered the phenomenon of electrostatic breakdown in the asymmetric structure, and then studied the four steps of electrostatic breakdown in detail. **Figure 3a, b** shows the comparison of the symmetric structure and the asymmetric structure. A low-dark-current photoelectric detector is used to test photocurrent signals and an obvious light signal can be observed between the abrupt output decline in **Figure 3b(iv)**, while no light signal has been detected in **Figure 3a(iv)**. The transition process of electrostatic breakdown has been investigated and summarized, and the changes in triboelectric charges with time at four different regions in electrostatic breakdown, which are charge accumulation region (CAR), intermittent discharge region (IDR), accelerated discharge region (ADR), and uniform discharge region (UDR) are shown in **Figure 3c–f**. Meanwhile, the influence of several factors including contact materials, contact pressure, titled angle, and surface morphology on electrostatic breakdown has been studied.

Yunlong Zi et al. [48] confirmed that the threshold surface charge density of contact-separation mode TENG is nearly 40~50 μC m<sup>−</sup><sup>2</sup> with the existence of air breakdown by the theoretical study of the maximized effective energy output, and then the effects of gas pressure (higher than the atmosphere) and gas composition were also studied. **Figure 4a** shows the breakdown voltage as calculated by Paschen's law in 1 atm air, in which the points A–E show the voltage V1 between triboelectric surfaces of contact-separation mode TENG under different transferred charges. The potential distribution of A–D is simulated by COMSOL Multiphysics software shown in **Figure 4b**. In **Figure 4c,d** are shown the voltage V1 between the two triboelectric surfaces and the breakdown voltage Vb. To further clearly explain the relationship of V1 and Vb, **Figure 4e** shows the distribution of Vb-V1 in a V-Q plot with the contour line of 0 V displayed as the red dashed line. The negative ("−") and positive ("+") areas are divided by this contour line. They also did experiments to demonstrate the existence of air breakdown. **Figure 4f** is the

mechanism of contact-separation mode TENG when the air breakdown existed. The final charge densities of six TENGs with different initial charge densities are shown in **Figure 4g**. The decrease in final charge densities of TENG #3–6 indicates the existence of air breakdown.

#### **Figure 4.**

*The demonstration of air breakdown in a CS mode TENG. (a) The breakdown voltage calculated by Paschen's law in 1 atm air, in which the points A–E show the voltage V1 between dielectric layer and upper electrode of the CS mode TENG with different surface charge density (inset shows the schematic diagram of the TENG). (b) The potential distribution of A–D simulated by COMSOL Multiphysics software. (c) The voltage V1 between the dielectric layer and upper electrode in V-Q plot. (d) The breakdown voltage Vb in V-Q plot. (e) The distribution of Vb-V1 in V-Q plot. The red dashed line is the contour line of 0 V. (f) The working process of CS mode TENG with air breakdown and the mechanism of the final charge density measurement. (g) The test results of final charge densities for six TENGs. The equal initial and final charge densities are shown with the dashed inclined line, and the dotted vertical line indicates the existence of air breakdown where σt separates with σ0 (blue) [48].*

#### **Figure 5.**

*Output performance of TENG in vacuum. (a) Schematic of TENG with a cushioned Cu electrode to increase contact intimacy during operation process. (b) Charge density of the TENG in atmosphere and high vacuum (P~10<sup>−</sup><sup>6</sup> torr). (c) Schematic of the TENG with the integration of triboelectric material (PTFE) with ferroelectric material (BT). (d) Charge density of the TENG in atmosphere and high vacuum [46].*

**57**

**Figure 6.**

*Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422*

to 1003 μC m<sup>−</sup><sup>2</sup>

Besides the relatively theoretical research of air breakdown, great efforts have been devoted to suppress or avoid air breakdown for substantially enhancing the output performance of TENGs [49, 50]. On the basis of soft contact and fragmental structure, Jie Wang et al. [46] fabricated a TENG with a cushioned Cu electrode and a contact area smaller than conventional TENG to improve the contact intimacy, which

by properly combining the surface polarization from triboelectrification and residual dielectric polarization of ferroelectric materials, the surface charge density can be expected to further increase. Then, a TENG with the integration of triboelectric material PTFE with ferroelectric material BT (one type of doped barium titanate material) in vacuum is fabricated (**Figure 5c**), and its surface charge density jumped

polarization from triboelectrification induces the dielectric polarization in BT, and the latter further enhances the former until a new equilibrium rebuilds again. This combination of surface polarization and dielectric polarization greatly enhances the triboelectric charge density under the rest cycles of TENG. This work proposes a new optimized method to realize high-output power density TENG and meanwhile avoids

TENGs can convert all kinds of mechanical energy into electricity, and have a built-in characteristic, that is high output voltage. Taking advantage of the highoutput voltage characteristic, a lot of practical applications of TENG have been

*Self-powered gas sensors. (a) Structure diagram of the self-powered CO2 sensor. (b) Circuit diagram of the self-powered CO2 sensor. (c) Schematic image of the gas discharge process in pure N2. (d) Under negative voltage, the curves of discharge current peak at different "d" under different CO2 concentrations. (e) The curve of Cth at different "d" [49]. (f) Schematic diagram of the cubic-TENG structure. (g) Output performance under various gas atmospheres of He, Ar, air, N2, CO2, CHF2Cl, and SF6. (h) Long-term stability under an SF6 atmosphere [55].*

the effect of environmental factors on the output performance of TENG.

**4. Applications of air breakdown in conventional TENGs**

without the constraint of air breakdown (**Figure 5d**). The surface

Torr), the

(**Figure 5b**). Meanwhile,

is shown in **Figure 5a**. After working in high-vacuum environment (~10<sup>−</sup><sup>6</sup>

triboelectric charge density is increased up to 660 μC m<sup>−</sup><sup>2</sup>

#### *Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422*

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

existence of air breakdown.

mechanism of contact-separation mode TENG when the air breakdown existed. The final charge densities of six TENGs with different initial charge densities are shown in **Figure 4g**. The decrease in final charge densities of TENG #3–6 indicates the

*The demonstration of air breakdown in a CS mode TENG. (a) The breakdown voltage calculated by Paschen's law in 1 atm air, in which the points A–E show the voltage V1 between dielectric layer and upper electrode of the CS mode TENG with different surface charge density (inset shows the schematic diagram of the TENG). (b) The potential distribution of A–D simulated by COMSOL Multiphysics software. (c) The voltage V1 between the dielectric layer and upper electrode in V-Q plot. (d) The breakdown voltage Vb in V-Q plot. (e) The distribution of Vb-V1 in V-Q plot. The red dashed line is the contour line of 0 V. (f) The working process of CS mode TENG with air breakdown and the mechanism of the final charge density measurement. (g) The test results of final charge densities for six TENGs. The equal initial and final charge densities are shown with the dashed inclined line, and the dotted vertical line indicates the existence of air breakdown where σt separates with σ0 (blue) [48].*

*Output performance of TENG in vacuum. (a) Schematic of TENG with a cushioned Cu electrode to increase contact intimacy during operation process. (b) Charge density of the TENG in atmosphere and high vacuum* 

 *torr). (c) Schematic of the TENG with the integration of triboelectric material (PTFE) with ferroelectric material (BT). (d) Charge density of the TENG in atmosphere and high vacuum [46].*

**56**

**Figure 5.**

**Figure 4.**

*(P~10<sup>−</sup><sup>6</sup>*

Besides the relatively theoretical research of air breakdown, great efforts have been devoted to suppress or avoid air breakdown for substantially enhancing the output performance of TENGs [49, 50]. On the basis of soft contact and fragmental structure, Jie Wang et al. [46] fabricated a TENG with a cushioned Cu electrode and a contact area smaller than conventional TENG to improve the contact intimacy, which is shown in **Figure 5a**. After working in high-vacuum environment (~10<sup>−</sup><sup>6</sup> Torr), the triboelectric charge density is increased up to 660 μC m<sup>−</sup><sup>2</sup> (**Figure 5b**). Meanwhile, by properly combining the surface polarization from triboelectrification and residual dielectric polarization of ferroelectric materials, the surface charge density can be expected to further increase. Then, a TENG with the integration of triboelectric material PTFE with ferroelectric material BT (one type of doped barium titanate material) in vacuum is fabricated (**Figure 5c**), and its surface charge density jumped to 1003 μC m<sup>−</sup><sup>2</sup> without the constraint of air breakdown (**Figure 5d**). The surface polarization from triboelectrification induces the dielectric polarization in BT, and the latter further enhances the former until a new equilibrium rebuilds again. This combination of surface polarization and dielectric polarization greatly enhances the triboelectric charge density under the rest cycles of TENG. This work proposes a new optimized method to realize high-output power density TENG and meanwhile avoids the effect of environmental factors on the output performance of TENG.

### **4. Applications of air breakdown in conventional TENGs**

TENGs can convert all kinds of mechanical energy into electricity, and have a built-in characteristic, that is high output voltage. Taking advantage of the highoutput voltage characteristic, a lot of practical applications of TENG have been

#### **Figure 6.**

*Self-powered gas sensors. (a) Structure diagram of the self-powered CO2 sensor. (b) Circuit diagram of the self-powered CO2 sensor. (c) Schematic image of the gas discharge process in pure N2. (d) Under negative voltage, the curves of discharge current peak at different "d" under different CO2 concentrations. (e) The curve of Cth at different "d" [49]. (f) Schematic diagram of the cubic-TENG structure. (g) Output performance under various gas atmospheres of He, Ar, air, N2, CO2, CHF2Cl, and SF6. (h) Long-term stability under an SF6 atmosphere [55].*

developed and successfully demonstrated in generating the input ions in mass spectrometry [51], fabricating electrospun nanofibers [52], driving field emission of electrons [53] etc. Considering the effects of gas composition and gas pressure on air breakdown, great efforts have been dedicated to study the air discharge for gas sensors. Ke Zhao et al. [54] fabricated a self-powered CO2 gas sensor based on gas discharge induced by a TENG. The structure diagram of a self-powered CO2 gas sensor is shown in **Figure 6a**. **Figure 6b** is the circuit diagram of the self-powered CO2 gas sensor. The detailed gas discharge process is shown in **Figure 6c**. N2 molecules lose electrons under the bombardment of electrons to form positive N2 ions. N2 molecules and electrons are accelerated to different directions under the electric field. Since the mass of positive N2 ions is much higher than that of the electrons, electrons are easier to be accelerated. The accelerated electrons will bombard other N2 molecules to form new positive ions and electrons; eventually an electron avalanche is formed. It is shown that the Cth (Cth is defined as the critical CO2 concentration that causes the stop of gas discharge) decreased with the increase of distance. Shasha Lv et al. [55] fabricated an enclosed cubic-TENG consisting of an inner and outer box using a fluorinated ethylene propylene thin film and a layer of conducting fabric as the triboelectric layers, which is shown in **Figure 6f**. The output performance of the cubic-TENG in different gas atmospheres is shown in **Figure 6g**. Long-term stability under SF6 atmosphere is shown in **Figure 6h,** indicating the potential of cubic-TENG as an energy-harvesting device and vibration sensor.

#### **5. Mechanical energy harvesting via air breakdown**

#### **5.1 DC-TENG**

Besides the applications of air breakdown in TENGs for gas sensors, some works about using air breakdown producing electricity also have been studied. Ya Yang et al. [56] fabricated a DC triboelectric generator (DC-TEG) consisting of two wheels and a belt, which is shown in **Figure 7a**. **Figure 7b** is a scanning electron microscope (SEM) image of the surface of PTFE. The working mechanism of the DC-TEG is illustrated in **Figure 7c** (The reference point T was used to monitor the relative sliding length of the belt). The design of the DC-TEG relied on the different properties to lose electrons, which is αIII > αI > αII in this structure. Here, the three materials are an Al wheel, a rubber belt, and a PTFE wheel. When the belt I makes contact with the wheel III, electrons will transfer from wheel III to belt I, resulting in net negative charges on the inner surface of belt I. After belt I makes contact with wheel II, electrons will transfer from belt I to wheel II. With the rotation of two wheels, more and more positive and negative charges will accumulate on the surface of wheel III and wheel II. Moreover, some positive charges are accumulated at electrode 2 (E2) due to electrostatic induction. So, the high electric field between wheel II and E2 will breakdown the air during the gap forming a pulsed DC output in external circuit. This DC-TEG exhibited good performance with different rotation rates and was demonstrated to power electronic systems directly. **Figure 7d** shows 1020 LEDs in series to fabricate LED panels. All the LEDs can be driven by the DC-TEG at a rotation speed of 3044 r min<sup>−</sup><sup>1</sup> as shown in **Figure 7e**. **Figure 7f** depicts charging curves of a 1-μF capacitor charged by the DC-TEG at different rotation rates. The constant-current discharging curves of a 1000-μF capacitor after being charged by DC-TEG is shown in **Figure 7g**, where the discharging current is 60 μA.

Jianjun Luo et al. [57] reported a DC-TENG realized by air breakdown-induced ionized air channel. The structure of the DC-TENG is illustrated in **Figure 8a**. This DC-TENG is composed of a top triboelectric aluminum (Al) electrode (noted as

**59**

**Figure 7.**

*Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422*

*(d) off and (e) on at a rotational speed of 3044 r min<sup>−</sup><sup>1</sup>*

Al-I), a sponge as a compression layer, a FEP film adhered to a back Al electrode (noted as Al-II), and an Al electrode at the bottom right corner (noted as Al-III). **Figure 8b** is the photograph of the DC-TENG. **Figure 8c,d** shows the transferred charges and short-circuit current of the DC-TENG with DC output characteristic. Using polydimethylsiloxane (PDMS), Kapton, and polyethylene terephthalate (PET) as triboelectric layers to replace FEP, the output characteristic is not changed, indicating the DC output is universal (**Figure 8e**). The working mechanism of the DC-TENG is illustrated in **Figure 8f**. The charge transfer between the top electrode and the dielectric layer is based on triboelectrification. In a working process, the electrons transport from bottom electrode to top electrode relying on an external circuit, which is Al-III in this structure. Then, the electrons flow back from top electrode to bottom electrode via the ionized air channel created by air breakdown. Because the inner flow of electrons based on air breakdown is in a single direction, the output current will be pulsed DC. This working mechanism was verified by realtime electrode potential monitoring, photocurrent signal detection, and controllable discharging observation. A flexible DC-TENG also fabricated to demonstrate this device can drive electronics directly without a rectifier, and the circuit diagram is illustrated in **Figure 8g**. **Figure 8h** shows the voltage curves of a 1-μF capacitor charged by the DC-TENG at different frequencies. The DC-TENG can also integrate

*capacitor at different rotational speeds. (g) The constant-current discharging curves of a 1000-μF capacitor after charging by the DC-TEG (inset shows the photographs of a red LED powered by the charged capacitor) [56].*

*DC-TEG. (a) Schematic diagram of the DC-TEG. (b) SEM image of the PTFE surface. (c) Working mechanism of the DC-TEG. (i) Initial status without sliding motion of the belt. (ii–v) The triboelectric charge distributions when belt I went through the point T with the length of LAB, LAB + LBC, LAB + LBC + LCD, and LAB + LBC + LCD + LDA, respectively. LT is the length that the belt went through the reference point T. LAB is the length of the belt between A and B. (d), (e) Photographs of 1020 LEDs driven by the DC-TEG as a direct power source when the DC-TEG is* 

*. (f) The measured voltage of the DC-TEG charges a 1-μF* 

with a capacitor and a calculator to form a self-powered system (**Figure 8i**).

TENGs are considered as a potential solution via building self-powered systems. The conventional TENGs have two built-in characteristics (i.e., AC consisted of

**5.2 Constant-current TENG arising from electrostatic breakdown**

#### **Figure 7.**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

TENG as an energy-harvesting device and vibration sensor.

**5. Mechanical energy harvesting via air breakdown**

Besides the applications of air breakdown in TENGs for gas sensors, some works about using air breakdown producing electricity also have been studied. Ya Yang et al. [56] fabricated a DC triboelectric generator (DC-TEG) consisting of two wheels and a belt, which is shown in **Figure 7a**. **Figure 7b** is a scanning electron microscope (SEM) image of the surface of PTFE. The working mechanism of the DC-TEG is illustrated in **Figure 7c** (The reference point T was used to monitor the relative sliding length of the belt). The design of the DC-TEG relied on the different properties to lose electrons, which is αIII > αI > αII in this structure. Here, the three materials are an Al wheel, a rubber belt, and a PTFE wheel. When the belt I makes contact with the wheel III, electrons will transfer from wheel III to belt I, resulting in net negative charges on the inner surface of belt I. After belt I makes contact with wheel II, electrons will transfer from belt I to wheel II. With the rotation of two wheels, more and more positive and negative charges will accumulate on the surface of wheel III and wheel II. Moreover, some positive charges are accumulated at electrode 2 (E2) due to electrostatic induction. So, the high electric field between wheel II and E2 will breakdown the air during the gap forming a pulsed DC output in external circuit. This DC-TEG exhibited good performance with different rotation rates and was demonstrated to power electronic systems directly. **Figure 7d** shows 1020 LEDs in series to fabricate LED panels. All the LEDs can be driven by the DC-TEG at

curves of a 1-μF capacitor charged by the DC-TEG at different rotation rates. The constant-current discharging curves of a 1000-μF capacitor after being charged by

Jianjun Luo et al. [57] reported a DC-TENG realized by air breakdown-induced ionized air channel. The structure of the DC-TENG is illustrated in **Figure 8a**. This DC-TENG is composed of a top triboelectric aluminum (Al) electrode (noted as

DC-TEG is shown in **Figure 7g**, where the discharging current is 60 μA.

as shown in **Figure 7e**. **Figure 7f** depicts charging

developed and successfully demonstrated in generating the input ions in mass spectrometry [51], fabricating electrospun nanofibers [52], driving field emission of electrons [53] etc. Considering the effects of gas composition and gas pressure on air breakdown, great efforts have been dedicated to study the air discharge for gas sensors. Ke Zhao et al. [54] fabricated a self-powered CO2 gas sensor based on gas discharge induced by a TENG. The structure diagram of a self-powered CO2 gas sensor is shown in **Figure 6a**. **Figure 6b** is the circuit diagram of the self-powered CO2 gas sensor. The detailed gas discharge process is shown in **Figure 6c**. N2 molecules lose electrons under the bombardment of electrons to form positive N2 ions. N2 molecules and electrons are accelerated to different directions under the electric field. Since the mass of positive N2 ions is much higher than that of the electrons, electrons are easier to be accelerated. The accelerated electrons will bombard other N2 molecules to form new positive ions and electrons; eventually an electron avalanche is formed. It is shown that the Cth (Cth is defined as the critical CO2 concentration that causes the stop of gas discharge) decreased with the increase of distance. Shasha Lv et al. [55] fabricated an enclosed cubic-TENG consisting of an inner and outer box using a fluorinated ethylene propylene thin film and a layer of conducting fabric as the triboelectric layers, which is shown in **Figure 6f**. The output performance of the cubic-TENG in different gas atmospheres is shown in **Figure 6g**. Long-term stability under SF6 atmosphere is shown in **Figure 6h,** indicating the potential of cubic-

**58**

a rotation speed of 3044 r min<sup>−</sup><sup>1</sup>

**5.1 DC-TENG**

*DC-TEG. (a) Schematic diagram of the DC-TEG. (b) SEM image of the PTFE surface. (c) Working mechanism of the DC-TEG. (i) Initial status without sliding motion of the belt. (ii–v) The triboelectric charge distributions when belt I went through the point T with the length of LAB, LAB + LBC, LAB + LBC + LCD, and LAB + LBC + LCD + LDA, respectively. LT is the length that the belt went through the reference point T. LAB is the length of the belt between A and B. (d), (e) Photographs of 1020 LEDs driven by the DC-TEG as a direct power source when the DC-TEG is (d) off and (e) on at a rotational speed of 3044 r min<sup>−</sup><sup>1</sup> . (f) The measured voltage of the DC-TEG charges a 1-μF capacitor at different rotational speeds. (g) The constant-current discharging curves of a 1000-μF capacitor after charging by the DC-TEG (inset shows the photographs of a red LED powered by the charged capacitor) [56].*

Al-I), a sponge as a compression layer, a FEP film adhered to a back Al electrode (noted as Al-II), and an Al electrode at the bottom right corner (noted as Al-III). **Figure 8b** is the photograph of the DC-TENG. **Figure 8c,d** shows the transferred charges and short-circuit current of the DC-TENG with DC output characteristic. Using polydimethylsiloxane (PDMS), Kapton, and polyethylene terephthalate (PET) as triboelectric layers to replace FEP, the output characteristic is not changed, indicating the DC output is universal (**Figure 8e**). The working mechanism of the DC-TENG is illustrated in **Figure 8f**. The charge transfer between the top electrode and the dielectric layer is based on triboelectrification. In a working process, the electrons transport from bottom electrode to top electrode relying on an external circuit, which is Al-III in this structure. Then, the electrons flow back from top electrode to bottom electrode via the ionized air channel created by air breakdown. Because the inner flow of electrons based on air breakdown is in a single direction, the output current will be pulsed DC. This working mechanism was verified by realtime electrode potential monitoring, photocurrent signal detection, and controllable discharging observation. A flexible DC-TENG also fabricated to demonstrate this device can drive electronics directly without a rectifier, and the circuit diagram is illustrated in **Figure 8g**. **Figure 8h** shows the voltage curves of a 1-μF capacitor charged by the DC-TENG at different frequencies. The DC-TENG can also integrate with a capacitor and a calculator to form a self-powered system (**Figure 8i**).

#### **5.2 Constant-current TENG arising from electrostatic breakdown**

TENGs are considered as a potential solution via building self-powered systems. The conventional TENGs have two built-in characteristics (i.e., AC consisted of

#### **Figure 8.**

*DC-TENG. (a) Structure of the DC-TENG. (b) Photograph of the DC-TENG. (c) Transferred charges of the DC-TENG. (d) Short-circuit current of the DC-TENG. (e) Output performance of DC-TENG using different triboelectric materials. (f) Schematic working principle of the DC-TENG achieved through the ionized air channel caused by air breakdown. (g) Circuit diagram of a 1-μF capacitor directly and continuously charged by the DC-TENG without a rectifier. (h) Measured voltage of a 1-μF capacitor charged by the DC-TENG at different frequencies. (i) Charging curve of a 1000-μF capacitor charged by the flexible multilayered DC-TENG (inset shows the photograph of a calculator powered by the charged capacitor). (i-v) The working mechanism of the DC-TENG in stable working state [57].*

pulse series). Generally, TENGs need to connect with a rectifier or a capacitor to drive electronics, which takes away its portability advantage [58, 59]. Second, the pulsed output current of TENGs result in high crest factor, which is a key metric to output instability defined as the ratio of the peak value to the root mean square value. This greatly influences their performance for energy storage efficiency and powering electronics [59]. In addition, triboelectric charge density as one of the key properties of TENGs has been greatly increased; therefore, a very high

**61**

**Figure 9.**

electrostatic field will be built in TENG, which also leads to air breakdown and results in unwanted charge quantity loss and, consequently, quadratic loss in output power. The charge quantity loss can be roughly estimated with its charge density gap in air and vacuum. With a 50-μm PTFE film as a triboelectric layer, 240 μC m<sup>−</sup><sup>2</sup>

*Constant-current TENG. (a) A schematic illustration of the sliding mode DC-TENG. (b) Equivalent circuit model of the DC-TENG. (c) Working mechanism of the sliding mode DC-TENG in full cyclic motion. (d) Structural design of the rotary mode DC-TENG. Inset shows a zoomed-in illustration of its stator. (e) Constant current output of the DC-TENG. (f) Photograph of 81 LEDs with stable luminance powered by a rotary mode DC-TENG [60].*

vacuum, where a dominant part is wasted because of air breakdown [46].

a next-generation DC-TENG via the triboelectrification effect and electrostatic

To harvest energy during electrostatic breakdown, Jie Wang et al. [60] designed

has been achieved in

is the theoretical upper limit in air [39, 44], but 1003 μC m<sup>−</sup><sup>2</sup>

*Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422* *Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

pulse series). Generally, TENGs need to connect with a rectifier or a capacitor to drive electronics, which takes away its portability advantage [58, 59]. Second, the pulsed output current of TENGs result in high crest factor, which is a key metric to output instability defined as the ratio of the peak value to the root mean square value. This greatly influences their performance for energy storage efficiency and powering electronics [59]. In addition, triboelectric charge density as one of the key properties of TENGs has been greatly increased; therefore, a very high

*mechanism of the DC-TENG in stable working state [57].*

*DC-TENG. (a) Structure of the DC-TENG. (b) Photograph of the DC-TENG. (c) Transferred charges of the DC-TENG. (d) Short-circuit current of the DC-TENG. (e) Output performance of DC-TENG using different triboelectric materials. (f) Schematic working principle of the DC-TENG achieved through the ionized air channel caused by air breakdown. (g) Circuit diagram of a 1-μF capacitor directly and continuously charged by the DC-TENG without a rectifier. (h) Measured voltage of a 1-μF capacitor charged by the DC-TENG at different frequencies. (i) Charging curve of a 1000-μF capacitor charged by the flexible multilayered DC-TENG (inset shows the photograph of a calculator powered by the charged capacitor). (i-v) The working* 

**60**

**Figure 8.**

#### **Figure 9.**

*Constant-current TENG. (a) A schematic illustration of the sliding mode DC-TENG. (b) Equivalent circuit model of the DC-TENG. (c) Working mechanism of the sliding mode DC-TENG in full cyclic motion. (d) Structural design of the rotary mode DC-TENG. Inset shows a zoomed-in illustration of its stator. (e) Constant current output of the DC-TENG. (f) Photograph of 81 LEDs with stable luminance powered by a rotary mode DC-TENG [60].*

electrostatic field will be built in TENG, which also leads to air breakdown and results in unwanted charge quantity loss and, consequently, quadratic loss in output power. The charge quantity loss can be roughly estimated with its charge density gap in air and vacuum. With a 50-μm PTFE film as a triboelectric layer, 240 μC m<sup>−</sup><sup>2</sup> is the theoretical upper limit in air [39, 44], but 1003 μC m<sup>−</sup><sup>2</sup> has been achieved in vacuum, where a dominant part is wasted because of air breakdown [46].

To harvest energy during electrostatic breakdown, Jie Wang et al. [60] designed a next-generation DC-TENG via the triboelectrification effect and electrostatic

breakdown, which consists of a frictional electrode (FE), a charge collecting electrode (CCE), and a triboelectric layer (**Figure 9a**). The CCE layer is fixed on the side of a sliding acrylic substrate, with a subtle distance to the triboelectric layer, which is a PTFE layer attached to another acrylic sheet. The CCE and FE both are copper electrodes here. The physics model of the new DC-TENG is made up of an electric charge source and a broken-down capacitor composed of the CCE and PTFE film, as its equivalent circuit briefly demonstrates in **Figure 9b**. It is different with a conventional TENG, whose paradigm is a variable capacitor initially charged by triboelectrification and generating AC pluses by electrostatic induction. The working mechanism of the DC-TENG is shown in **Figure 9c**. When the FE makes contact with the PTFE, electrons will transfer from the FE to PTFE based on triboelectrification effect. PTFE as an electret can hold a quasi-permanent electric charge (**Figure 9c, i**). Thus, when the slider moves forward, the electrons on the surface of PTFE will build a very high electric field between the negatively charged PTFE film and the CCE. As long as it exceeds the dielectric strength of the air between them, whose value is approximately 3 kV/mm from Paschen's law, it can cause the nearby air to partially ionize and begin conducting. Electrons will transfer from PTFE film to CCE (**Figure 9c, ii**); that is, the CCE is rationally placed to induce air breakdown, creating artificial lightning. When the slider is stationary on the surface of PTFE, electrons will stop transfer (**Figure 9c, iii**). Because the inner flow direction of electrons is fixed from the FE to the PTFE film and then to the CCE, the output electrons will also be in a single direction, that is, from the CCE to the FE. Thus, cyclic DC can be produced by periodically sliding the slider.

To optimize the output performance, a radially arrayed rotary of DC-TENG is fabricated by parallel multiple DC-TENGs, which is shown in **Figure 9d** and inset shows a zoomed-in illustration of its stator. When the motor rotates steadily, the crest factor of output current is very close to 1, indicating approximately constant current output characteristic (**Figure 9e**). This DC-TENG was demonstrated to charge capacitors or drive electronics without a rectifier. A light-emitting diode (LED) bulb arrays can also be lit up by the rotary mode DC-TENG with a rotation rate of 500 r min<sup>−</sup><sup>1</sup> (**Figure 9f**). Unlike when driven by the conventional AC-TENG, the LEDs remain at constant luminance without flashing lights.

#### **6. Conclusions**

Harvesting of environmental mechanical energy as an eco-friendly energy generation method is particularly a promising solution and plays an increasingly important role in driving wearable electronics and sensor networks in the IoTs. Based on the triboelectrification effect and electrostatic induction, the use of TENG invented in 2012 by Zhong Lin Wang has been demonstrated as a cost-effective, clean, and sustainable strategy to convert mechanical energy into electricity with comprehensive advantages of light-weight, small size, a wide choice of materials, and high efficiency even at low frequencies, which shows great potential in promoting the miniaturization trend of self-powered systems. With the gradually increase in triboelectric charge density, electrostatic breakdown, which is generally considered as a negative effect in the conventional TENG, becomes an issue that must to be considered. The theoretical and experimental studies of air breakdown in TENGs are important to promote the development of this field. By taking advantage of the electrostatic discharge, several types of DC-TENG have been demonstrated to power electronics directly without a rectifier or a capacitor. Comparing with the output characteristics of conventional TENG (AC consisted of pulse series), a constant-current output (crest factor ~1) is achieved by coupling triboelectrification

**63**

provided the original work is properly cited.

\*Address all correspondence to: wangjie@binn.cas.cn

*Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422*

in electrostatic breakdown.

51432005, 5151101243, 51561145021).

There is no conflict of interest.

**Acknowledgements**

**Conflict of interest**

**Author details**

Beijing, P. R. China

Atlanta, GA, USA

Sciences, Beijing, P. R. China

effect and electrostatic breakdown. This constant-current TENG has been demonstrated to drive LED bulb arrays that remain at constant luminance without flashing lights. Moreover, it can not only promote the miniaturization trend of TENG and self-powered systems but also provide a paradigm shifting technique to in situ gain electrical energy. Based on the above discussion and analysis, the electrostatic breakdown in TENG will soon become a hot issue and we would require new studies

The authors would like to thank the financial supports from the National Key R& D Project from Minister of Science and Technology (2016YFA0202704) and National Natural Science Foundation of China (Grant Nos. 61774016, 21773009,

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/ by/3.0), which permits unrestricted use, distribution, and reproduction in any medium,

1 Beijing Institute of Nanoenergy and Nanosystems, Chinese Academy of Sciences,

2 College of Nanoscience and Technology, University of Chinese Academy of

3 School of Materials Science and Engineering, Georgia Institute of Technology,

Jie Wang1,2\*, Di Liu1,2, Linglin Zhou1,2 and Zhong Lin Wang1,2,3

*Nanogenerators from Electrical Discharge DOI: http://dx.doi.org/10.5772/intechopen.86422*

effect and electrostatic breakdown. This constant-current TENG has been demonstrated to drive LED bulb arrays that remain at constant luminance without flashing lights. Moreover, it can not only promote the miniaturization trend of TENG and self-powered systems but also provide a paradigm shifting technique to in situ gain electrical energy. Based on the above discussion and analysis, the electrostatic breakdown in TENG will soon become a hot issue and we would require new studies in electrostatic breakdown.

#### **Acknowledgements**

*Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators*

breakdown, which consists of a frictional electrode (FE), a charge collecting electrode (CCE), and a triboelectric layer (**Figure 9a**). The CCE layer is fixed on the side of a sliding acrylic substrate, with a subtle distance to the triboelectric layer, which is a PTFE layer attached to another acrylic sheet. The CCE and FE both are copper electrodes here. The physics model of the new DC-TENG is made up of an electric charge source and a broken-down capacitor composed of the CCE and PTFE film, as its equivalent circuit briefly demonstrates in **Figure 9b**. It is different with a conventional TENG, whose paradigm is a variable capacitor initially charged by triboelectrification and generating AC pluses by electrostatic induction. The working mechanism of the DC-TENG is shown in **Figure 9c**. When the FE makes contact with the PTFE, electrons will transfer from the FE to PTFE based on triboelectrification effect. PTFE as an electret can hold a quasi-permanent electric charge (**Figure 9c, i**). Thus, when the slider moves forward, the electrons on the surface of PTFE will build a very high electric field between the negatively charged PTFE film and the CCE. As long as it exceeds the dielectric strength of the air between them, whose value is approximately 3 kV/mm from Paschen's law, it can cause the nearby air to partially ionize and begin conducting. Electrons will transfer from PTFE film to CCE (**Figure 9c, ii**); that is, the CCE is rationally placed to induce air breakdown, creating artificial lightning. When the slider is stationary on the surface of PTFE, electrons will stop transfer (**Figure 9c, iii**). Because the inner flow direction of electrons is fixed from the FE to the PTFE film and then to the CCE, the output electrons will also be in a single direction, that is, from the CCE

to the FE. Thus, cyclic DC can be produced by periodically sliding the slider.

the LEDs remain at constant luminance without flashing lights.

To optimize the output performance, a radially arrayed rotary of DC-TENG is fabricated by parallel multiple DC-TENGs, which is shown in **Figure 9d** and inset shows a zoomed-in illustration of its stator. When the motor rotates steadily, the crest factor of output current is very close to 1, indicating approximately constant current output characteristic (**Figure 9e**). This DC-TENG was demonstrated to charge capacitors or drive electronics without a rectifier. A light-emitting diode (LED) bulb arrays can also be lit up by the rotary mode DC-TENG with a rotation

Harvesting of environmental mechanical energy as an eco-friendly energy generation method is particularly a promising solution and plays an increasingly important role in driving wearable electronics and sensor networks in the IoTs. Based on the triboelectrification effect and electrostatic induction, the use of TENG invented in 2012 by Zhong Lin Wang has been demonstrated as a cost-effective, clean, and sustainable strategy to convert mechanical energy into electricity with comprehensive advantages of light-weight, small size, a wide choice of materials, and high efficiency even at low frequencies, which shows great potential in promoting the miniaturization trend of self-powered systems. With the gradually increase in triboelectric charge density, electrostatic breakdown, which is generally considered as a negative effect in the conventional TENG, becomes an issue that must to be considered. The theoretical and experimental studies of air breakdown in TENGs are important to promote the development of this field. By taking advantage of the electrostatic discharge, several types of DC-TENG have been demonstrated to power electronics directly without a rectifier or a capacitor. Comparing with the output characteristics of conventional TENG (AC consisted of pulse series), a constant-current output (crest factor ~1) is achieved by coupling triboelectrification

(**Figure 9f**). Unlike when driven by the conventional AC-TENG,

**62**

rate of 500 r min<sup>−</sup><sup>1</sup>

**6. Conclusions**

The authors would like to thank the financial supports from the National Key R& D Project from Minister of Science and Technology (2016YFA0202704) and National Natural Science Foundation of China (Grant Nos. 61774016, 21773009, 51432005, 5151101243, 51561145021).

### **Conflict of interest**

There is no conflict of interest.

### **Author details**

Jie Wang1,2\*, Di Liu1,2, Linglin Zhou1,2 and Zhong Lin Wang1,2,3

1 Beijing Institute of Nanoenergy and Nanosystems, Chinese Academy of Sciences, Beijing, P. R. China

2 College of Nanoscience and Technology, University of Chinese Academy of Sciences, Beijing, P. R. China

3 School of Materials Science and Engineering, Georgia Institute of Technology, Atlanta, GA, USA

\*Address all correspondence to: wangjie@binn.cas.cn

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/ by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Principles, problems and

C4FD00159A

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mattod.2016.12.001

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ncomms9975

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[10] Greason WD. Electrostatic

10.1016/0304-3886(92)90073-3

10.1029/JZ065i007p01873

Sons; 2005

2002;**287**(4):90-97

10.1109/5.659493

10.1109/4.782088

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DOI: 10.1109/tdmr.2005.846824

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[60] Liu D, Yin X, Guo H, Zhou L, Li X, Zhang C, et al. A constant-current triboelectric nanogenerator arising from electrostatic breakdown. Science Advances. 2019;**5**(4):eaav6437. DOI: 10.1126/sciadv.aav6437

Chapter 5

Abstract

TENG device.

optimization strategy

1. Introduction

69

Theoretical Prediction and

Optimization Approach to

He Zhang and Liwei Quan

Triboelectric Nanogenerator

Triboelectric nanogenerator (TENG) is a new type of electrostatic generator based on the principle of Maxwell displacement current. It could be designed as a device for either smart sensing or energy harvesting via converting mechanical energy into electric power efficiently. To predict its output characteristic, investigate its working mechanism, and enhance its working performance, the theoretical analysis and optimization work in either experimental or theoretical means are of great significance. In this chapter, we plan to introduce the progress of theoretical analysis and optimization approach to TENG with four different modes. Three parts

of work will be introduced in the manuscript: (1) the theoretical prediction approach for electric output performance of TENG device, (2) the optimization strategies for TENG device based on figure of merits, and (3) the scaling laws between the normalized electric outputs and multiple physical properties of the

Keywords: triboelectric nanogenerator, theoretical analysis, scaling law,

Triboelectric nanogenerator (TENG) [1, 2] is a revolutionary mechanical energy harvesting technology based on triboelectrification and induction effects of two materials with opposite electric polarities. This device contains two dissimilar dielectric films facing with each other, and there are electrodes deposited on the top and the bottom surfaces of the two films. The working mechanism of TENG is based on triboelectric effect and principle of displacement current. TENG may utilize the surface electrostatic charges produced in physical contact-separation process of the two insulators to generate electric power. By separating the tribo-pair with contact-induced triboelectric charges, a potential drop will be generated which forces the electrons to flow between the two electrodes. Compared with other renewable energy technologies including solar cells [3], biofuels [4], tide generator [5], etc., TENGs are less restricted by environmental or climatic conditions. In applications of mechanical energy harvesting, TENGs have much higher power output and energy conversion efficiency than those of electromagnetic [6] and piezoelectric energy harvesters [7–11]. Besides, TENGs can be made from low-cost materials by easy manufacture processes because of its simple device structures and

#### Chapter 5

## Theoretical Prediction and Optimization Approach to Triboelectric Nanogenerator

He Zhang and Liwei Quan

#### Abstract

Triboelectric nanogenerator (TENG) is a new type of electrostatic generator based on the principle of Maxwell displacement current. It could be designed as a device for either smart sensing or energy harvesting via converting mechanical energy into electric power efficiently. To predict its output characteristic, investigate its working mechanism, and enhance its working performance, the theoretical analysis and optimization work in either experimental or theoretical means are of great significance. In this chapter, we plan to introduce the progress of theoretical analysis and optimization approach to TENG with four different modes. Three parts of work will be introduced in the manuscript: (1) the theoretical prediction approach for electric output performance of TENG device, (2) the optimization strategies for TENG device based on figure of merits, and (3) the scaling laws between the normalized electric outputs and multiple physical properties of the TENG device.

Keywords: triboelectric nanogenerator, theoretical analysis, scaling law, optimization strategy

#### 1. Introduction

Triboelectric nanogenerator (TENG) [1, 2] is a revolutionary mechanical energy harvesting technology based on triboelectrification and induction effects of two materials with opposite electric polarities. This device contains two dissimilar dielectric films facing with each other, and there are electrodes deposited on the top and the bottom surfaces of the two films. The working mechanism of TENG is based on triboelectric effect and principle of displacement current. TENG may utilize the surface electrostatic charges produced in physical contact-separation process of the two insulators to generate electric power. By separating the tribo-pair with contact-induced triboelectric charges, a potential drop will be generated which forces the electrons to flow between the two electrodes. Compared with other renewable energy technologies including solar cells [3], biofuels [4], tide generator [5], etc., TENGs are less restricted by environmental or climatic conditions. In applications of mechanical energy harvesting, TENGs have much higher power output and energy conversion efficiency than those of electromagnetic [6] and piezoelectric energy harvesters [7–11]. Besides, TENGs can be made from low-cost materials by easy manufacture processes because of its simple device structures and configurations. These advantages make this new technology a better choice as power source for devices and microsystems [1, 2].

of a TENG device, the device figure of merits of TENG is proposed and used to

Although various theoretical models have been established for TENG, most of them are based on single-parameter analysis which focuses on investigating the effect of single variable on device performance with others fixed. For instance, in optimization of the thickness of dielectric materials, we may obtain its effect with other parameters fixed. The same procedure is required in repetition for other working conditions with different sets of fixed parameters. Yet the optimized structures and conditions may not be the best as many parameters are correlated. To address this problem, Zhang proposed a set of formulations for normalized electrical outputs of the device in dimensionless forms [25, 26]. The expressions for these normalized outputs rely on two compound parameters composed of device dimensions (sizes, dielectric layer thickness), electrical properties of the electrode and dielectric materials, loading conditions (loading force, frequency, and motor process), and the circuit conditions (open/short circuit and load resistance). With these expressions, a multiparameter analysis method for theoretical approach for optimization of TENG has been derived. This method makes it possible to realize the optimization of the device by tuning different physical parameters simultaneously, which may reveal the real situation of the TENG that its output performance is influenced simultaneously and coherently by a number of factors.

In this chapter, the theoretical approaches of V-Q-x relationship for different TENGs are presented. Along with these relationships, the output performance of TENG and the optimization method with material and device figure of merits for TENG are discussed. Lastly, the multiparameter analysis method and the optimiza-

2. The theoretical prediction and optimization strategies for TENG

The four basic modes of TENG are of similar structure with two layers of different materials (dielectric-dielectric or dielectric-electrode), which are usually called tribo-pair. When the tribo-pair comes into contact, some charges move from one material to another to equalize their electrochemical potential due to triboelectric effect. When forced to separate, some of the surface charges tend to keep the original state, while the others tend to give electrons away, possibly producing triboelectric charges on the surfaces. The presence of triboelectric charges on dielectric surfaces can be a force for driving electrons in the electrode to flow in

As Figure 1 shows, there are two different motion patterns including contactseparation and sliding in these four modes of TENG. For the contact-separation mode and single-electrode mode TENG, the tribo-pair moves vertically and creates

an air gap in between, while for the contact-sliding mode and freestanding

In this section, the theoretical prediction for output performance and optimization strategies for design of TENG are discussed from three different aspects: the theoretical prediction approach for V-Q-x relationship of different modes of TENGs is presented firstly, followed by the principle of material and structure figure of merit for different modes of TENG and corresponding optimization strategies, and, lastly, the scaling laws between the normalized electric output of TENG and multiple physical properties are derived, with which the optimization strategies for

tion strategy for TENG are presented.

2.1 The V-Q-x relationship of TENG

order to balance the electric potential drop created.

TENG are provided.

71

determine the maximum output power density of a TENG [22–24].

DOI: http://dx.doi.org/10.5772/intechopen.86992

Theoretical Prediction and Optimization Approach to Triboelectric Nanogenerator

TENG has four basic operational modes with different structures: contactseparation mode, sliding mode, single-electrode mode, and freestanding mode. As Figure 1 shows, these different modes are designed to meet the needs in different fields of applications. Based on these four modes, various TENG devices have been developed for different applications. Using these four modes and their combinations, a range of TENG devices have been invented for energy harvesting like wind and water, structure vibration and biomechanical motion energy harvesters, and self-powered smart sensing like vector sensor, tactile sensor, vibration detection, human physical signal detection, etc. [12–16].

With the progress of materials, structure design, and theories in fundamental mechanisms, the output performance of TENG is improved vigorously. Since its invention, the output power density of TENGs increases from initially a few μW/m<sup>2</sup> and mW/m2 to tens of W/m2 . In recent works, a TENG with power density up to 500 W/m<sup>2</sup> and energy conversion efficiency more than 70% has been achieved, which is adequate to power most microelectronic devices and systems [2]. It is the optimization that makes the performance of the device greatly improved.

To further improve the output performance of the device, optimization design is of great importance and has already attracted attentions. In early works, the development of a new type of TENG devices or optimization of TENG design is typically realized through trial-and-error process experimentally, which is of high cost and time-consuming. Compared with experimental means, theoretical analysis is useful and more powerful in understanding the working mechanism of the device and could offer better optimization strategy for device structural design, material selection, and operation conditions. It is more convenient to realize the optimization of TENG with theoretical method rather than in experimental means. Based on the basic working mechanism of TENGs, the theoretical models for TENG have been established, a series of parameter analysis works have been carried out, and the relationship between the parameters and the output performance is obtained [17–21]. In addition, to establish a standard for evaluating different architectures

Figure 1. Four fundamental modes of triboelectric nanogenerator [1].

#### Theoretical Prediction and Optimization Approach to Triboelectric Nanogenerator DOI: http://dx.doi.org/10.5772/intechopen.86992

of a TENG device, the device figure of merits of TENG is proposed and used to determine the maximum output power density of a TENG [22–24].

Although various theoretical models have been established for TENG, most of them are based on single-parameter analysis which focuses on investigating the effect of single variable on device performance with others fixed. For instance, in optimization of the thickness of dielectric materials, we may obtain its effect with other parameters fixed. The same procedure is required in repetition for other working conditions with different sets of fixed parameters. Yet the optimized structures and conditions may not be the best as many parameters are correlated.

To address this problem, Zhang proposed a set of formulations for normalized electrical outputs of the device in dimensionless forms [25, 26]. The expressions for these normalized outputs rely on two compound parameters composed of device dimensions (sizes, dielectric layer thickness), electrical properties of the electrode and dielectric materials, loading conditions (loading force, frequency, and motor process), and the circuit conditions (open/short circuit and load resistance). With these expressions, a multiparameter analysis method for theoretical approach for optimization of TENG has been derived. This method makes it possible to realize the optimization of the device by tuning different physical parameters simultaneously, which may reveal the real situation of the TENG that its output performance is influenced simultaneously and coherently by a number of factors.

In this chapter, the theoretical approaches of V-Q-x relationship for different TENGs are presented. Along with these relationships, the output performance of TENG and the optimization method with material and device figure of merits for TENG are discussed. Lastly, the multiparameter analysis method and the optimization strategy for TENG are presented.

#### 2. The theoretical prediction and optimization strategies for TENG

In this section, the theoretical prediction for output performance and optimization strategies for design of TENG are discussed from three different aspects: the theoretical prediction approach for V-Q-x relationship of different modes of TENGs is presented firstly, followed by the principle of material and structure figure of merit for different modes of TENG and corresponding optimization strategies, and, lastly, the scaling laws between the normalized electric output of TENG and multiple physical properties are derived, with which the optimization strategies for TENG are provided.

#### 2.1 The V-Q-x relationship of TENG

The four basic modes of TENG are of similar structure with two layers of different materials (dielectric-dielectric or dielectric-electrode), which are usually called tribo-pair. When the tribo-pair comes into contact, some charges move from one material to another to equalize their electrochemical potential due to triboelectric effect. When forced to separate, some of the surface charges tend to keep the original state, while the others tend to give electrons away, possibly producing triboelectric charges on the surfaces. The presence of triboelectric charges on dielectric surfaces can be a force for driving electrons in the electrode to flow in order to balance the electric potential drop created.

As Figure 1 shows, there are two different motion patterns including contactseparation and sliding in these four modes of TENG. For the contact-separation mode and single-electrode mode TENG, the tribo-pair moves vertically and creates an air gap in between, while for the contact-sliding mode and freestanding

configurations. These advantages make this new technology a better choice as

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

TENG has four basic operational modes with different structures: contactseparation mode, sliding mode, single-electrode mode, and freestanding mode. As Figure 1 shows, these different modes are designed to meet the needs in different fields of applications. Based on these four modes, various TENG devices have been developed for different applications. Using these four modes and their combinations, a range of TENG devices have been invented for energy harvesting like wind and water, structure vibration and biomechanical motion energy harvesters, and self-powered smart sensing like vector sensor, tactile sensor, vibration detection,

With the progress of materials, structure design, and theories in fundamental mechanisms, the output performance of TENG is improved vigorously. Since its invention, the output power density of TENGs increases from initially a few μW/m<sup>2</sup>

To further improve the output performance of the device, optimization design is of great importance and has already attracted attentions. In early works, the development of a new type of TENG devices or optimization of TENG design is typically realized through trial-and-error process experimentally, which is of high cost and time-consuming. Compared with experimental means, theoretical analysis is useful and more powerful in understanding the working mechanism of the device and could offer better optimization strategy for device structural design, material selection, and operation conditions. It is more convenient to realize the optimization of TENG with theoretical method rather than in experimental means. Based on the basic working mechanism of TENGs, the theoretical models for TENG have been established, a series of parameter analysis works have been carried out, and the relationship between the parameters and the output performance is obtained [17–21]. In addition, to establish a standard for evaluating different architectures

500 W/m<sup>2</sup> and energy conversion efficiency more than 70% has been achieved, which is adequate to power most microelectronic devices and systems [2]. It is the

optimization that makes the performance of the device greatly improved.

. In recent works, a TENG with power density up to

power source for devices and microsystems [1, 2].

human physical signal detection, etc. [12–16].

and mW/m2 to tens of W/m2

Figure 1.

70

Four fundamental modes of triboelectric nanogenerator [1].

tribo-layer mode, the tribo-pair moves laterally. For these two different kinds of motion process, the theoretical models are quite different, which will be discussed in Sections 2.1.1 and 2.1.2, respectively.

Substituting Eq. (1) into Eq. (2), we will have the equation for Q as

Theoretical Prediction and Optimization Approach to Triboelectric Nanogenerator

With initial condition of Q tð Þ¼ ¼ 0 0, the expression of Q(t) will be

� σ Rε<sup>0</sup> e � <sup>1</sup> RSε<sup>0</sup> <sup>d</sup>0t<sup>þ</sup> Ðt <sup>0</sup> x tð Þd<sup>t</sup> � � <sup>ð</sup><sup>t</sup>

<sup>þ</sup> <sup>σ</sup>ð Þ <sup>d</sup><sup>0</sup> <sup>þ</sup> x tð Þ ε0

separation gap x tð Þ between tribo-pair (see Figure 3a, black solid line).

<sup>A</sup> sin <sup>π</sup><sup>t</sup> ηT

function to describe the motion process of the tribo-pair as

8 < :

ð Þ 1 � η T < t ≤T when the tribo-pair keeps contact (x ¼ 0).

x tðÞ¼

exp � <sup>d</sup>0ð Þ <sup>t</sup> � <sup>τ</sup> RSε<sup>0</sup>

ð Þþ <sup>d</sup><sup>0</sup> <sup>þ</sup> x tð Þ <sup>σ</sup>x tð Þ

exp � <sup>1</sup>

This V-Q-x relationship provides a means for evaluation of the electric output of contact-mode TENG, which may also be used for single-electrode mode TENG. To verify the accuracy and precision of the proposed relationship, the experimental results from Ref. [16] are utilized here as an example for contact-mode TENG. Glass and polydimethylsiloxane (PDMS) are used as the tribo-pair in the experiment in planar form. The physical parameters of the device and experiment design are listed in Table 1. The TENG device is driven by a dynamic testing machine with

According to the experimental settings in Ref. [16], we introduce a piecewise

Here, η is the separation ratio representing the ratio of the separation time to the entire period. The smaller the separation ratio, the faster the tribo-pair gets into contact and thus the longer the contact time. In each period, the dielectric plates are supposed to start the charging process which occupies the time period from 0 to

Parameter Value Thickness of PDMS plate d1 100 μm Relative permittivity of PDMS εr1 2.7 Thickness of glass d2 1 mm Relative permittivity of glass εr2 7.2 Permittivity of vacuum <sup>ε</sup><sup>0</sup> 8.854 � <sup>10</sup>�<sup>12</sup> F/m Area of the dielectrics S 25 cm2 Surface charge density σ 5–40 μC/m<sup>2</sup>

0, 0≤ t≤ð Þ 1 � η T,

� �, ð Þ <sup>1</sup> � <sup>η</sup> <sup>T</sup> <sup>&</sup>lt; <sup>t</sup><sup>≤</sup> <sup>T</sup>:

RSε<sup>0</sup>

ðt τ x zð Þdz

� <sup>1</sup> RSε<sup>0</sup>

� �d<sup>τ</sup>

ε0

0 d0e 1 RSε<sup>0</sup> <sup>d</sup>0z<sup>þ</sup>

d0t þ

� � � �

ðt 0 x tð Þdt (3)

dz

(4)

(5)

(6)

Ð z <sup>0</sup> x tð Þd<sup>z</sup> � �

<sup>d</sup><sup>t</sup> ¼ � <sup>Q</sup> Sε<sup>0</sup>

<sup>R</sup> <sup>d</sup><sup>Q</sup>

RSε<sup>0</sup> <sup>d</sup>0t<sup>þ</sup> Ðt <sup>0</sup> x tð Þd<sup>t</sup> � �

DOI: http://dx.doi.org/10.5772/intechopen.86992

dt ¼ � <sup>σ</sup>d<sup>0</sup> ε0

> d<sup>0</sup> þ x tð Þ RSε<sup>0</sup>

ðt 0

With the output voltage as

<sup>Q</sup> <sup>¼</sup> <sup>σ</sup><sup>S</sup> � <sup>σ</sup>Se� <sup>1</sup>

V tðÞ¼ <sup>R</sup> dQ

Table 1.

73

Parameters of contact-mode TENG [16].

<sup>þ</sup> <sup>σ</sup>d<sup>0</sup> ε0

#### 2.1.1 Contact-separation mode TENG

According to the materials used and device structures, the contact-separation mode TENGs fall into two categories: dielectric-to-dielectric contact and conductorto-dielectric contact structures (Figure 2). Based on Gauss's law, we may consider this kind of TENG as a series of flat plate capacitors; the relationship between electric field E in the tribo-pair and the total charge density ρ is ∇ � E ¼ ρ=ε0. When the charged surfaces move, according to Maxwell's equations, the electric displacement field is defined as D ¼ ε0E þ P; therefore, the current density is JD ¼ ε<sup>0</sup> ∂E <sup>∂</sup><sup>t</sup> <sup>þ</sup> <sup>∂</sup><sup>P</sup> ∂t . Thus, we can get the V-Q-x relationship of TENG [18].

The thicknesses of the dielectric plates in tribo-pair are assumed to be d<sup>1</sup> and d<sup>2</sup> with the relative dielectric constants ε<sup>r</sup><sup>1</sup> and εr2, respectively. According to the Gauss theorem, the electric field strengths of each layer in the dielectric-todielectric mode TENG are E<sup>1</sup> ¼ �Q=Sε0ε<sup>r</sup><sup>1</sup> for dielectric plate 1, E<sup>2</sup> ¼ �Q=Sε0ε<sup>r</sup><sup>2</sup> for dielectric plate 2, and Eair ¼ �ð Þ Q=S þ σð Þt =ε<sup>0</sup> in the air gap, respectively. Here ε<sup>0</sup> is the vacuum permittivity, σ is the charge density at the contact surface of the tribo-pair, and S is the contact area of the tribo-pair. The voltage between the two electrodes is V ¼ E1d<sup>1</sup> þ E2d<sup>2</sup> þ Eairx tð Þ. For the conductor-to-dielectric structure TENG, there will be no dielectric plate 2, i.e., d<sup>2</sup> and E<sup>2</sup> are zero; thus the voltage becomes V ¼ E1d<sup>1</sup> þ Eairx tð Þ. If we define the equivalent thickness of the dielectric plates to be d<sup>0</sup> ¼ d1=ε<sup>r</sup><sup>1</sup> þ d2=εr2, the V-Q-x relationship could be expressed as follows:

$$V = -\frac{Q}{\mathcal{S}\varepsilon\_0} (d\_0 + \varkappa(t)) + \frac{\sigma \varkappa(t)}{\varepsilon\_0} \tag{1}$$

Here, x tð Þ is the varying gap distance between the tribo-pair due to external mechanical loading imposed to the TENG device. In special circuit conditions, for short-circuit condition with the output voltage V ¼ 0, the current is Isc <sup>¼</sup> <sup>d</sup><sup>Q</sup> <sup>d</sup><sup>t</sup> <sup>¼</sup> <sup>S</sup>σd<sup>0</sup> ð Þ <sup>d</sup>0þx tð Þ <sup>2</sup> dx dt ; for open-circuit condition with transferred charge Q ¼ 0, the voltage is Voc <sup>¼</sup> <sup>σ</sup>x tð Þ <sup>ε</sup><sup>0</sup> .

According to Ohm's law, when the TENG is connected with a load resistance R to form a circuit, the output voltage in the circuit can be expressed as

$$V = IR = R\frac{dQ}{dt} \tag{2}$$

#### Figure 2.

Basic structure and model of the contact-mode TENG. (a) Dielectric-to-dielectric mode TENG and (b) conductor-to-dielectric mode TENG [18].

Theoretical Prediction and Optimization Approach to Triboelectric Nanogenerator DOI: http://dx.doi.org/10.5772/intechopen.86992

Substituting Eq. (1) into Eq. (2), we will have the equation for Q as

$$R\frac{dQ}{dt} = -\frac{Q}{Se\_0}(d\_0 + \varkappa(t)) + \frac{\sigma \varkappa(t)}{\varepsilon\_0} \tag{3}$$

With initial condition of Q tð Þ¼ ¼ 0 0, the expression of Q(t) will be

$$\mathbf{Q} = \sigma \mathbf{S} - \sigma \mathbf{S} e^{-\frac{1}{\mathbf{E}\varepsilon\_0} \left( d\_0 t + \int\_0^t \mathbf{x}(t) d\mathbf{r} \right)} - \frac{\sigma}{R\varepsilon\_0} e^{-\frac{1}{\mathbf{E}\varepsilon\_0} \left( d\_0 t + \int\_0^t \mathbf{x}(t) d\mathbf{r} \right)} \int\_0^t d\_0 e^{\frac{1}{\mathbf{E}\varepsilon\_0} \left( d\_0 \mathbf{z} + \int\_0^\mathbf{z} \mathbf{x}(t) d\mathbf{z} \right)} \mathbf{d} \mathbf{z}} \tag{4}$$

With the output voltage as

tribo-layer mode, the tribo-pair moves laterally. For these two different kinds of motion process, the theoretical models are quite different, which will be discussed

Electrical Discharge - From Electrical breakdown in Micro-gaps to Nano-generators

According to the materials used and device structures, the contact-separation mode TENGs fall into two categories: dielectric-to-dielectric contact and conductorto-dielectric contact structures (Figure 2). Based on Gauss's law, we may consider this kind of TENG as a series of flat plate capacitors; the relationship between electric field E in the tribo-pair and the total charge density ρ is ∇ � E ¼ ρ=ε0. When the charged surfaces move, according to Maxwell's equations, the electric displacement field is defined as D ¼ ε0E þ P; therefore, the current density is

. Thus, we can get the V-Q-x relationship of TENG [18]. The thicknesses of the dielectric plates in tribo-pair are assumed to be d<sup>1</sup> and d<sup>2</sup>

dielectric mode TENG are E<sup>1</sup> ¼ �Q=Sε0ε<sup>r</sup><sup>1</sup> for dielectric plate 1, E<sup>2</sup> ¼ �Q=Sε0ε<sup>r</sup><sup>2</sup> for dielectric plate 2, and Eair ¼ �ð Þ Q=S þ σð Þt =ε<sup>0</sup> in the air gap, respectively. Here ε<sup>0</sup> is the vacuum permittivity, σ is the charge density at the contact surface of the tribo-pair, and S is the contact area of the tribo-pair. The voltage between the two electrodes is V ¼ E1d<sup>1</sup> þ E2d<sup>2</sup> þ Eairx tð Þ. For the conductor-to-dielectric structure TENG, there will be no dielectric plate 2, i.e., d<sup>2</sup> and E<sup>2</sup> are zero; thus the voltage becomes V ¼ E1d<sup>1</sup> þ Eairx tð Þ. If we define the equivalent thickness of the dielectric plates to be d<sup>0</sup> ¼ d1=ε<sup>r</sup><sup>1</sup> þ d2=εr2, the V-Q-x relationship could be expressed as

ð Þþ <sup>d</sup><sup>0</sup> <sup>þ</sup> x tð Þ <sup>σ</sup>x tð Þ

Here, x tð Þ is the varying gap distance between the tribo-pair due to external mechanical loading imposed to the TENG device. In special circuit conditions, for short-circuit condition with the output voltage V ¼ 0, the current is

According to Ohm's law, when the TENG is connected with a load resistance R to

<sup>V</sup> <sup>¼</sup> IR <sup>¼</sup> <sup>R</sup> <sup>d</sup><sup>Q</sup>

Basic structure and model of the contact-mode TENG. (a) Dielectric-to-dielectric mode TENG and (b)

ε0

; for open-circuit condition with transferred charge Q ¼ 0, the

<sup>d</sup><sup>t</sup> (2)

(1)

with the relative dielectric constants ε<sup>r</sup><sup>1</sup> and εr2, respectively. According to the Gauss theorem, the electric field strengths of each layer in the dielectric-to-

> <sup>V</sup> ¼ � <sup>Q</sup> Sε<sup>0</sup>

form a circuit, the output voltage in the circuit can be expressed as

in Sections 2.1.1 and 2.1.2, respectively.

2.1.1 Contact-separation mode TENG

JD ¼ ε<sup>0</sup>

follows:

Isc <sup>¼</sup> <sup>d</sup><sup>Q</sup>

Figure 2.

72

<sup>d</sup><sup>t</sup> <sup>¼</sup> <sup>S</sup>σd<sup>0</sup> ð Þ <sup>d</sup>0þx tð Þ <sup>2</sup>

voltage is Voc <sup>¼</sup> <sup>σ</sup>x tð Þ

dx dt

<sup>ε</sup><sup>0</sup> .

conductor-to-dielectric mode TENG [18].

∂E <sup>∂</sup><sup>t</sup> <sup>þ</sup> <sup>∂</sup><sup>P</sup> ∂t

$$\begin{split} V(t) &= R\frac{dQ}{dt} = -\frac{\sigma d\_0}{\varepsilon\_0} + \frac{\sigma(d\_0 + \varkappa(t))}{\varepsilon\_0} \exp\left[ -\frac{1}{R\mathcal{S}\varepsilon\_0} \left( d\_0 t + \int\_0^t \varkappa(t) d\mathbf{t} \right) \right] \\ &+ \frac{\sigma d\_0}{\varepsilon\_0} \frac{d\_0 + \varkappa(t)}{R\mathcal{S}\varepsilon\_0} \int\_0^t \exp\left( -\frac{d\_0(t-\tau)}{R\mathcal{S}\varepsilon\_0} - \frac{1}{R\mathcal{S}\varepsilon\_0} \int\_\tau^t \varkappa(\mathbf{z}) d\mathbf{z} \right) d\tau \end{split} \tag{5}$$

This V-Q-x relationship provides a means for evaluation of the electric output of contact-mode TENG, which may also be used for single-electrode mode TENG.

To verify the accuracy and precision of the proposed relationship, the experimental results from Ref. [16] are utilized here as an example for contact-mode TENG. Glass and polydimethylsiloxane (PDMS) are used as the tribo-pair in the experiment in planar form. The physical parameters of the device and experiment design are listed in Table 1. The TENG device is driven by a dynamic testing machine with separation gap x tð Þ between tribo-pair (see Figure 3a, black solid line).

According to the experimental settings in Ref. [16], we introduce a piecewise function to describe the motion process of the tribo-pair as

$$\mathbf{x}(t) = \begin{cases} \mathbf{0}, & \mathbf{0} \le t \le (1 - \eta)T, \\\ A \sin\left(\frac{\pi t}{\eta T}\right), & (1 - \eta)T < t \le T. \end{cases} \tag{6}$$

Here, η is the separation ratio representing the ratio of the separation time to the entire period. The smaller the separation ratio, the faster the tribo-pair gets into contact and thus the longer the contact time. In each period, the dielectric plates are supposed to start the charging process which occupies the time period from 0 to ð Þ 1 � η T < t ≤T when the tribo-pair keeps contact (x ¼ 0).


#### Table 1. Parameters of contact-mode TENG [16].

<sup>V</sup> <sup>¼</sup> <sup>σ</sup>d<sup>0</sup> ε0

DOI: http://dx.doi.org/10.5772/intechopen.86992

þ d0 ε0RS

for TENG as

resistance.

Table 2.

75

Area of the dielectrics S (m2

Parameters of sliding-mode TENG [17].

l

l <sup>l</sup> � x tð Þ <sup>ð</sup><sup>t</sup>

<sup>l</sup> � x tð Þ exp � <sup>d</sup><sup>0</sup>

Theoretical Prediction and Optimization Approach to Triboelectric Nanogenerator

0 exp

<sup>P</sup>eff <sup>¼</sup> <sup>1</sup> T

Here,T is the time span of one mechanical loading cycle.

by Eq. (8) agree very well with the experimental result.

<sup>ε</sup>0RS <sup>ð</sup><sup>t</sup> 0

> d0 <sup>ε</sup>0RS <sup>ð</sup><sup>t</sup> 0

Based on these output voltage expressions, we can get the average power output

ðtþ<sup>T</sup> t

This V-Q-x relationship provides a method for evaluation of the electric output of

Based on the V-Q-x relationships presented from Eqs. (5)–(8), the output performance of TENG is predictable when device structure, material parameters, and motion process are clear. With these equations, the influence of each parameter is clear, while all others are certain. For example, we can change the one parameter such as load resistance while all the others kept unchanged. As a result, we can get the output characteristic of the target TENG device and find out the optimized load

With this method, parametric analyses are carried out to characterize the output performance of TENGs with different working conditions. Niu et al. studied the output characteristics of contact-mode [18], sliding-mode [19], single-electrode

) 0.05 � 0.071

Parameter Value Dielectric tribo-pair PTFE-nylon Thickness of nylon plate d1 (μm) 50 Relative permittivity of Nylon εr1 4 Thickness of PTFE plate d2 (μm) 50 Relative permittivity of PTFE εr2 2.1 Permittivity of vacuum <sup>ε</sup>0 (F/m) 8.854 � <sup>10</sup>�<sup>12</sup>

Surface charge density σ (μCm�2) 200 Maximum separate distance A (m) 0.05 Acceleration a (m=s2) 20 Load resistance R (MΩ) 10–1000

sliding-mode TENG, which may be easily extended as a methodology for sliding freestanding tribo-layer mode TENG. To make sure the accuracy and precision of the proposed V-Q-x relationship of sliding-mode TENG, the experiments from Ref. [17] are carried out for validation. The materials and scale parameters are shown in Table 2. In the experiments, the tribo-pair is fixed on a horizontal tensile loading platform for reciprocating lateral sliding process. The sliding process of the tribo-pair was imposed by the dynamic testing machine with a symmetric accelerationdeceleration mode (Figure 5c). The analytical results of the voltage output obtained

V2

� � �

l <sup>l</sup> � x tð Þ <sup>d</sup><sup>t</sup>

!

l l � xð Þδ

t

0

dδ

dt <sup>0</sup> � 1

<sup>R</sup> <sup>d</sup><sup>t</sup> (9)
