**2.1 Fabrication and structure design**

There exist several implementation styles for APDs, of which two are the most used. In the first style, known as reach-through APD, one builds a *p*+–π–*p*–*n* structure where denotes very lightly *p*-doped (McIntyre, 1985). When reverse biased, the depletion region extends from the cathode to the anode. Thus, the multiplication region is deep in the *p*/*n*+ junction. Due to the depth of the multiplication region, this device is indicated for absorption of red and NIR photons up 1.1 m (for silicon). Since the photoelectrons drift until the multiplication region, a larger timing uncertainty is generally observed.

The second implementation style is compatible with planar CMOS processes and it involves a shallow or medium depth *p* or *n* layer to form high-voltage *pn* junctions. Cova and others have investigated devices designed in this style since the 1970s, yielding a number of structures (Cova et al. 1981). All these structures have in common a *pn* junction and a zone designed to prevent premature edge breakdown. An example of the early structures is reported in the work of Zappa et al. (1997) *n*+/*p*+ enrichment in p-substrate was used, while premature edge breakdown was prevented by confining *p*+ enrichment in the centre of the device.

More recently, many authors have developed APDs, both in linear and Geiger mode, using dedicated planar and non planar processes, achieving superior performance in terms of sensitivity and noise (Kindt 1999).

The main disadvantage of using dedicated processes is generally the lack of libraries that can support complex functionalities and deep-submicrometre feature sizes, thus limiting array sizes. An interesting alternative is the use of a hybrid approach whereby the APD array and ancillary electronics are implemented in two different processes, each optimized for APD performance and speed, respectively. If the ancillary electronics is implemented in CMOS, high degrees of miniaturization are possible. The price to pay is increased

Time Resolved Camera: The New Frontier of Imaging Devices 309

After the avalanche is triggered, the current keeps flowing until the avalanche is quenched by lowering the bias voltage down to breakdown voltage or below. After a dead-time, the operative voltage must be restored in order to make the SPAD able to detect another photon. This operation requires a suitable electronics with the following tasks: (i) it senses the leading edge of the avalanche current; (ii) it generates a standard output pulse, synchronous with the current onset; (iii) it quenches the avalanche by lowering the bias below the breakdown voltage; (iv) it restores the photodiode voltage to the operating level. This circuit is usually referred to as quenching circuit. The two main quenching strategies are: passive and active (Cova et al. 1996). Recently, very promising results were obtained by

In passive quenching the avalanche current itself is used to drop the voltage across the diode. This is generally accomplished via a ballast resistor RL (normally few hundreds kΩ) placed on the anode or the cathode of the diode as shown in figure 3. The detection of the avalanche can be accomplished by measuring the current across a low resistivity path RS.

Fig. 3. Schematic representation of a passive quenching circuit. In the left part is shown the

Today modern technology gives also the possibility to produce SPAD detectors with integrate quenching mechanism based on a Metal-Resistor-Semiconductor structure. Precise resistive elements (or using the non-linear characteristics of a biased PMOS or NMOS, Niclass et al. 2005) are embedded for each individual micro-cell of the array and provide effective feedback for stabilization and quenching of the avalanche process also reducing the

A circuit model, which emulates the evolution of the signal of a SPAD was developed in the 1960s to describe the behaviour of micro-plasma instability in silicon (McIntyre 1961). According to this model, the pre-breakdown state can be represented as a capacitance (junction capacitance, CD) in series with the quenching resistor. Referring to Fig. 3(left), this

**2.2 Quenching strategy** 

using also a mixed approach (Mingguo et al. 2008).

Pulse shaping may be performed using a discriminator.

equivalent circuit of a SPAD detector.

values of the stray capacitance from cathode to ground.

fabrication complexity. The integration of SPADs in a low-cost CMOS process became feasible since 2003 (Sciacca et. al 2003).

An example of latest developed structures is shown in figure 2 (Sciacca et. al 2003). The *np* junction has an *n*+ shallow diffusion and a controlled Boron enrichment diffusion in the central zone of it. With respect to the outer abrupt *np* junction, the higher *p*+ doping concentration reduces the breakdown voltage in the central zone, which is the active area.

The process starts with a Si <100> *n*- substrate on which is grew a boron doped epitaxial layer with a *p*+ buried layer and with a *p*- doped layer. The reason to form a buried *pn* junction is twofold. First, the detector time-response is improved because the effect of photogenerated carriers diffusing in the undepleted region is reduced (G. Ripamonti et al. 1985). Second, isolation with the substrate is introduced and makes possible the monolithic integration of various SPADs and other devices and circuits. The *p*+ buried layer is necessary to reduce the series resistance of the device.

The *p*- layer must be thin enough to limit the photo-carrier diffusion effect above mentioned. A good trade off has to be found for this thickness, because if it is made too thin the edge breakdown occurs at a voltage not much higher than the breakdown voltage of the active area. The *p*+ sinkers are then created with a high-dose boron implantation step, in order to reduce the contact resistance of the anode and provide a low resistance path to the avalanche current.

The next step, a local gettering process, is a key step in the process because it guarantees a uniform defect concentration over the volume. At this point a heavy POCl3 diffusion through an oxide mask is made on the topside of the wafer close to the device active area. Heavy phosphorus diffusions are well known to be responsible for transition metal gettering. Unfortunately, the well-known phosphorous predeposition on the backside of the wafer is not able to getter the distant active area of the device because metal diffusers (Pt, Au , Ti) diffuse too slowly during the final anneal. For this reason, if the gettering sites are created suitably close to the active region, a major improvement on dark counting rate is observed. The next step is the *p*+ enrichment diffusion obtained with a low energy boron implantation, producing a concentration peak, followed by a high temperature anneal and drive in (Lacaita et al. 1989).

The first generation of devices was fabricated with a deposited polysilicon cathode doped by Arsenic implantation and diffusion. The As+ ion implantation energy was carefully calculated in order to damage as little as possible the active area of the device; nevertheless, devices with very high dark-counting rate resulted. A remarkable improvement was obtained in the second generation by doping in situ the polysilicon. Further improvement was achieved in the third generation by accurately designing a Rapid Thermal Anneal to create a precisely controlled shallow Arsenic diffusion below the polysilicon in the *p*epilayer.

An important issue for the SPAD quality is the uniformity of the electric field over the active area. If the electric field is not uniform, the PDE of the device becomes dependent on the absorption position over the active area. The lower the electric field the lower the PDE, the worst case being when the electric field is lower than the breakdown value.

#### **2.2 Quenching strategy**

308 Advanced Photonic Sciences

fabrication complexity. The integration of SPADs in a low-cost CMOS process became

An example of latest developed structures is shown in figure 2 (Sciacca et. al 2003). The *np* junction has an *n*+ shallow diffusion and a controlled Boron enrichment diffusion in the central zone of it. With respect to the outer abrupt *np* junction, the higher *p*+ doping concentration reduces the breakdown voltage in the central zone, which is the

The process starts with a Si <100> *n*- substrate on which is grew a boron doped epitaxial layer with a *p*+ buried layer and with a *p*- doped layer. The reason to form a buried *pn* junction is twofold. First, the detector time-response is improved because the effect of photogenerated carriers diffusing in the undepleted region is reduced (G. Ripamonti et al. 1985). Second, isolation with the substrate is introduced and makes possible the monolithic integration of various SPADs and other devices and circuits. The *p*+ buried layer is

The *p*- layer must be thin enough to limit the photo-carrier diffusion effect above mentioned. A good trade off has to be found for this thickness, because if it is made too thin the edge breakdown occurs at a voltage not much higher than the breakdown voltage of the active area. The *p*+ sinkers are then created with a high-dose boron implantation step, in order to reduce the contact resistance of the anode and provide a low resistance path to the

The next step, a local gettering process, is a key step in the process because it guarantees a uniform defect concentration over the volume. At this point a heavy POCl3 diffusion through an oxide mask is made on the topside of the wafer close to the device active area. Heavy phosphorus diffusions are well known to be responsible for transition metal gettering. Unfortunately, the well-known phosphorous predeposition on the backside of the wafer is not able to getter the distant active area of the device because metal diffusers (Pt, Au , Ti) diffuse too slowly during the final anneal. For this reason, if the gettering sites are created suitably close to the active region, a major improvement on dark counting rate is observed. The next step is the *p*+ enrichment diffusion obtained with a low energy boron implantation, producing a concentration peak, followed by a high temperature anneal and

The first generation of devices was fabricated with a deposited polysilicon cathode doped by Arsenic implantation and diffusion. The As+ ion implantation energy was carefully calculated in order to damage as little as possible the active area of the device; nevertheless, devices with very high dark-counting rate resulted. A remarkable improvement was obtained in the second generation by doping in situ the polysilicon. Further improvement was achieved in the third generation by accurately designing a Rapid Thermal Anneal to create a precisely controlled shallow Arsenic diffusion below the polysilicon in the *p*-

An important issue for the SPAD quality is the uniformity of the electric field over the active area. If the electric field is not uniform, the PDE of the device becomes dependent on the absorption position over the active area. The lower the electric field the lower the PDE, the

worst case being when the electric field is lower than the breakdown value.

feasible since 2003 (Sciacca et. al 2003).

necessary to reduce the series resistance of the device.

active area.

avalanche current.

drive in (Lacaita et al. 1989).

epilayer.

After the avalanche is triggered, the current keeps flowing until the avalanche is quenched by lowering the bias voltage down to breakdown voltage or below. After a dead-time, the operative voltage must be restored in order to make the SPAD able to detect another photon. This operation requires a suitable electronics with the following tasks: (i) it senses the leading edge of the avalanche current; (ii) it generates a standard output pulse, synchronous with the current onset; (iii) it quenches the avalanche by lowering the bias below the breakdown voltage; (iv) it restores the photodiode voltage to the operating level. This circuit is usually referred to as quenching circuit. The two main quenching strategies are: passive and active (Cova et al. 1996). Recently, very promising results were obtained by using also a mixed approach (Mingguo et al. 2008).

In passive quenching the avalanche current itself is used to drop the voltage across the diode. This is generally accomplished via a ballast resistor RL (normally few hundreds kΩ) placed on the anode or the cathode of the diode as shown in figure 3. The detection of the avalanche can be accomplished by measuring the current across a low resistivity path RS. Pulse shaping may be performed using a discriminator.

Fig. 3. Schematic representation of a passive quenching circuit. In the left part is shown the equivalent circuit of a SPAD detector.

Today modern technology gives also the possibility to produce SPAD detectors with integrate quenching mechanism based on a Metal-Resistor-Semiconductor structure. Precise resistive elements (or using the non-linear characteristics of a biased PMOS or NMOS, Niclass et al. 2005) are embedded for each individual micro-cell of the array and provide effective feedback for stabilization and quenching of the avalanche process also reducing the values of the stray capacitance from cathode to ground.

A circuit model, which emulates the evolution of the signal of a SPAD was developed in the 1960s to describe the behaviour of micro-plasma instability in silicon (McIntyre 1961). According to this model, the pre-breakdown state can be represented as a capacitance (junction capacitance, CD) in series with the quenching resistor. Referring to Fig. 3(left), this

Time Resolved Camera: The New Frontier of Imaging Devices 311

the diode voltage below VB. The detector is then kept off for a well-controlled hold-off time, at the end of which the driver swiftly restores the SPAD bias voltage to the operating level in order to be ready to detect another photon. During the reset transition, since spurious couplings and reflections could retrigger the discriminator, it can be latched off for the

In this way the avalanche current intensity is kept constant due to the low-impedance of the driver biasing the detector, also the duration of the avalanche current pulse is constant and depends on the time taken by the avalanche signal to travel from the SPAD to the AQC, forth and back, and on the slope of the driver quenching pulse. By reducing this loop time, the afterpulsing will be limited, since the number of trapped carriers is linearly proportional to the avalanche pulse duration. Moreover, by using ACQ, the hold-off time is easily adjustable and both quenching and reset transitions are fast (tens of nanoseconds), thus minimizing the probability of non-standard avalanche triggering during the recovery transition. Nevertheless, recent works (Neri et al. 2010) demonstrates that with passive quenching strategy (by using hybrid Dead-Time models) it is also possible to evaluate the

In conclusion, even if ACQ are attractive, they usually require an extra complexity to a pixel,

In this section and in next, the attention will focus on SPADs with integrate quenching resistor. In contrast to APDs, to establish the performances are necessary a new set of

A primary "static" characterization is made on-wafer by using temperature-controlled probe stations and semiconductor parameter analysers. By working in dark condition the SPAD reverse/forward I-V characteristics can be determined, with and without quenching resistor and as a function of the temperature. In this way we get information about leakage current, breakdown voltage, quenching resistor and hence on the overall device performance. For example the leakage current is linked to the generation of electrical carriers both in the bulk as well as on the surface depleted region around the junction. Then, low values of leakage current can be interpreted as the first evidence of the low defectivity of the diode and then of the low dark counting rate. The figure 4 reports the I-V

The operation of a SPAD with integrated quenching resistor can be easily investigated by measuring the current across a low resistivity path RS ("dynamic" characterization). In

The fast leading edge (rise time) is governed by the time that avalanche takes to spread all over the diode active area. The slower exponential decay (discharge time) as previous mentioned is instead determined by a constant time given by the product of the diode internal resistance (few k) and the sum of parasitic and internal diode capacitances. After the breakdown current has been quenched, the diode will slowly recharge through the

figure 5a is reported the pulse of a single dark count event observed on a FBK SPAD.

whole reset duration.

real amount of incident photon rate up to 107-108 cps.

**2.3 Performance and measurement techniques** 

parameters and measurement techniques.

quenching resistor (see fig.5b).

hindering the miniaturization, fundamental for imaging aim.

characteristics of ST-Microelectronics SPAD (Mazzillo et al. 2008).

state corresponds to the switch in the OFF condition. In steady state, the capacitance is charged at operating voltage VA > VB where VB is the breakdown voltage.

When a carrier traverses the high-field region, there is a certain probability, known as turn on probability, to initiate an avalanche discharge. If this happens, the new state of the system can be modelled adding to the circuit a voltage source VB with a series resistor RD in parallel to the diode capacitance (switch closed in Fig. 3(left)). RD includes both the resistance of the neutral regions inside the silicon as well as the space charge resistance. CD, originally charged at VA, discharges through the series resistance down to the breakdown voltage with a time constant D given by the product RDCD. It should be noted that the discharge current is initially limited by the build up of the avalanche process which can take some hundreds of ps.

As the voltage on CD decreases, the current flowing through the quenching resistance, and as a consequence through the diode, tends to the asymptotic value of (VA-VB)/(RL+RD). In this final phase, if RL is high enough, the diode current is so low that a statistical fluctuation brings the instantaneous number of carriers flowing through the high-field region to zero, quenching the avalanche. The probability of such a fluctuation (turnoff probability) becomes significant when the diode current is below 10–20 mA (defined as latching current). The average time needed to stop the avalanche, when this condition is satisfied, is in the order of 1 ns. The latching current poses a strict limit on the lower value of RL to some hundreds of kΩ**.** As the avalanche process is terminated, the switch is again open and the circuit is in its initial configuration. The capacitance charged at VB, starts recharging to the bias voltage with a time constant CDRL, and the device becomes ready to detect the arrival of a new photon.

A photon that arrives during the very first part of recovery is almost certainly lost, since the avalanche triggering probability is almost negligible. Instead, subsequent photons have a progressively higher probability to trigger the SPAD. Unfortunately, SPAD triggering during recovery transition has mainly two deleterious effects due to the time-varying excess bias voltage.

 Pulses having amplitude lower than the threshold of the discriminator are not sensed. Significant count losses are expected at higher counting rates. As a matter of fact, after each ignition, the detector has a dead-time which is not well-defined.

Time resolution is degraded for two reasons: the intrinsic time resolution of the SPAD is impaired when excess bias is reduced; additional jitter is introduced because pulses with different amplitudes cross the comparator threshold at different times.

In order to avoid the highlighted drawbacks of passive quenching circuit (PQC) and fully exploit the intrinsic performance of SPADs, a new approach was devised (Cova et al. 1996). The basic idea was to sense the rise of the avalanche pulse and react back on the SPAD, by forcing the quenching and reset transitions in short (few nanoseconds) times, with a controlled bias-voltage source. This approach was called active-quenching circuit (AQC) the literature on active quenching is extensive.

The simplest solution provides that the discriminator triggers also a driving stage that applies a quenching pulse, synchronous with the avalanche triggering and with a very low jitter. In order to quench the avalanche, the quenching pulse must be high enough to reduce

state corresponds to the switch in the OFF condition. In steady state, the capacitance is

When a carrier traverses the high-field region, there is a certain probability, known as turn on probability, to initiate an avalanche discharge. If this happens, the new state of the system can be modelled adding to the circuit a voltage source VB with a series resistor RD in parallel to the diode capacitance (switch closed in Fig. 3(left)). RD includes both the resistance of the neutral regions inside the silicon as well as the space charge resistance. CD, originally charged at VA, discharges through the series resistance down to the breakdown voltage with a time constant D given by the product RDCD. It should be noted that the discharge current is initially limited by the build up of the avalanche process which can take

As the voltage on CD decreases, the current flowing through the quenching resistance, and as a consequence through the diode, tends to the asymptotic value of (VA-VB)/(RL+RD). In this final phase, if RL is high enough, the diode current is so low that a statistical fluctuation brings the instantaneous number of carriers flowing through the high-field region to zero, quenching the avalanche. The probability of such a fluctuation (turnoff probability) becomes significant when the diode current is below 10–20 mA (defined as latching current). The average time needed to stop the avalanche, when this condition is satisfied, is in the order of 1 ns. The latching current poses a strict limit on the lower value of RL to some hundreds of kΩ**.** As the avalanche process is terminated, the switch is again open and the circuit is in its initial configuration. The capacitance charged at VB, starts recharging to the bias voltage with a time constant CDRL, and the device becomes ready to detect the arrival of a new

A photon that arrives during the very first part of recovery is almost certainly lost, since the avalanche triggering probability is almost negligible. Instead, subsequent photons have a progressively higher probability to trigger the SPAD. Unfortunately, SPAD triggering during recovery transition has mainly two deleterious effects due to the time-varying excess

 Pulses having amplitude lower than the threshold of the discriminator are not sensed. Significant count losses are expected at higher counting rates. As a matter of fact, after each

Time resolution is degraded for two reasons: the intrinsic time resolution of the SPAD is impaired when excess bias is reduced; additional jitter is introduced because pulses with

In order to avoid the highlighted drawbacks of passive quenching circuit (PQC) and fully exploit the intrinsic performance of SPADs, a new approach was devised (Cova et al. 1996). The basic idea was to sense the rise of the avalanche pulse and react back on the SPAD, by forcing the quenching and reset transitions in short (few nanoseconds) times, with a controlled bias-voltage source. This approach was called active-quenching circuit (AQC) the

The simplest solution provides that the discriminator triggers also a driving stage that applies a quenching pulse, synchronous with the avalanche triggering and with a very low jitter. In order to quench the avalanche, the quenching pulse must be high enough to reduce

ignition, the detector has a dead-time which is not well-defined.

literature on active quenching is extensive.

different amplitudes cross the comparator threshold at different times.

charged at operating voltage VA > VB where VB is the breakdown voltage.

some hundreds of ps.

photon.

bias voltage.

the diode voltage below VB. The detector is then kept off for a well-controlled hold-off time, at the end of which the driver swiftly restores the SPAD bias voltage to the operating level in order to be ready to detect another photon. During the reset transition, since spurious couplings and reflections could retrigger the discriminator, it can be latched off for the whole reset duration.

In this way the avalanche current intensity is kept constant due to the low-impedance of the driver biasing the detector, also the duration of the avalanche current pulse is constant and depends on the time taken by the avalanche signal to travel from the SPAD to the AQC, forth and back, and on the slope of the driver quenching pulse. By reducing this loop time, the afterpulsing will be limited, since the number of trapped carriers is linearly proportional to the avalanche pulse duration. Moreover, by using ACQ, the hold-off time is easily adjustable and both quenching and reset transitions are fast (tens of nanoseconds), thus minimizing the probability of non-standard avalanche triggering during the recovery transition. Nevertheless, recent works (Neri et al. 2010) demonstrates that with passive quenching strategy (by using hybrid Dead-Time models) it is also possible to evaluate the real amount of incident photon rate up to 107-108 cps.

In conclusion, even if ACQ are attractive, they usually require an extra complexity to a pixel, hindering the miniaturization, fundamental for imaging aim.
