**3. Line impedance emulator modeling**

The GsC power circuit single phase representation is depicted on **Figure 5**, where *Lg* denotes the grid impedance. According to this figure, the GsC electric equation in the *abc* reference frame is given by Eq. (1).

$$U\_i = V\_\text{g} - L\_\text{g} \frac{di\_\text{g}}{dt} \tag{1}$$

*<sup>i</sup>*<sup>1</sup> <sup>¼</sup> *Vi* � *Vc sL*<sup>1</sup>

*Line Impedance Emulator: Modeling, Control Design, Simulation and Experimental Validation*

*Vc* <sup>¼</sup> *ic sCf*

*<sup>i</sup>*<sup>2</sup> <sup>¼</sup> *Vc* � *VE sL*<sup>2</sup>

**Figure 8** shows the GsC control. It incorporates two control loops. The internal loop controls in the *abc* reference frame the grid currents *ig*(*abc*) and it is based on

**4. Line impedance emulation control**

**4.1 Grid side converter control**

**Figure 6.**

**Figure 7.**

**Figure 8.**

**135**

*Block diagram of GsC control.*

*EsC power circuit single phase representation.*

*DOI: http://dx.doi.org/10.5772/intechopen.90081*

*LCL-EsC simplified block diagram.*

*i*<sup>1</sup> ¼ *i*<sup>2</sup> þ *ic* (3)

(2)

(4)

(5)

The EsC power circuit single phase representation is given by **Figure 6**. Based on this Figure, the equations related to the EsC are given by Eq. (2), Eq. (3), Eq. (4) and Eq. (5). The obtained single phase simplified block diagram of the LCL-EsC is depicted on **Figure 7**.

**Figure 5.** *GsC power circuit.*

*Line Impedance Emulator: Modeling, Control Design, Simulation and Experimental Validation DOI: http://dx.doi.org/10.5772/intechopen.90081*

#### **Figure 6.**

*EsC power circuit single phase representation.*
