**7. Experimental validation**

**Description Symbol Value Unit** Nominal voltage line-line *Vg* 400 V GsC nominal power *SGsCnom* 20 kVA EsC nominal power *SEsCnom* 20 kVA LCL filter Converter side inductor *L*<sup>1</sup> 2 mH

Switching frequency *fs* 10 kHz

**Table 1.**

**Figure 18.**

**Figure 19.**

**Figure 20.**

**142**

*Simulation control scenario.*

*Line impedance emulator parameters.*

*Numerical Modeling and Computer Simulation*

*Vdc response to a step reference of 100 V.*

*Line impedance emulator output in case of voltage reference magnitude change.*

EUT side filter inductor *L*<sup>2</sup> 2 mH Capacitor *Cf* 30 μF

> **Figures 22** and **23** show the experimental prototype and the test bench for the line impedance emulator. It includes (1) an auto transformer used in order to vary the voltage peak magnitude; (2) an L filter (composed of three inductors (20 mH/20A)

**Figure 22.** *Experimental prototype.*

**Figure 23.** *Experimental test bench.*

with 0.3 Ω internal resistors; (3) a 20 kVA AC/DC converter (GsC); (4) a dc-link capacitor (1100 μF/800 V); (5) a 20 kVA DC/AC converter (EsC); (6) an LCL filter (composed of three inductors (2 mH/10 A) with 0.1 Ω internal resistors, three capacitors (4 μF/400 V) and three inductors (2 mH/10A) with 0.1 Ω internal resistors); (7) a measurement board (LEM LA55 and LEM LV25 for currents and voltage measuring, respectively); and (8) the STM32F4-Discovery digital solution. It is worth noting here that two STM32F4-Discovery cards were used in the experimental test bench; the first one is dedicated to the GsC control and the second one is dedicated to the EsC control.

For both GsC and EsC controls, the switching frequency was fixed equal to 10 kHz. For experimental tests, the switching frequency is equal to 10 kHz, the voltage at the DC bus *Vdc* is initially charged at 55 V. **Figure 24** presents the voltage at the DC bus *Vdc* response. As shown is this figure, *Vdc* is well controlled during steady state operation. **Figure 25** presents the response of the line impedance emulator output for a reference change from 20 to 10 V. This test shows that the EsC control ensures an acceptable dynamic response and it is well controlled at steady state. **Figure 26** presents the line impedance emulator input and the output that matches with various values of line impedance.

**8. Conclusion**

**Figure 26.**

both equipment.

**145**

**Acknowledgements**

Research under Grant LSE-ENIT-LR 11ES15.

In this chapter, line impedance emulator was studied. This equipment is used in small scale laboratories studying distributed energy generation. It ensures power tests with variable line impedance. Presented line impedance emulator is based on two power converters connected via a dc-link capacitor. Theoretical study is detailed and validated by simulation and experimental tests. The proposed study describes in detail the control design of each power converter. In addition, two variants of line impedance emulator algorithms were synthesized. To prove the efficiency of the presented study, a test with a real impedance and an emulated one was performed and obtained results show the similarity of system responses with

*Line Impedance Emulator: Modeling, Control Design, Simulation and Experimental Validation*

*DOI: http://dx.doi.org/10.5772/intechopen.90081*

*Line impedance emulator input Vina and output Vouta for different values of R and L.*

This work was supported by the Tunisian Ministry of High Education and

**Figure 24.** *DC bus measured voltage and reference values.*

**Figure 25.** *Emulator output voltage Vc(abc) for voltage reference change from 20 to 10 V.*

*Line Impedance Emulator: Modeling, Control Design, Simulation and Experimental Validation DOI: http://dx.doi.org/10.5772/intechopen.90081*

**Figure 26.** *Line impedance emulator input Vina and output Vouta for different values of R and L.*
