**5. Integration issues of porous low-***k* **dielectric materials**

During the integration of porous low-*k* dielectrics into Cu interconnects, the fabricating processes can seriously degrade material properties, electrical characteristics, and reliability. Moreover, the porosity can act as a fast penetration media for reactive species or contamination during the integration, accelerating degradations.

The main key issues associated with porous low-*k* dielectrics are schematically shown in **Figure 6**. The key issues will be discussed and the improvement actions will be provided in this section.

#### **5.1 Plasma-induced damage**

Plasma is an aggressive medium which produces vacuum ultraviolet (VUV) and ultraviolet (UV) photons, energetic ions, electrons, and highly reactive radicals [69]. Exposure to plasma causes physical damage and chemical modifications on porous low-*k* dielectric materials [70, 71]. Under plasma irradiation, Si-CH3 and Si-H groups in the porous SiCOH low-*k* dielectric material are extracted from the network and then converted into the Si-O or Si-OH groups, leading to densification

the operation temperature of H2/He plasma treatment in RP system is increased to 350°C, the plasma-treated porous low-*k* dielectric films have better reliability than the pristine samples. The improvement mechanism is attributed to the removal of carbon-based porogen residues from the porous low-*k* dielectric film by H2/He

The dielectric property of the plasma-damaged low-*k* dielectrics can be recov-

During the integration processing, the porous low-*k* dielectric films are damaged

and are transferred to be hydrophilic. The hydrophilic surface tends to uptake moisture in subsequent process steps. Due to a high *k* value of water (80), only a small amount of moisture adsorption in the low-*k* dielectric film increases the effective *k* value significantly [87]. As the porosity increases in the porous low-*k* dielectric film, the pores connect each other to form "open pores," which serve as the fast diffusion path for moisture. The adsorbed moisture degrades reliability performance of porous low-*k* dielectric films, as shown in **Figure 8** [88]. The TDDB failure time is reduced by a factor of approximately 10 for the moisture-uptake low*k* dielectric film and slightly decreases as the moisture immersion time increases. An annealing step is demonstrated to remove moisture and improve the film reliability, as also presented in **Figure 8**. However, even with thermal annealing at 400 C for 1 h, TDDB performance was only partially restored, being poorer than that of the

As the moisture is adsorbed in the low-*k* dielectric film, there are two types: physisorbed and chemisorbed moisture [89]. The physisorbed moisture starts to be

*Cumulative probability of TDDB failure times of porous low-*k *dielectric films as functions of the moisture*

trimethylchlorosilane (TMCS), and dichlorodimethylsilane (DMDCS), depositing hydrophobic agents from hydrocarbon plasma and using a thermal treatment to eliminate the adsorbed hydroxyl (OH) groups and the physisorbed water [83–86].

ered by applying silylation agents such as hexamethyldisilazane (HMDS),

*Porous Low-Dielectric-Constant Material for Semiconductor Microelectronics*

plasma treatment at 350°C [82].

*DOI: http://dx.doi.org/10.5772/intechopen.81577*

**5.2 Moisture uptake**

fresh sample.

**Figure 8.**

**181**

*immersion time [88].*

#### **Figure 6.**

*Main integration issues of porous low-*k *dielectrics in BEOL interconnects.*

and *k*-value increase. Moreover, plasma-induced damage makes porous low-*k* dielectric materials hydrophilic from hydrophobic, facilitating moisture uptake.

Plasma-induced damage on the porous low-*k* dielectric materials depends on the porosity, the used plasma reactors, power, and gas [72–76]. Therefore, for porous low-*k* dielectric materials that are irradiated under a plasma with higher density, inductively coupling plasma (ICP) reactor, or O2 plasma, more damage on low-*k* dielectrics is expected.

To minimize the plasma-induced damage on the porous low-*k* dielectric materials, H2-based plasma in remote-plasma (RP) system is an alternative for resiststripping process. [77–81]. **Figure 7**(**a**) and (**b**) exhibits the breakdown field and TDDB failure time (TTF) of the porous low-*k* dielectric film after H2/He plasma treatment [80, 81]. For porous low-*k* dielectric films operated in RP system, a higher breakdown field and a longer TTF were observed as compared to those operated in capacitance coupling plasma (CCP) system. In the RP system, neither deep UV light radiation nor ion bombardment is acted on the porous low-*k* dielectric film, mitigating plasma-induced damage. Additionally, the trends of temperature dependence of reliability characteristics are different for H2/He plasma treatments in the CCP and RP systems. The breakdown field and TTF of H2/He plasma-treated porous low-*k* dielectric film in CCP system decrease, while those in CCP system improve with increasing of the operation temperature. Moreover, as

#### **Figure 7.**

*(a) Breakdown field. (b) Time-to-fail of H2/He plasma-treated porous low-*k *dielectric films operated in CCP and RP systems as a function of operation temperature [81].*

*Porous Low-Dielectric-Constant Material for Semiconductor Microelectronics DOI: http://dx.doi.org/10.5772/intechopen.81577*

the operation temperature of H2/He plasma treatment in RP system is increased to 350°C, the plasma-treated porous low-*k* dielectric films have better reliability than the pristine samples. The improvement mechanism is attributed to the removal of carbon-based porogen residues from the porous low-*k* dielectric film by H2/He plasma treatment at 350°C [82].

The dielectric property of the plasma-damaged low-*k* dielectrics can be recovered by applying silylation agents such as hexamethyldisilazane (HMDS), trimethylchlorosilane (TMCS), and dichlorodimethylsilane (DMDCS), depositing hydrophobic agents from hydrocarbon plasma and using a thermal treatment to eliminate the adsorbed hydroxyl (OH) groups and the physisorbed water [83–86].

#### **5.2 Moisture uptake**

and *k*-value increase. Moreover, plasma-induced damage makes porous low-*k* dielectric materials hydrophilic from hydrophobic, facilitating moisture uptake. Plasma-induced damage on the porous low-*k* dielectric materials depends on the porosity, the used plasma reactors, power, and gas [72–76]. Therefore, for porous low-*k* dielectric materials that are irradiated under a plasma with higher density, inductively coupling plasma (ICP) reactor, or O2 plasma, more damage on low-*k*

*Main integration issues of porous low-*k *dielectrics in BEOL interconnects.*

To minimize the plasma-induced damage on the porous low-*k* dielectric materials, H2-based plasma in remote-plasma (RP) system is an alternative for resiststripping process. [77–81]. **Figure 7**(**a**) and (**b**) exhibits the breakdown field and TDDB failure time (TTF) of the porous low-*k* dielectric film after H2/He plasma treatment [80, 81]. For porous low-*k* dielectric films operated in RP system, a higher breakdown field and a longer TTF were observed as compared to those operated in capacitance coupling plasma (CCP) system. In the RP system, neither deep UV light radiation nor ion bombardment is acted on the porous low-*k* dielectric film, mitigating plasma-induced damage. Additionally, the trends of temperature dependence of reliability characteristics are different for H2/He plasma treatments in the CCP and RP systems. The breakdown field and TTF of H2/He plasma-treated porous low-*k* dielectric film in CCP system decrease, while those in CCP system improve with increasing of the operation temperature. Moreover, as

*(a) Breakdown field. (b) Time-to-fail of H2/He plasma-treated porous low-*k *dielectric films operated in CCP*

*and RP systems as a function of operation temperature [81].*

dielectrics is expected.

*Nanofluid Flow in Porous Media*

**Figure 6.**

**Figure 7.**

**180**

During the integration processing, the porous low-*k* dielectric films are damaged and are transferred to be hydrophilic. The hydrophilic surface tends to uptake moisture in subsequent process steps. Due to a high *k* value of water (80), only a small amount of moisture adsorption in the low-*k* dielectric film increases the effective *k* value significantly [87]. As the porosity increases in the porous low-*k* dielectric film, the pores connect each other to form "open pores," which serve as the fast diffusion path for moisture. The adsorbed moisture degrades reliability performance of porous low-*k* dielectric films, as shown in **Figure 8** [88]. The TDDB failure time is reduced by a factor of approximately 10 for the moisture-uptake low*k* dielectric film and slightly decreases as the moisture immersion time increases. An annealing step is demonstrated to remove moisture and improve the film reliability, as also presented in **Figure 8**. However, even with thermal annealing at 400 C for 1 h, TDDB performance was only partially restored, being poorer than that of the fresh sample.

As the moisture is adsorbed in the low-*k* dielectric film, there are two types: physisorbed and chemisorbed moisture [89]. The physisorbed moisture starts to be

#### **Figure 8.**

*Cumulative probability of TDDB failure times of porous low-*k *dielectric films as functions of the moisture immersion time [88].*

desorbed at 190°C. After the 400°C annealing, most physically adsorbed moisture is desorbed. The chemisorbed moisture has the higher bonding energy; thus, it can be desorbed by a thermal annealing with the temperature above 600°C. As a result, the temperature of annealing is required to be elevated to 600–1000°C in order to remove the adsorbed water from porous low-*k* dielectric films. However, this temperature is not suitable to use in the BEOL interconnects because porous low-*k* dielectric films become unstable at temperature above 600°C.

concentration *N*m(*T*) in the various low-*k* dielectric films after thermal stress as a function of annealing temperature [96]. The Cu penetration is enhanced at increased temperatures. The larger Cu ion concentration in the porous low-*k* dielectric film after annealing indicates that the pores in the low-*k* dielectric film induced the rapid migration of Cu ions. Additionally, the porous low-*k* dielectric film had the lowest activation energy (0.57 eV) with a value close to those reported elsewhere (0.42–0.60 eV) [97, 98]. The SiCNH capping layers on the low-*k* dielectric films increased the activation energy to 0.81 eV for both dense and porous low-*k* films, suggesting that the SiCNH capping layer acts as a Cu barrier and prevents possible Cu migration. The use of SiCNH capping layer as a Cu barrier increases the effective *k* value of BEOL ILD, being a main concern.

*Porous Low-Dielectric-Constant Material for Semiconductor Microelectronics*

*DOI: http://dx.doi.org/10.5772/intechopen.81577*

The deposition of metal barrier can also prevent Cu migration. However, due to a high resistivity of metal barrier, the overall resistivity of the metal line significantly increases in the scaling interconnect pitch. Additionally, barrier metals like tantalum (Ta) deposited by physical vapor deposition penetrate into low-*k* dielectric in a way similar to Cu, causing low-*k* dielectric degradation. Moreover, the metal barrier-induced damage increases as the porosity of the low-*k* dielectric

Currently, self-forming barrier [101], atomic layer deposition (ALD) barrier [102], and self-assembled monolayer (SAM) [103, 104] processes are promising methods to prevent metal penetration. However, the integration with the porous

In Cu metallization, CMP process is used to remove the excess Cu film and the barrier metal. There are three main steps in Cu CMP process. Firstly, the excess Cu film is polished. Then, as reaching the interface, both metal barrier and Cu film are polished. Finally, to ensure that all metals are removed from the field regions in all parts of the wafer, over-polishing in the last step is necessary. Thus, the used dielectric insulator is polished simultaneously. To reach high degree of planarization

low-*k* dielectric must be controlled precisely to meet all requirements.

The purpose of chemical mechanical polishing (CMP) is to produce planarization topography by means of both mechanical polishing and chemical reaction. A simultaneous interaction between polishing slurry, a semiconductor wafer, and a polyurethane pad occurred. Thus, the chemical, mechanical, and material properties of the pad, wafer surface, and slurry determine the controlla-

and avoid Cu dishing, dielectric erosion, and interface quality degradation

(dangling bonds, generation, metal contaminants, and moisture presence), precise

As the porous low-*k* dielectric film is used as an interconnecting insulator, peeling, delamination, and cracking may occur under CMP process because it has not enough mechanical strength to survive the large mechanical stress process. Therefore, improving the elastic modulus or hardness of the porous low-*k* dielectric film is required. **Figure 10** shows the change in the hardness of porous low-*k* dielectric materials as a function of UV curing time [107, 108]. By increasing UV curing time after the porous low-*k* dielectric film deposition, the hardness (H) can be improved. Moreover, CMP-induced peeling was checked to determine the minimum hardness for integration of the porous low-*k* dielectric film into BEOL interconnects. At a UV curing time of less than 300 s for the porous low- *k* dielectric films, peeling was observed. Peeling was worse at shorter UV curing times. As UV curing time is greater than 300 s, the wafer exhibited peeling-free for the porous

increases [99, 100].

**5.4 CMP-induced damage**

bility and quality of CMP process.

control CMP process is required [105, 106].

**183**

To reach a better recovery for moisturized low-*k* dielectric films, a combination of UV curing and silylation process has been provided. UV curing and silylation processes can be done in the same chamber to save the processing step. The UVassisted restoration is performed at elevated temperatures using a gaseous hydrocarbon in the curing ambient. The efficiency of recovery can be optimized with the process parameters, including UV wavelength and intensity, substrate temperature, UV curing time, chamber pressure, and reactant gas mixture [90, 91].

#### **5.3 Cu drift**

Due to a high diffusivity, Cu is easily oxidized to Cu mobile ion and then diffuses into ILDs under thermal and/or electrical bias [92, 93]. The diffused Cu ions could generate shallow energy levels in the bandgap of the porous low-*k* dielectric film [94]. These generated states act as defect centers, facilitating PF type conduction. Additionally, the penetration of Cu atoms or ions contributes to field enhancement locally inside the dielectric or at the electrode of electron injection [95]. These effects result in the significant degradation in the electric characteristics and reliability for the porous low-*k* dielectric films.

To prevent or minimize the diffusion of Cu ions and Cu barriers, including metal and dielectric barriers, are required for Cu metallization. **Figure 9** plots the Cu ion

#### **Figure 9.**

*Cu ion concentration in dense and porous low-*k *SiOCH films with and without capping SiCNH layer after annealing as function of temperature [96].*

#### *Porous Low-Dielectric-Constant Material for Semiconductor Microelectronics DOI: http://dx.doi.org/10.5772/intechopen.81577*

concentration *N*m(*T*) in the various low-*k* dielectric films after thermal stress as a function of annealing temperature [96]. The Cu penetration is enhanced at increased temperatures. The larger Cu ion concentration in the porous low-*k* dielectric film after annealing indicates that the pores in the low-*k* dielectric film induced the rapid migration of Cu ions. Additionally, the porous low-*k* dielectric film had the lowest activation energy (0.57 eV) with a value close to those reported elsewhere (0.42–0.60 eV) [97, 98]. The SiCNH capping layers on the low-*k* dielectric films increased the activation energy to 0.81 eV for both dense and porous low-*k* films, suggesting that the SiCNH capping layer acts as a Cu barrier and prevents possible Cu migration. The use of SiCNH capping layer as a Cu barrier increases the effective *k* value of BEOL ILD, being a main concern.

The deposition of metal barrier can also prevent Cu migration. However, due to a high resistivity of metal barrier, the overall resistivity of the metal line significantly increases in the scaling interconnect pitch. Additionally, barrier metals like tantalum (Ta) deposited by physical vapor deposition penetrate into low-*k* dielectric in a way similar to Cu, causing low-*k* dielectric degradation. Moreover, the metal barrier-induced damage increases as the porosity of the low-*k* dielectric increases [99, 100].

Currently, self-forming barrier [101], atomic layer deposition (ALD) barrier [102], and self-assembled monolayer (SAM) [103, 104] processes are promising methods to prevent metal penetration. However, the integration with the porous low-*k* dielectric must be controlled precisely to meet all requirements.

### **5.4 CMP-induced damage**

desorbed at 190°C. After the 400°C annealing, most physically adsorbed moisture is desorbed. The chemisorbed moisture has the higher bonding energy; thus, it can be desorbed by a thermal annealing with the temperature above 600°C. As a result, the temperature of annealing is required to be elevated to 600–1000°C in order to remove the adsorbed water from porous low-*k* dielectric films. However, this temperature is not suitable to use in the BEOL interconnects because porous low-*k*

To reach a better recovery for moisturized low-*k* dielectric films, a combination of UV curing and silylation process has been provided. UV curing and silylation processes can be done in the same chamber to save the processing step. The UVassisted restoration is performed at elevated temperatures using a gaseous hydrocarbon in the curing ambient. The efficiency of recovery can be optimized with the process parameters, including UV wavelength and intensity, substrate temperature,

Due to a high diffusivity, Cu is easily oxidized to Cu mobile ion and then diffuses into ILDs under thermal and/or electrical bias [92, 93]. The diffused Cu ions could generate shallow energy levels in the bandgap of the porous low-*k* dielectric film [94]. These generated states act as defect centers, facilitating PF type conduction. Additionally, the penetration of Cu atoms or ions contributes to field enhancement locally inside the dielectric or at the electrode of electron injection [95]. These effects result in the significant degradation in the electric characteristics and

To prevent or minimize the diffusion of Cu ions and Cu barriers, including metal and dielectric barriers, are required for Cu metallization. **Figure 9** plots the Cu ion

*Cu ion concentration in dense and porous low-*k *SiOCH films with and without capping SiCNH layer after*

dielectric films become unstable at temperature above 600°C.

reliability for the porous low-*k* dielectric films.

**5.3 Cu drift**

*Nanofluid Flow in Porous Media*

**Figure 9.**

**182**

*annealing as function of temperature [96].*

UV curing time, chamber pressure, and reactant gas mixture [90, 91].

The purpose of chemical mechanical polishing (CMP) is to produce planarization topography by means of both mechanical polishing and chemical reaction. A simultaneous interaction between polishing slurry, a semiconductor wafer, and a polyurethane pad occurred. Thus, the chemical, mechanical, and material properties of the pad, wafer surface, and slurry determine the controllability and quality of CMP process.

In Cu metallization, CMP process is used to remove the excess Cu film and the barrier metal. There are three main steps in Cu CMP process. Firstly, the excess Cu film is polished. Then, as reaching the interface, both metal barrier and Cu film are polished. Finally, to ensure that all metals are removed from the field regions in all parts of the wafer, over-polishing in the last step is necessary. Thus, the used dielectric insulator is polished simultaneously. To reach high degree of planarization and avoid Cu dishing, dielectric erosion, and interface quality degradation (dangling bonds, generation, metal contaminants, and moisture presence), precise control CMP process is required [105, 106].

As the porous low-*k* dielectric film is used as an interconnecting insulator, peeling, delamination, and cracking may occur under CMP process because it has not enough mechanical strength to survive the large mechanical stress process. Therefore, improving the elastic modulus or hardness of the porous low-*k* dielectric film is required. **Figure 10** shows the change in the hardness of porous low-*k* dielectric materials as a function of UV curing time [107, 108]. By increasing UV curing time after the porous low-*k* dielectric film deposition, the hardness (H) can be improved. Moreover, CMP-induced peeling was checked to determine the minimum hardness for integration of the porous low-*k* dielectric film into BEOL interconnects. At a UV curing time of less than 300 s for the porous low- *k* dielectric films, peeling was observed. Peeling was worse at shorter UV curing times. As UV curing time is greater than 300 s, the wafer exhibited peeling-free for the porous

**Figure 10.**

*Hardness of porous low-*k *dielectric materials as a function of UV curing time [107].*

low-*k* dielectric films, indicating that the minimum hardness for integration of the porous low-*k* dielectric film into BEOL interconnects is 1.2 GPa.

The other problem of Cu CMP problem is that the V-shape corners in the porous low-*k* trenches are formed due to the higher mechanical force. This would become a potential critical path for porous low-*k* dielectric breakdown owing to field enhancement along the CMP interface.

### **6. Conclusions**

To improve the performance of ICs, porous low-*k* dielectric materials have been used as an interconnecting insulator for providing lower parasitic capacitance between the wires to reduce RC time delay. Porous low-*k* dielectric materials can be achieved by introducing low-polarizability chemical bonds and porosity into the film. During the integration, the semiconductor processing induces damage on the porous low-*k* dielectric material, making the dielectric material densification hydrophilic, facilitating moisture uptake, and inducing Cu and barrier metal penetration. These lead to *k* value increase and reliability degradation for the porous low-*k* dielectric material. Moreover, high porosity and large pore size in the porous low-*k* dielectric materials make them sensitive to integration-induced damages. Moreover, porosity in the low-*k* dielectric material weakens the hardness and enhances the local field of the film, resulting in CMP damage and reliability challenges. Therefore, in order to achieve a successful implementation of advanced porous low-*k* dielectric films in the future BEOL interconnects, optimization and innovation of material science and integration processing are needed.

**Author details**

**185**

Yi-Lung Cheng\* and Chih-Yen Lee

provided the original work is properly cited.

\*Address all correspondence to: yjcheng@ncnu.edu.tw

*Porous Low-Dielectric-Constant Material for Semiconductor Microelectronics*

*DOI: http://dx.doi.org/10.5772/intechopen.81577*

Department of Electrical Engineering, National Chi-Nan University, Taiwan, ROC

© 2018 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/ by/3.0), which permits unrestricted use, distribution, and reproduction in any medium,

*Porous Low-Dielectric-Constant Material for Semiconductor Microelectronics DOI: http://dx.doi.org/10.5772/intechopen.81577*
