3.2 Voltage swell

In this scenario the grid is disturbed with a swell in the SST input. The swell appears with a voltage increment of 15%Vgrid during a time of 0:05 s (between 0:15≤ t≤0:20). It is considered that there is a load of 800 kVA with a power factor of 0.90.

The sag produces an increment in the high DC voltage. To regulate it, the voltage

For this scenario, a nonlinear load of <sup>z</sup> <sup>¼</sup> <sup>0</sup>:2711^<sup>i</sup> <sup>þ</sup> <sup>0</sup>:2763^<sup>j</sup> and <sup>H</sup> <sup>¼</sup> <sup>0</sup>:233 is connected to the SST. The harmonics generated are the third, fifth, and seventh. These harmonics have impact in voltage waveform of all the components connected into the grid [15] that means the generator will be also affected. Nevertheless, since the SST is connected, the harmonics are mitigated. In Figure 10(a), the voltage waveform distortion produced by the nonlinear load is presented, and Figure 10(b) presents the voltage waveform of the grid, which shows no harmonic disturbances. In addition, it is observed in Figure 11 that the harmonics in the harmonic currents

In this simulation, an R-L load of 0.7 power factor is connected. Initially, the load operates with a value of 500 kVA; then at t ¼ 0:10 s, the load increases to

Under these conditions, it must be verified that the power factor at the input is approximately 1 and that the output voltage maintains its nominal value. Figure 12

modulation index (control) increases. Its behavior is shown in Figure 9.

have a negligible impact over the power flow in the grid side.

Harmonic waveform behavior: (a) load current and (b) grid current.

Harmonic power behavior at the SST (a) input and (b) output.

3.3 Harmonics by nonlinear loads

DOI: http://dx.doi.org/10.5772/intechopen.84345

Solid-State Transformer for Energy Efficiency Enhancement

3.4 Overload and power factor

1000 kVA.

Figure 10.

Figure 11.

131

Figure 7 shows that although the swell disturbance at the SST input, the voltages and currents in the load side are not affected. It is also observed that during the time the swell lasts, the input current decreases. This is attributed to the control of the SST, which keeps constant the output power; this fact can be appreciated in Figure 8.

Figure 7.

Swell distortion waveform behavior: (a) grid voltage, (b) load voltage, (c) grid current, and (d) load current.

#### Figure 8.

Swell distortion power behavior at the SST (a) input and (b) output.

Figure 9.

Control response to swell disturbance: (a) HVDC and its reference and (b) modulation index.

The sag produces an increment in the high DC voltage. To regulate it, the voltage modulation index (control) increases. Its behavior is shown in Figure 9.
