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94 Advances in Photodetectors - Research and Applications

snb.2016.02.036

**Chapter 6**

Provisional chapter

**Single-Pixel Imaging Using Photodiodes**

Single-pixel cameras (SPCs) have been successfully used in different imaging applications during the last decade. In these techniques, the scene is illuminated with a sequence of microstructured light patterns codified onto a programmable spatial light modulator. The light coming from the scene is collected by a bucket detector, such as a photodiode. The image is recovered computationally from the photodiode electric signal. In this context, the signal quality is of capital value. One factor that degrades the signal quality is the noise, in particular, the photocurrent, the dark-current, and the thermal noise sources. In this chapter, we develop a numerical model of a SPC based on a photodiode, which considers the characteristics of the incident light, as well as the photodiode specifications. This model includes the abovementioned noise sources and infers the signal-to-noise ratio (SNR) of the SPCs in different contexts. In particular, we study the SNR as a function of the optical power of the incident light, the wavelength, and the photodiode temperature. The results of the model are compared with those obtained experimentally with a SPC. Keywords: single-pixel cameras, structured illumination, photodiodes, signal-to-noise

DOI: 10.5772/intechopen.79734

Computational imaging with a single-pixel camera (SPC), or single-pixel imaging (SPI), is a remarkable alternative to conventional imaging [1]. SPCs are based on sampling the scene with a sequence of microstructured light patterns codified onto a programmable spatial light modulator (SLM), while the intensity of the light coming from the object is measured by a detector without spatial resolution. The image is computationally recovered from the fluctuations of the

> © 2016 The Author(s). Licensee InTech. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and eproduction in any medium, provided the original work is properly cited.

© 2018 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use,

distribution, and reproduction in any medium, provided the original work is properly cited.

Single-Pixel Imaging Using Photodiodes

ratio, photocurrent, dark current, noise in imaging systems

Yessenia Jauregui-Sánchez, Pere Clemente, Pedro Latorre-Carmona, Jesús Lancis and

Yessenia Jauregui-Sánchez, Pere Clemente, Pedro Latorre-Carmona, Jesús Lancis and

Additional information is available at the end of the chapter

Additional information is available at the end of the chapter

http://dx.doi.org/10.5772/intechopen.79734

Enrique Tajahuerce

Enrique Tajahuerce

Abstract

1. Introduction

#### **Single-Pixel Imaging Using Photodiodes** Single-Pixel Imaging Using Photodiodes

DOI: 10.5772/intechopen.79734

Yessenia Jauregui-Sánchez, Pere Clemente, Pedro Latorre-Carmona, Jesús Lancis and Enrique Tajahuerce Yessenia Jauregui-Sánchez, Pere Clemente, Pedro Latorre-Carmona, Jesús Lancis and Enrique Tajahuerce

Additional information is available at the end of the chapter Additional information is available at the end of the chapter

http://dx.doi.org/10.5772/intechopen.79734

#### Abstract

Single-pixel cameras (SPCs) have been successfully used in different imaging applications during the last decade. In these techniques, the scene is illuminated with a sequence of microstructured light patterns codified onto a programmable spatial light modulator. The light coming from the scene is collected by a bucket detector, such as a photodiode. The image is recovered computationally from the photodiode electric signal. In this context, the signal quality is of capital value. One factor that degrades the signal quality is the noise, in particular, the photocurrent, the dark-current, and the thermal noise sources. In this chapter, we develop a numerical model of a SPC based on a photodiode, which considers the characteristics of the incident light, as well as the photodiode specifications. This model includes the abovementioned noise sources and infers the signal-to-noise ratio (SNR) of the SPCs in different contexts. In particular, we study the SNR as a function of the optical power of the incident light, the wavelength, and the photodiode temperature. The results of the model are compared with those obtained experimentally with a SPC.

Keywords: single-pixel cameras, structured illumination, photodiodes, signal-to-noise ratio, photocurrent, dark current, noise in imaging systems

#### 1. Introduction

Computational imaging with a single-pixel camera (SPC), or single-pixel imaging (SPI), is a remarkable alternative to conventional imaging [1]. SPCs are based on sampling the scene with a sequence of microstructured light patterns codified onto a programmable spatial light modulator (SLM), while the intensity of the light coming from the object is measured by a detector without spatial resolution. The image is computationally recovered from the fluctuations of the

© 2016 The Author(s). Licensee InTech. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and eproduction in any medium, provided the original work is properly cited. © 2018 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

electric signal provided by the detector. Thus, the quality of this temporal signal is a key factor in order to recover a high quality image.

The simplicity of the detection stage in SPI is one of the main advantages of the technique. It can be exploited to use very sensitive light sensors in low light level applications [2, 3]. It is also useful in order to measure the spatial distribution of different parameters such as the spectral content [2, 4] or the polarization state [5] of the light coming from the objects. Besides, SPI has shown robustness to the presence of scattering media [6, 7]. Moreover, the SPC can be an interesting choice for imaging using light with a spectrum beyond the visible region, such as in the infrared (IR) and terahertz spectral regions. Furthermore, SPI techniques are very well suited for the application of compressive sampling (CS, also referred to as compressive sensing) methods, which noticeably reduce the measurement time, the bottleneck of this technique [8, 9].

Among the different possible detectors, photodiodes are the most common sensors in general single-pixel imaging applications. In this chapter, we develop a numerical model of a singlepixel camera based on a photodiode, which considers the characteristics of the incident light, as well as the photodiode specifications [10]. Our model takes into account the photocurrent, the dark current, the photocurrent shot noise, the dark-current shot noise, and the Johnson-Nyquist (thermal) noise. In particular, we study the signal-to-noise ratio (SNR) as a function of the optical power level and the wavelength of the incident light, as well as the photodiode temperature. We restrict our study to silicon (Si) and indium-gallium-arsenide (InGaAs) photodiodes.

modulation is required. A DMD is a microelectromechanical system device that contains a pixelated display composed by millions of tiny switchable mirrors. Each mirror is able to switch to either <sup>12</sup><sup>∘</sup> with respect to the surface normal, which corresponds to on or off states, respectively [15]. In the last years, technology advances of the DMDs have improved the performance of SPCs, for instance reducing the acquisition time. For example, the most recently DMD Discovery series developed by Texas Instruments (DLP Discovery™ 4100 Development Kit) has a resolution up to full HD (1920 1080 pixels) and pattern rates up to 32,500 Hz [16], which

Single-Pixel Imaging Using Photodiodes http://dx.doi.org/10.5772/intechopen.79734 99

As a result, the SPCs have been successfully applied in many different imaging areas during the last decade. Among them, we can mention infrared imaging [17, 18], terahertz imaging [19], ultrasonic imaging [20], 3D computational imaging [21, 22], imaging through scattering media [23–25], 3D and photon counting light detection and ranging (LIDAR) imaging systems [3, 26, 27], stereoscopic imaging [28], microscopy [29, 30], holography [31, 32], and ophthalmo-

The set of microstructured light patterns is also an important element of the illumination stage in SPI. The light patterns commonly used for illumination are speckle patterns, binary random distributions, and functions of different basis such as noiselets [34], wavelets [35], Fourier, and Walsh-Hadamard (WH) functions. In fact, the measurement time and the resolution of the image are directly related with the properties of the light patterns. Particularly, the WH functions are

In SPCs, the image is computationally reconstructed from the electric signal provided by the photodensor; in our case, a photodiode. In this context, the photodiode signal represents the

easily coded on the DMD display due to the binary modulation nature of the DMD.

3. The photodiode signal in a single-pixel camera

allows to do SPI at video rates.

Figure 1. Schematic representation of a single-pixel camera.

scope imaging [33].

In the following sections, first, we describe in detail the single-pixel cameras. Second, we review the properties of the electrical signal provided by photodiodes based on Si and InGaAs materials. Third, we present a numerical model of the single-pixel camera. Next, we apply this model to study the SNR of a single-pixel camera in different contexts. After that, we compare some of these numerical results with those experimentally obtained in the laboratory. Finally, we emphasize the main conclusions.

### 2. The single-pixel camera

The SPC is able to provide images of a scene with a bucket detector, such as a photodiode, by using light-structured illumination. A schematic representation of the optical system is shown in Figure 1. A set of microstructured light patterns is codified onto a programmable spatial light modulator (SLM) and sequentially projected onto the scene to be analyzed. The light reflected (or transmitted) by the scene is collected by a lens and focused onto a photodiode. The photodiode provides us with an electrical current proportional to the integrated light intensity, which is digitized by a data acquisition system (DAQ). The photodiode signal represents the dot product between each microstructured light pattern and the scene. The image is retrieved from the photodiode signal and the microstructured light patterns using computational algorithms.

The ideas on which SPCs are based were proposed by Golay in 1949, for spectroscopy applications [11], and by Decker in 1970, for imaging [12]. However, the first efficient SPC was created in 2006 [13], by using a programmable SLM. The most common types of SLMs are the liquid crystal spatial light modulator (LC-SLM) and the digital micromirror device (DMD) [14]. In general, DMDs are more used than LC displays, in SPI applications, except when phase

Figure 1. Schematic representation of a single-pixel camera.

electric signal provided by the detector. Thus, the quality of this temporal signal is a key factor

The simplicity of the detection stage in SPI is one of the main advantages of the technique. It can be exploited to use very sensitive light sensors in low light level applications [2, 3]. It is also useful in order to measure the spatial distribution of different parameters such as the spectral content [2, 4] or the polarization state [5] of the light coming from the objects. Besides, SPI has shown robustness to the presence of scattering media [6, 7]. Moreover, the SPC can be an interesting choice for imaging using light with a spectrum beyond the visible region, such as in the infrared (IR) and terahertz spectral regions. Furthermore, SPI techniques are very well suited for the application of compressive sampling (CS, also referred to as compressive sensing) methods, which noticeably reduce the measurement time, the bottleneck of this technique [8, 9]. Among the different possible detectors, photodiodes are the most common sensors in general single-pixel imaging applications. In this chapter, we develop a numerical model of a singlepixel camera based on a photodiode, which considers the characteristics of the incident light, as well as the photodiode specifications [10]. Our model takes into account the photocurrent, the dark current, the photocurrent shot noise, the dark-current shot noise, and the Johnson-Nyquist (thermal) noise. In particular, we study the signal-to-noise ratio (SNR) as a function of the optical power level and the wavelength of the incident light, as well as the photodiode temperature. We

restrict our study to silicon (Si) and indium-gallium-arsenide (InGaAs) photodiodes.

In the following sections, first, we describe in detail the single-pixel cameras. Second, we review the properties of the electrical signal provided by photodiodes based on Si and InGaAs materials. Third, we present a numerical model of the single-pixel camera. Next, we apply this model to study the SNR of a single-pixel camera in different contexts. After that, we compare some of these numerical results with those experimentally obtained in the laboratory. Finally,

The SPC is able to provide images of a scene with a bucket detector, such as a photodiode, by using light-structured illumination. A schematic representation of the optical system is shown in Figure 1. A set of microstructured light patterns is codified onto a programmable spatial light modulator (SLM) and sequentially projected onto the scene to be analyzed. The light reflected (or transmitted) by the scene is collected by a lens and focused onto a photodiode. The photodiode provides us with an electrical current proportional to the integrated light intensity, which is digitized by a data acquisition system (DAQ). The photodiode signal represents the dot product between each microstructured light pattern and the scene. The image is retrieved from the photodiode signal and the microstructured light patterns using computational algorithms.

The ideas on which SPCs are based were proposed by Golay in 1949, for spectroscopy applications [11], and by Decker in 1970, for imaging [12]. However, the first efficient SPC was created in 2006 [13], by using a programmable SLM. The most common types of SLMs are the liquid crystal spatial light modulator (LC-SLM) and the digital micromirror device (DMD) [14]. In general, DMDs are more used than LC displays, in SPI applications, except when phase

in order to recover a high quality image.

98 Advances in Photodetectors - Research and Applications

we emphasize the main conclusions.

2. The single-pixel camera

modulation is required. A DMD is a microelectromechanical system device that contains a pixelated display composed by millions of tiny switchable mirrors. Each mirror is able to switch to either <sup>12</sup><sup>∘</sup> with respect to the surface normal, which corresponds to on or off states, respectively [15]. In the last years, technology advances of the DMDs have improved the performance of SPCs, for instance reducing the acquisition time. For example, the most recently DMD Discovery series developed by Texas Instruments (DLP Discovery™ 4100 Development Kit) has a resolution up to full HD (1920 1080 pixels) and pattern rates up to 32,500 Hz [16], which allows to do SPI at video rates.

As a result, the SPCs have been successfully applied in many different imaging areas during the last decade. Among them, we can mention infrared imaging [17, 18], terahertz imaging [19], ultrasonic imaging [20], 3D computational imaging [21, 22], imaging through scattering media [23–25], 3D and photon counting light detection and ranging (LIDAR) imaging systems [3, 26, 27], stereoscopic imaging [28], microscopy [29, 30], holography [31, 32], and ophthalmoscope imaging [33].

The set of microstructured light patterns is also an important element of the illumination stage in SPI. The light patterns commonly used for illumination are speckle patterns, binary random distributions, and functions of different basis such as noiselets [34], wavelets [35], Fourier, and Walsh-Hadamard (WH) functions. In fact, the measurement time and the resolution of the image are directly related with the properties of the light patterns. Particularly, the WH functions are easily coded on the DMD display due to the binary modulation nature of the DMD.

#### 3. The photodiode signal in a single-pixel camera

In SPCs, the image is computationally reconstructed from the electric signal provided by the photodensor; in our case, a photodiode. In this context, the photodiode signal represents the inner product of the set of microstructured light patterns with the scene. Therefore, to analyze the quality of the image, it is convenient to study the properties of the electrical signal provided by the photodiode and its noise sources.

By definition, a photodiode is a semiconductor device that converts the optical signal into a current signal by electronic processes [36]. The electrical current of the photodiode is composed by two terms, the photocurrent ð Þ IP and the dark current ð Þ ID . The first one is due to the photoelectric effect on the photodiode surface and it is given by [37],

$$I\_P = \mathcal{R}\_\lambda \cdot P\_\nu \tag{1}$$

Egð Þ¼ <sup>x</sup>; <sup>T</sup> <sup>E</sup>InAs

is given by [36].

Table 1. Values of material parameters Eg, α, and β

<sup>g</sup> ð Þ� <sup>0</sup> <sup>α</sup>InAsT<sup>2</sup>

<sup>T</sup> <sup>þ</sup> <sup>β</sup>InAs <sup>þ</sup> <sup>E</sup>GaAs

I ¼ IP þ ID

one is known as the photocurrent shot noise ð Þ σ<sup>P</sup> and it is given by

approximated by a Gaussian distribution when the current is large).

current is called the dark-current shot noise ð Þ σ<sup>D</sup> , defined as

<sup>¼</sup> <sup>R</sup><sup>λ</sup> � <sup>P</sup> <sup>þ</sup> CnAPT <sup>3</sup>

<sup>g</sup> ð Þ� <sup>0</sup> <sup>α</sup>GaAsT<sup>2</sup>

where Egð Þ0 , α and β are material constants. Table 1 shows typical values for them [43, 44]. Finally, when the photodiode is illuminated, the total current ð ÞI at room temperature is given by

> <sup>2</sup><sup>e</sup> �Egð Þ <sup>T</sup> 2kBT � �

ffiffiffiffiffiffiffiffiffiffiffiffi 2qIPB q

ffiffiffiffiffiffiffiffiffiffiffiffi 2qIDB q

In the single-pixel camera process, the photocurrent and the dark current signals have an associated error, due to the discrete nature of the electrical charge [45]. The noise of the former

where B is the noise bandwidth and IP is the photocurrent mean value. The noise of the second

where ID is the dark current mean value. Note that the photocurrent shot noise depends on the optical signal level and the dark-current shot noise does not. The sum of both noise values is known as shot noise ð Þ σshot [37] and it follows the Poisson distribution statistics (commonly

For the sake of completeness, we will consider the Johnson-Nyquist (or thermal) noise ð Þ σthermal , which is produced by the random thermal motion of electrons in a resistor, and it can be modeled as a stationary Gaussian random process (nearly white noise) [37]. The thermal noise

> ffiffiffiffiffiffiffiffiffiffiffiffiffi 4kBTB RSH s

σ<sup>P</sup> ¼

σ<sup>D</sup> ¼

σthermal ¼

Eg ½eV� at T ¼ 0K α eV

Si <sup>1</sup>:<sup>1557</sup> <sup>7</sup>:<sup>021</sup> � <sup>10</sup>�<sup>4</sup> <sup>1108</sup> GaAs <sup>1</sup>:<sup>519</sup> <sup>5</sup>:<sup>405</sup> � <sup>10</sup>�<sup>4</sup> <sup>204</sup> InAs <sup>0</sup>:<sup>417</sup> <sup>2</sup>:<sup>76</sup> � <sup>10</sup>�<sup>4</sup> <sup>93</sup>

e qVA kBT � �

� 1 " #

:

, (8)

, (9)

, (10)

<sup>K</sup> � � <sup>β</sup>½ � <sup>K</sup>

<sup>T</sup> <sup>þ</sup> <sup>β</sup>GaAs � EInAs

<sup>g</sup> ð Þþ <sup>0</sup> <sup>α</sup>InAsT<sup>2</sup> <sup>T</sup> <sup>þ</sup> <sup>β</sup>InAs " #<sup>x</sup> � <sup>0</sup>:475xð Þ <sup>1</sup> � <sup>x</sup> ,

Single-Pixel Imaging Using Photodiodes http://dx.doi.org/10.5772/intechopen.79734

(6)

101

(7)

where P is the optical power level of the light source and R<sup>λ</sup> is the photodiode responsivity [ <sup>A</sup> <sup>W</sup>]. The second current is always present in the photodiode, even without illumination, and it is originated by the thermal generation of electron-hole pairs in the Si p-n and InGaAs p-i-n photodiode layers. Four sources contribute to the dark current: the generation-recombination current in the depletion region, the diffusion current from the undepleted regions, the tunneling current, and the surface leakage current [38–40]. Nevertheless, the current-voltage of a p-n diode can be ideally described by the Shockley equation, which is given by [36].

$$I\_D = I\_s(T)\left[e^{\left(\frac{qV\_A}{k\_B T}\right)} - 1\right]\_{\prime} \tag{2}$$

where <sup>q</sup> <sup>¼</sup> <sup>1</sup>:<sup>602</sup> � <sup>10</sup>�<sup>19</sup> <sup>C</sup> is the electron charge, VA is the bias voltage, kB <sup>¼</sup> <sup>1</sup>:<sup>381</sup> � <sup>10</sup>�<sup>23</sup> <sup>J</sup> <sup>K</sup> is the Boltzmann's constant, and T is the absolute temperature. Then, under the reverse-bias condition, the saturation current (as a function of the temperature T) can be written as

$$I\_s(T) = C\_n A\_P T^3 e^{\left(-\frac{E\_g(T)}{k\_B T}\right)} + C\_n A\_P T^2 e^{\left(-\frac{E\_g(T)}{2k\_B T}\right)}.\tag{3}$$

Assuming that the temperature is lower or close to room temperature, the first term in Eq. (3) can be considered negligible [36]. Taking this into account and substituting this expression in Eq. (2), the dark current is given by

$$I\_D = \mathbb{C}\_{\mathbb{H}} A\_P T^{\frac{2}{2}} e^{\left(-\frac{\mathbb{E}\_{\mathbb{F}}(T)}{2\mathbf{k}\_B T}\right)} \left[ e^{\left(\frac{qV\_A}{k\_B T}\right)} - 1 \right]\_{\prime} \tag{4}$$

where Cn is a constant factor [ nA cm2], AP is the photodiode area [cm2], and Egð Þ <sup>T</sup> is the band gap energy of the photodiode material ½ � eV as a function of the temperature. E Tð Þ is described by the Varshni empirical relation for a Si p-n photodiode case [41]

$$E\_{\mathcal{S}}(T) = E\_{\mathcal{S}}^{Si}(0) - \frac{\alpha^{Si}T^2}{T + \beta^{Si}} \tag{5}$$

and by the Sajal Paul relation for the In1�<sup>x</sup>GaxAs p-i-n photodiode case [42]

Single-Pixel Imaging Using Photodiodes http://dx.doi.org/10.5772/intechopen.79734 101

$$E\_{\mathcal{S}}(\mathbf{x},T) = E\_{\mathcal{S}}^{lnAs}(0) - \frac{\alpha^{lnAs}T^2}{T + \beta^{lnAs}} + \left[ E\_{\mathcal{S}}^{GaAs}(0) - \frac{\alpha^{GaAs}T^2}{T + \beta^{GaAs}} - E\_{\mathcal{S}}^{InAs}(0) + \frac{\alpha^{lnAs}T^2}{T + \beta^{lnAs}} \right] \mathbf{x} - 0.475\mathbf{x}(1-\mathbf{x}),\tag{6}$$

where Egð Þ0 , α and β are material constants. Table 1 shows typical values for them [43, 44]. Finally, when the photodiode is illuminated, the total current ð ÞI at room temperature is given by

$$\begin{split} I &= I\_P + I\_D\\ &= R\_\lambda \cdot P + \mathcal{C}\_n A\_P T^{\frac{2}{2}} e^{\left(-\frac{\mathcal{E}\_\xi(T)}{2\eta\_B T}\right)} \left[ e^{\left(\frac{\psi\_A}{k\_B T}\right)} - 1 \right]. \end{split} \tag{7}$$

In the single-pixel camera process, the photocurrent and the dark current signals have an associated error, due to the discrete nature of the electrical charge [45]. The noise of the former one is known as the photocurrent shot noise ð Þ σ<sup>P</sup> and it is given by

$$
\sigma\_P = \sqrt{2\bar{q}\bar{I}\_P} \mathbf{B}\_\prime \tag{8}
$$

where B is the noise bandwidth and IP is the photocurrent mean value. The noise of the second current is called the dark-current shot noise ð Þ σ<sup>D</sup> , defined as

$$
\sigma\_D = \sqrt{2\overline{q}\overline{I\_D}}\tag{9}
$$

where ID is the dark current mean value. Note that the photocurrent shot noise depends on the optical signal level and the dark-current shot noise does not. The sum of both noise values is known as shot noise ð Þ σshot [37] and it follows the Poisson distribution statistics (commonly approximated by a Gaussian distribution when the current is large).

For the sake of completeness, we will consider the Johnson-Nyquist (or thermal) noise ð Þ σthermal , which is produced by the random thermal motion of electrons in a resistor, and it can be modeled as a stationary Gaussian random process (nearly white noise) [37]. The thermal noise is given by [36].

$$
\sigma\_{\text{thermal}} = \sqrt{\frac{4k\_B T B}{R\_{SH}}},
\tag{10}
$$


Table 1. Values of material parameters Eg, α, and β

inner product of the set of microstructured light patterns with the scene. Therefore, to analyze the quality of the image, it is convenient to study the properties of the electrical signal pro-

By definition, a photodiode is a semiconductor device that converts the optical signal into a current signal by electronic processes [36]. The electrical current of the photodiode is composed by two terms, the photocurrent ð Þ IP and the dark current ð Þ ID . The first one is due to the

where P is the optical power level of the light source and R<sup>λ</sup> is the photodiode responsivity [ <sup>A</sup>

diode can be ideally described by the Shockley equation, which is given by [36].

ID ¼ Isð Þ T e

where <sup>q</sup> <sup>¼</sup> <sup>1</sup>:<sup>602</sup> � <sup>10</sup>�<sup>19</sup> <sup>C</sup> is the electron charge, VA is the bias voltage, kB <sup>¼</sup> <sup>1</sup>:<sup>381</sup> � <sup>10</sup>�<sup>23</sup> <sup>J</sup>

condition, the saturation current (as a function of the temperature T) can be written as

<sup>e</sup> �Egð Þ <sup>T</sup> kBT � �

Isð Þ¼ <sup>T</sup> CnAPT<sup>3</sup>

ID <sup>¼</sup> CnAPT <sup>3</sup>

Egð Þ¼ <sup>T</sup> ESi

and by the Sajal Paul relation for the In1�<sup>x</sup>GaxAs p-i-n photodiode case [42]

the Varshni empirical relation for a Si p-n photodiode case [41]

Eq. (2), the dark current is given by

where Cn is a constant factor [ nA

the Boltzmann's constant, and T is the absolute temperature. Then, under the reverse-bias

Assuming that the temperature is lower or close to room temperature, the first term in Eq. (3) can be considered negligible [36]. Taking this into account and substituting this expression in

> <sup>2</sup><sup>e</sup> �Egð Þ <sup>T</sup> 2kBT � �

energy of the photodiode material ½ � eV as a function of the temperature. E Tð Þ is described by

<sup>g</sup> ð Þ� <sup>0</sup> <sup>α</sup>SiT<sup>2</sup>

The second current is always present in the photodiode, even without illumination, and it is originated by the thermal generation of electron-hole pairs in the Si p-n and InGaAs p-i-n photodiode layers. Four sources contribute to the dark current: the generation-recombination current in the depletion region, the diffusion current from the undepleted regions, the tunneling current, and the surface leakage current [38–40]. Nevertheless, the current-voltage of a p-n

> qVA kBT � �

� 1 " #

þ CnAPT

e qVA kBT � � 3 <sup>2</sup><sup>e</sup> �Egð Þ <sup>T</sup> 2kBT � �

� 1 " #

cm2], AP is the photodiode area [cm2], and Egð Þ <sup>T</sup> is the band gap

IP ¼ R<sup>λ</sup> � P, (1)

, (2)

: (3)

, (4)

<sup>T</sup> <sup>þ</sup> <sup>β</sup>Si , (5)

<sup>W</sup>].

<sup>K</sup> is

vided by the photodiode and its noise sources.

100 Advances in Photodetectors - Research and Applications

photoelectric effect on the photodiode surface and it is given by [37],

where RSH is the shunt resistance. Since σP, σD, and σthermal are linearly independent noise sources, the total noise ð Þ σ<sup>T</sup> can be written as

$$
\sigma\_T = \sqrt{\sigma\_p^2 + \sigma\_D^2 + \sigma\_{thermal}^2} \tag{11}
$$

Step 2: Distribute the γ<sup>k</sup>�

Step 3: Multiply the photon matrix Bk�

Step 5: Obtain the optical power level (Pk�

I k�

Step 7: Obtain the noisy current I

matrix A nð Þ ; n ,

projecting Ck�

according to Eq. (7),

Eq. (13)) as,

uniform pattern.

the WH functions as follows

inp photons spatially following a statistical Poisson distribution in a

<sup>k</sup> ð Þ n; n and H�

inp � A nð Þ ; n : (15)

<sup>k</sup> ð Þ n; n , respectively,

<sup>k</sup> ð Þ n; n : (16)

Single-Pixel Imaging Using Photodiodes http://dx.doi.org/10.5772/intechopen.79734 103

out � � that strike on the photodiode by

ð Þ� n; n O nð Þ ; m : (17)

out � Eγ: (18)

: (19)

. The noise terms are generated

B<sup>k</sup>�

Ck�

Step 4: Calculate the number of photons per second γ<sup>k</sup>�

γk � out <sup>¼</sup> <sup>X</sup> M

<sup>¼</sup> <sup>R</sup><sup>λ</sup> � Pk�

noise, the dark-current shot noise and the thermal noise to I

ð Þ¼ <sup>n</sup>; <sup>n</sup> <sup>γ</sup><sup>k</sup>

ð Þ¼ <sup>n</sup>; <sup>n</sup> Bk�

ð Þ n; n onto the object O nð Þ ; m as a dot product,

m¼1

Pk � out <sup>¼</sup> <sup>γ</sup><sup>k</sup>�

out þ CnAPT

k�

I k sp <sup>¼</sup> <sup>1</sup> I0 I kþ sp � I k�

I nð Þ¼ ; n

following a Gaussian distribution, taking into account Eqs. (8)–(10), respectively.

X N

Ck�

Step 6: Calculate the total current as the sum of the photocurrent and the dark current

3 <sup>2</sup><sup>e</sup> �Egð Þ <sup>T</sup> 2kBT � �

Step 8: Obtain the normalized photodetector signal related to Hkð Þ n; n (taking into account

where I<sup>0</sup> is the signal measured by the photodiode when the object is illuminated with an

Step 9: Calculate the image I nð Þ ; n by multiplying the noise current signal of the photodiode by

k¼1 I k

1 N2 X N2

e qVA kBT � �

� 1 " #

sp � �: (20)

sp � Hkð Þ n; n : (21)

sp � � of the photodiode by adding the photocurrent shot

k�

n¼1

ð Þ n; n by H<sup>þ</sup>

�

ð Þ� n; n H�

out) at the photodiode,

Consequently, the signal-to-noise ratio (SNR) of the electrical current signal in units of decibels is defined as [37].

$$\text{SNR} = 10 \log \left( \frac{\overline{I}\_p^2}{\sigma\_T^2} \right) = 20 \log \left( \frac{\overline{I}\_P}{\sqrt{2q\overline{I}\_PB + 2q\overline{I}\_DB + \frac{4k\_BT}{R\_{SH}}}} \right). \tag{12}$$

#### 4. Numerical model of the single-pixel camera

In this section, a numerical model of the SPC is described. The camera model takes into account the optical power level Pinp � � and the wavelength ð Þ <sup>λ</sup><sup>s</sup> of the incident light, which is assumed to be a monochromatic light source. It also considers the photocurrent, the dark current, the photocurrent shot noise, the dark-current shot noise, and the thermal noise as a function of the photodiode parameters.

In this model, the microstructured light patterns are 2-D functions Hkð Þ n; n pertaining to the orthonormal Walsh-Hadamard (WH) basis [46, 47]. The functions Hkð Þ n; n are square binary matrices whose elements are equal to �1, where <sup>k</sup> <sup>¼</sup> <sup>1</sup>, …, N<sup>2</sup> denotes the pattern index, ð Þ <sup>n</sup>; <sup>n</sup> is the pattern spatial location, and ð Þ N; N are the pattern spatial dimensions. For experimental reasons, in our model, Hkð Þ n; n is considered to be composed of a positive H<sup>þ</sup> <sup>k</sup> ð Þ n; n and a complementary part H� <sup>k</sup> ð Þ n; n , fulfilling the following relation,

$$H\_k(n,n) = H\_k^+(n,n) - H\_k^-(n,n). \tag{13}$$

In absence of noise, the mathematical properties of Hkð Þ n; n allow us to recover an exact replica of the object with a 2-D spatial resolution equal to ð Þ N; N pixels.

The numerical process developed to simulate the SPC, from the moment in which the light source illuminates the DMD up to the image reconstruction (see Figure 1), is as follows:

Step 1: Obtain the number of photons per second γ<sup>k</sup>� inp � � corresponding to the wavelength ð Þ <sup>λ</sup><sup>s</sup> and to the optical power of the light source Pinp � �, arriving at the DMD,

$$
\gamma\_{imp}^{k^{\pm}} = floor \left(\frac{P\_{imp}}{E\_{\gamma}}\right),
\tag{14}
$$

where <sup>E</sup><sup>γ</sup> <sup>¼</sup> hc <sup>λ</sup><sup>s</sup> is the photon energy. Step 2: Distribute the γ<sup>k</sup>� inp photons spatially following a statistical Poisson distribution in a matrix A nð Þ ; n ,

$$B^{k^{\pm}}(n,n) = \gamma\_{\text{imp}}^{k^{\pm}} \cdot A(n,n). \tag{15}$$

Step 3: Multiply the photon matrix Bk� ð Þ n; n by H<sup>þ</sup> <sup>k</sup> ð Þ n; n and H� <sup>k</sup> ð Þ n; n , respectively,

$$\mathcal{C}^{k^{\pm}}(n,n) = \mathcal{B}^{k^{\pm}}(n,n) \cdot H\_k^{\pm}(n,n). \tag{16}$$

Step 4: Calculate the number of photons per second γ<sup>k</sup>� out � � that strike on the photodiode by projecting Ck� ð Þ n; n onto the object O nð Þ ; m as a dot product,

$$\gamma\_{out}^{k^{\pm}} = \sum\_{m=1}^{M} \sum\_{n=1}^{N} \mathbb{C}^{k^{\pm}}(n, n) \cdot \mathcal{O}(n, m). \tag{17}$$

Step 5: Obtain the optical power level (Pk� out) at the photodiode,

where RSH is the shunt resistance. Since σP, σD, and σthermal are linearly independent noise

Consequently, the signal-to-noise ratio (SNR) of the electrical current signal in units of decibels

0 B@

In this section, a numerical model of the SPC is described. The camera model takes into

assumed to be a monochromatic light source. It also considers the photocurrent, the dark current, the photocurrent shot noise, the dark-current shot noise, and the thermal noise as a

In this model, the microstructured light patterns are 2-D functions Hkð Þ n; n pertaining to the orthonormal Walsh-Hadamard (WH) basis [46, 47]. The functions Hkð Þ n; n are square binary matrices whose elements are equal to �1, where <sup>k</sup> <sup>¼</sup> <sup>1</sup>, …, N<sup>2</sup> denotes the pattern index, ð Þ <sup>n</sup>; <sup>n</sup> is the pattern spatial location, and ð Þ N; N are the pattern spatial dimensions. For experimental

<sup>k</sup> ð Þ� n; n H�

inp � �

Pinp Eγ � �

� �, arriving at the DMD,

In absence of noise, the mathematical properties of Hkð Þ n; n allow us to recover an exact replica

The numerical process developed to simulate the SPC, from the moment in which the light source illuminates the DMD up to the image reconstruction (see Figure 1), is as follows:

reasons, in our model, Hkð Þ n; n is considered to be composed of a positive H<sup>þ</sup>

Hkð Þ¼ n; n H<sup>þ</sup>

γ<sup>k</sup>� inp ¼ floor

of the object with a 2-D spatial resolution equal to ð Þ N; N pixels.

Step 1: Obtain the number of photons per second γ<sup>k</sup>�

and to the optical power of the light source Pinp

<sup>λ</sup><sup>s</sup> is the photon energy.

<sup>k</sup> ð Þ n; n , fulfilling the following relation,

σ2 <sup>P</sup> <sup>þ</sup> <sup>σ</sup><sup>2</sup>

q

ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi

q

<sup>D</sup> <sup>þ</sup> <sup>σ</sup><sup>2</sup> thermal

<sup>¼</sup> 20 log IP ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi

<sup>2</sup>qIPB <sup>þ</sup> <sup>2</sup>qIDB <sup>þ</sup> <sup>4</sup>kBTB

� � and the wavelength ð Þ <sup>λ</sup><sup>s</sup> of the incident light, which is

RSH

1

<sup>k</sup> ð Þ n; n : (13)

corresponding to the wavelength ð Þ λ<sup>s</sup>

, (14)

CA: (12)

<sup>k</sup> ð Þ n; n and a

: (11)

σ<sup>T</sup> ¼

2 P σ2 T

!

sources, the total noise ð Þ σ<sup>T</sup> can be written as

102 Advances in Photodetectors - Research and Applications

SNR <sup>¼</sup> 10 log <sup>I</sup>

4. Numerical model of the single-pixel camera

account the optical power level Pinp

function of the photodiode parameters.

complementary part H�

where <sup>E</sup><sup>γ</sup> <sup>¼</sup> hc

is defined as [37].

$$P\_{out}^{k^{\pm}} = \boldsymbol{\gamma}\_{out}^{k^{\pm}} \cdot \mathbf{E}\_{\boldsymbol{\gamma}}.\tag{18}$$

Step 6: Calculate the total current as the sum of the photocurrent and the dark current according to Eq. (7),

$$I^{k^{\pm}} = R\_{\Lambda} \cdot P\_{out}^{k^{\pm}} + C\_n A\_P T^{\frac{2}{2}} e^{\left(-\frac{F\_{\mathcal{E}}(T)}{2\eta\_B T}\right)} \left[ e^{\left(\frac{V\_A}{\hbar g^{\top}}\right)} - 1 \right]. \tag{19}$$

Step 7: Obtain the noisy current I k� sp � � of the photodiode by adding the photocurrent shot noise, the dark-current shot noise and the thermal noise to I k� . The noise terms are generated following a Gaussian distribution, taking into account Eqs. (8)–(10), respectively.

Step 8: Obtain the normalized photodetector signal related to Hkð Þ n; n (taking into account Eq. (13)) as,

$$I\_{sp}^{k} = \frac{1}{I\_0} \left( I\_{sp}^{k^+} - I\_{sp}^{k^-} \right). \tag{20}$$

where I<sup>0</sup> is the signal measured by the photodiode when the object is illuminated with an uniform pattern.

Step 9: Calculate the image I nð Þ ; n by multiplying the noise current signal of the photodiode by the WH functions as follows

$$I(n,n) = \frac{1}{N^2} \sum\_{k=1}^{N^2} I\_{sp}^k \cdot H\_k(n,n). \tag{21}$$

#### 5. Results

#### 5.1. Numerical results

The numerical model described in the previous section was used to analyze the performance of a SPC formed by photodiode detectors under different circumstances. Three different studies were developed analyzing the image quality when: (1) the optical power level of the light source changes; (2) we use light sources with different wavelengths; and (3) the photodiode temperature varies. The simulations were performed for two commercial photodiodes, DET36A Thorlabs and DET10C Thorlabs, whose specifications are shown in Table 2. Moreover, the dark current ð Þ ID , the dark-current shot noise ð Þ σ<sup>D</sup> , and the thermal noise ð Þ σthermal curves are plotted as a function of the temperature (see Figure 2). The curves were obtained taking into account the Varshni empirical relation (Eq. (5)) for the Si detector case and the Sajal Paul relation (Eq. (6)) for the InGaAs detector case. The material parameters are shown in

Single-Pixel Imaging Using Photodiodes http://dx.doi.org/10.5772/intechopen.79734 105

Firstly, we analyzed the image quality as a function of the optical power level of the light source. We fixed the wavelength of the light source to 520 nm and the photodiode temperature to 298 K. Figure 3 shows the photocurrent, the dark current, and the total current associated to the single-pixel camera for two different optical power levels; (a) 42:29μW and (b) 0:0085μW,

Figure 3. Photocurrent, dark current, and total current with their associated noise values as a function of the WH pattern index. Two different optical power values were considered (a) 42:49μW and (b) 0:0085μW. The wavelength of the light source was fixed at 520 nm and the photodiode temperature at 298 K. Images computed from these electric signals are

shown on the right. In both cases, the resolution of the WH patterns is 64 64 pixels (Reprinted from [10]).

Table 1.


Table 2. Photodiode parameters data.

Figure 2. Simulated dark current, dark-current shot noise and thermal noise as a function of the temperature for (a) Si biased detector (DET36A Thorlabs) and (b) InGaAs biased detector (DET10C Thorlabs).

taking into account the Varshni empirical relation (Eq. (5)) for the Si detector case and the Sajal Paul relation (Eq. (6)) for the InGaAs detector case. The material parameters are shown in Table 1.

5. Results

5.1. Numerical results

104 Advances in Photodetectors - Research and Applications

The numerical model described in the previous section was used to analyze the performance of a SPC formed by photodiode detectors under different circumstances. Three different studies were developed analyzing the image quality when: (1) the optical power level of the light source changes; (2) we use light sources with different wavelengths; and (3) the photodiode temperature varies. The simulations were performed for two commercial photodiodes, DET36A Thorlabs and DET10C Thorlabs, whose specifications are shown in Table 2. Moreover, the dark current ð Þ ID , the dark-current shot noise ð Þ σ<sup>D</sup> , and the thermal noise ð Þ σthermal curves are plotted as a function of the temperature (see Figure 2). The curves were obtained

Parameter Symbol Silicon biased detector In0:53Ga0:47As biased detector

Hz

Figure 2. Simulated dark current, dark-current shot noise and thermal noise as a function of the temperature for (a) Si

biased detector (DET36A Thorlabs) and (b) InGaAs biased detector (DET10C Thorlabs).

<sup>p</sup> <sup>2</sup>:<sup>5</sup> � <sup>10</sup>�<sup>14</sup> <sup>W</sup>ffiffiffiffi

Hz p

Detector name DET36A Thorlabs DET10C Thorlabs

Photodiode active area AP 13:0mm2 0:8mm<sup>2</sup> Wavelength range 350–1100 nm 900–1700 nm Band gap energy at 298 K Eg 1.1114 eV 0.7379 eV Rise time response tr 14.0 ns 10.0 ns Noise bandwidth B 0.025 nHz 0.035 nHz Bias voltage VA 10.0 V 5.0 V Saturation current at 298 K Is 0.35 nA 1.0 nA Shunt resistance Rsh 1.0 GΩ 10.0 GΩ

NEP at <sup>λ</sup><sup>P</sup> <sup>1</sup>:<sup>6</sup> � <sup>10</sup>�<sup>14</sup> <sup>W</sup>ffiffiffiffi

Table 2. Photodiode parameters data.

Firstly, we analyzed the image quality as a function of the optical power level of the light source. We fixed the wavelength of the light source to 520 nm and the photodiode temperature to 298 K. Figure 3 shows the photocurrent, the dark current, and the total current associated to the single-pixel camera for two different optical power levels; (a) 42:29μW and (b) 0:0085μW,

Figure 3. Photocurrent, dark current, and total current with their associated noise values as a function of the WH pattern index. Two different optical power values were considered (a) 42:49μW and (b) 0:0085μW. The wavelength of the light source was fixed at 520 nm and the photodiode temperature at 298 K. Images computed from these electric signals are shown on the right. In both cases, the resolution of the WH patterns is 64 64 pixels (Reprinted from [10]).

Figure 4. SNR of the signal and the recovered images as a function of the optical power Pinp. The recovered images on the right part are a sample of the SNR red data points (reprinted from [10]).

for both photodiodes are presented in Figure 5(b) [49, 50]. As we can see comparing Figure 5

Figure 5. (a) SNR as a function of the wavelength of the light source; (b) responsivity data of both photodiodes [49, 50];

Single-Pixel Imaging Using Photodiodes http://dx.doi.org/10.5772/intechopen.79734 107

Finally, we analyzed the dependence of the image quality with the photodiode temperature. The wavelength of the light source was set to 520 and 1600 nm for the DET35A and the DET10C detectors, respectively. For each detector, three curves of the SNR as a function of the photodiode temperature are plotted for constant values of the optical power (42:49μW, 8:49μW and 0:21μW) as shown in Figure 6. Moreover, several images for different values of temperature and optical power are displayed. In general, the SNR of the image decreases as the temperature increases. However, as we can see in the figure, the influence of the temperature on the SNR value is less significant for higher optical power levels. In particular, the performance of these photodiodes is suitable even with high temperatures whenever the optical power is higher than 8:50μW. As previously shown in Figure 2, the dark current and the dark-current shot noise increase when the temperature increases. Although the current and its noise increase when the temperature increases, this effect is negligible in the SNR curves if

A scheme of the experimental setup by using transillumination is depicted in Figure 7. In this case, a DMD (DLP Discovery 4100, Texas Instrument) was illuminated with a collimated light beam generated with an incoherent white-light source. A narrow band pass filter (P10-515-S 93819, Corion) centered at a wavelength of 520 nm with a bandwidth of 20 nm was used to avoid spectral artifacts. In order to apply SPI techniques, microstructured light patterns corresponding to 2-D functions of the orthonormal WH basis with 64 64 pixels were coded on the DMD display in a chip area of 1024 1024 micromirrors with a micromirror pixel pitch

(a) and (b), the behavior of the SNR and responsivity curves are closely related.

the optical power level is high.

and (c) recovered images for different wavelengths.

5.2. Experimental results

respectively. We also show recovered images by applying SPI techniques to the different current signals in the plot. We can see that for the case of low light power in Figure 3(b), the photocurrent is noisier, the total current is worst, and therefore, the quality of the image deteriorates with respect to the case in Figure 3(a).

On the other hand, we numerically evaluated the image quality using the SNR metric defined by [48]. The reference image is obtained by SPI techniques but using only the photocurrent values without considering the noise sources. Afterward, we plot in Figure 4 the SNR as a function of the optical power of the light source. As expected, the image quality obtained by the SPC improves when the optical power increases. In the same figure, we also plot the curve of the SNR of the photodiode signal as a function of the optical power level. The reference signal is again the photocurrent signal without noise values. Of course, the SNR is the same in both cases. Therefore, we will use the SNR applied to the images from now onwards.

Second, we analyzed how the wavelength of the light source influences the performance of the SPC. The optical power of the light source was set to 8:49μW and the photodiode temperature to 298 K. Figure 5(a) shows the dependence of the SNR versus wavelength for the DET36A and the DET10C photodiodes. In Figure 5(c), we display several images reconstructed with our model for different wavelengths of the incident light. The key point to understand the relationship between the image quality and the wavelength is the photodiode responsivity ð Þ R<sup>λ</sup> . In a photodetector, the incident optical power and the generated photocurrent are proportionally related by the responsivity (Eq. (1)). Therefore, the photocurrent increases as the responsivity rises up, although optical power remains constant. The responsivity versus wavelength curves

Figure 5. (a) SNR as a function of the wavelength of the light source; (b) responsivity data of both photodiodes [49, 50]; and (c) recovered images for different wavelengths.

for both photodiodes are presented in Figure 5(b) [49, 50]. As we can see comparing Figure 5 (a) and (b), the behavior of the SNR and responsivity curves are closely related.

Finally, we analyzed the dependence of the image quality with the photodiode temperature. The wavelength of the light source was set to 520 and 1600 nm for the DET35A and the DET10C detectors, respectively. For each detector, three curves of the SNR as a function of the photodiode temperature are plotted for constant values of the optical power (42:49μW, 8:49μW and 0:21μW) as shown in Figure 6. Moreover, several images for different values of temperature and optical power are displayed. In general, the SNR of the image decreases as the temperature increases. However, as we can see in the figure, the influence of the temperature on the SNR value is less significant for higher optical power levels. In particular, the performance of these photodiodes is suitable even with high temperatures whenever the optical power is higher than 8:50μW. As previously shown in Figure 2, the dark current and the dark-current shot noise increase when the temperature increases. Although the current and its noise increase when the temperature increases, this effect is negligible in the SNR curves if the optical power level is high.

#### 5.2. Experimental results

respectively. We also show recovered images by applying SPI techniques to the different current signals in the plot. We can see that for the case of low light power in Figure 3(b), the photocurrent is noisier, the total current is worst, and therefore, the quality of the image

Figure 4. SNR of the signal and the recovered images as a function of the optical power Pinp. The recovered images on the

On the other hand, we numerically evaluated the image quality using the SNR metric defined by [48]. The reference image is obtained by SPI techniques but using only the photocurrent values without considering the noise sources. Afterward, we plot in Figure 4 the SNR as a function of the optical power of the light source. As expected, the image quality obtained by the SPC improves when the optical power increases. In the same figure, we also plot the curve of the SNR of the photodiode signal as a function of the optical power level. The reference signal is again the photocurrent signal without noise values. Of course, the SNR is the same in

Second, we analyzed how the wavelength of the light source influences the performance of the SPC. The optical power of the light source was set to 8:49μW and the photodiode temperature to 298 K. Figure 5(a) shows the dependence of the SNR versus wavelength for the DET36A and the DET10C photodiodes. In Figure 5(c), we display several images reconstructed with our model for different wavelengths of the incident light. The key point to understand the relationship between the image quality and the wavelength is the photodiode responsivity ð Þ R<sup>λ</sup> . In a photodetector, the incident optical power and the generated photocurrent are proportionally related by the responsivity (Eq. (1)). Therefore, the photocurrent increases as the responsivity rises up, although optical power remains constant. The responsivity versus wavelength curves

both cases. Therefore, we will use the SNR applied to the images from now onwards.

deteriorates with respect to the case in Figure 3(a).

right part are a sample of the SNR red data points (reprinted from [10]).

106 Advances in Photodetectors - Research and Applications

A scheme of the experimental setup by using transillumination is depicted in Figure 7. In this case, a DMD (DLP Discovery 4100, Texas Instrument) was illuminated with a collimated light beam generated with an incoherent white-light source. A narrow band pass filter (P10-515-S 93819, Corion) centered at a wavelength of 520 nm with a bandwidth of 20 nm was used to avoid spectral artifacts. In order to apply SPI techniques, microstructured light patterns corresponding to 2-D functions of the orthonormal WH basis with 64 64 pixels were coded on the DMD display in a chip area of 1024 1024 micromirrors with a micromirror pixel pitch

of 10:8μm: The WH patterns were projected onto the object plane using a 4-f optical imaging system formed by two achromatic lenses L1 and L2. The focal distances of L1, and L2 were f <sup>1</sup> ¼ 100 mm, and f <sup>2</sup> ¼ 100 mm, respectively. The magnification factor of the 4-f optical system was 1.0; therefore, the field of view (FOV) was 1.10 � 1.10 cm, which is, in fact, the size of the WH patterns on the DMD display. Note that a circular diaphragm was used on the Fourier plane in order to filter unwanted diffracted orders produced by the periodic micromirror arrangement on the DMD display. The light transmitted by the object was subsequently collected by a lens L3 and focused onto a Si biased detector (DET36A Thorlabs) located at the back focal point of L3; f <sup>3</sup> ¼ 50 mm. The optical power level of the incident light was adjusted by using a neutral density filter wheel (NDC-100S-4M-Mounted Step Variable ND Filter) located in front of the lamp and measuring power with a power meter (Coherent, FieldMaster GS) close to the photodiode sensor. Finally, the signal was digitized and saved in a computer by using a DAQ system. The image was reconstructed by using Eq. (21). The object was a black and white logo of our university (UJI) printed in a transparent acetate slide. The object size was 1.10 � 1.10 cm with a total transmittance factor of 0.12. It should be mentioned that this object

Single-Pixel Imaging Using Photodiodes http://dx.doi.org/10.5772/intechopen.79734 109

Figure 8(a) shows numerically and experimentally recovered images with different levels of the optical power. We can see that, in both cases, the noise level decreases with the optical power. This is corroborated by the results in Figure 8(b), which show that the SNR curve corresponding to images obtained with the simulated and the experimental systems have a similar dependence with the optical power. This fact confirms the validity of our numerical

Figure 8. (a) Numerically and experimentally recovered images for different optical power levels Pinp; (b) SNR depen-

has the same features as the one used in Sub Section 5.1.

dence with Pinp for the experimental and numerical images.

model.

Figure 6. SNR dependence with the photodiode temperature for three optical power levels: 42:49μW, 8:49μW, and 0:21μW for (a) the Si biased detector (DET36A Thorlabs), and (b) the InGaAs biased detector (DET10C Thorlabs). The recovered images obtained for those optical power levels are shown as well. For those images, the temperature range starts at 273 K and ends at 373 K in 25 K steps.

Figure 7. Experimental setup of the single-pixel camera.

of 10:8μm: The WH patterns were projected onto the object plane using a 4-f optical imaging system formed by two achromatic lenses L1 and L2. The focal distances of L1, and L2 were f <sup>1</sup> ¼ 100 mm, and f <sup>2</sup> ¼ 100 mm, respectively. The magnification factor of the 4-f optical system was 1.0; therefore, the field of view (FOV) was 1.10 � 1.10 cm, which is, in fact, the size of the WH patterns on the DMD display. Note that a circular diaphragm was used on the Fourier plane in order to filter unwanted diffracted orders produced by the periodic micromirror arrangement on the DMD display. The light transmitted by the object was subsequently collected by a lens L3 and focused onto a Si biased detector (DET36A Thorlabs) located at the back focal point of L3; f <sup>3</sup> ¼ 50 mm. The optical power level of the incident light was adjusted by using a neutral density filter wheel (NDC-100S-4M-Mounted Step Variable ND Filter) located in front of the lamp and measuring power with a power meter (Coherent, FieldMaster GS) close to the photodiode sensor. Finally, the signal was digitized and saved in a computer by using a DAQ system. The image was reconstructed by using Eq. (21). The object was a black and white logo of our university (UJI) printed in a transparent acetate slide. The object size was 1.10 � 1.10 cm with a total transmittance factor of 0.12. It should be mentioned that this object has the same features as the one used in Sub Section 5.1.

Figure 8(a) shows numerically and experimentally recovered images with different levels of the optical power. We can see that, in both cases, the noise level decreases with the optical power. This is corroborated by the results in Figure 8(b), which show that the SNR curve corresponding to images obtained with the simulated and the experimental systems have a similar dependence with the optical power. This fact confirms the validity of our numerical model.

Figure 6. SNR dependence with the photodiode temperature for three optical power levels: 42:49μW, 8:49μW, and 0:21μW for (a) the Si biased detector (DET36A Thorlabs), and (b) the InGaAs biased detector (DET10C Thorlabs). The recovered images obtained for those optical power levels are shown as well. For those images, the temperature range

starts at 273 K and ends at 373 K in 25 K steps.

108 Advances in Photodetectors - Research and Applications

Figure 7. Experimental setup of the single-pixel camera.

Figure 8. (a) Numerically and experimentally recovered images for different optical power levels Pinp; (b) SNR dependence with Pinp for the experimental and numerical images.

However, even though the model has been developed taking into account the most important noise factors during the imaging process, there is still a discrepancy in the values of the SNR for the experimental and the simulated images. This difference is produced by several other noise sources not included in the model. First, we have considered that both the DMD reflectance and the object transmittance are ideal binary functions, which is not true in practice. Second, we did not introduce background, or ambient, light into the numerical model, with the unavoidable associated noise. Finally, we did not consider the current-to-voltage and the analog-to-digital conversion processes, which produce certain amount of noise. A clear example in the last case is the quantization noise.

However, we have shown that the quality of the final image, in terms of the SNR, changes in a similar way with the light power. This allows us to confirm that the model can be useful to predict the behavior of SPI systems based on photodiodes under different circumstances.

We acknowledge financial support from MINECO (FIS2016-75618-R and FIS2015-72872-EXP), Generalitat Valenciana (PROMETEO/2016/079), and Universitat Jaume I (P1-1B2015-35). Yessenia Jauregui-Sánchez acknowledges the Santiago Grisolía support from Generalitat

\*, Pere Clemente1,2, Pedro Latorre-Carmona3

1 GROCUJI, Institute of New Imaging Technologies (INIT), Universitat Jaume I, Castelló,

2 Servei Central d'Instrumentació Científica (SCIC), Universitat Jaume I, Castelló, Spain 3 eVIS, Institute of New Imaging Technologies (INIT), Universitat Jaume I, Castelló, Spain

[1] Duarte MF, Davenport MA, Takbar D, Laska JN, Sun T, Kelly KF, Baraniuk RG. Singlepixel imaging via compressive sampling. IEEE Signal Processing Magazine. 2008;25:83-91

[2] Studer V, Bobin J, Chahid M, Mousavi HS, Candes E, Dahan M. Compressive fluorescence microscopy for biological and hyperspectral imaging. Proceedings of the National Acad-

[3] Howland GA, Lum DJ, Ware MR, Howell JC. Photon counting compressive depth map-

[4] Soldevila F, Irles E, Durán V, Clemente P, Fernández-Alonso M, Tajahuerce E, Lancis J. Single-pixel polarimetric imaging spectrometer by compressive sensing. Applied Physics

[5] Durán V, Clemente P, Fernández-Alonso M, Tajahuerce E, Lancis J. Single-pixel polarimet-

emy of Sciences of the United States of America. 2012;109:E1679-E1687

, Jesús Lancis<sup>1</sup> and

Single-Pixel Imaging Using Photodiodes http://dx.doi.org/10.5772/intechopen.79734 111

Funding information

Author details

Enrique Tajahuerce<sup>1</sup>

Spain

References

Yessenia Jauregui-Sánchez<sup>1</sup>

\*Address all correspondence to: jauregui@uji.es

ping. Optics Express. 2013;21:23822-23837

B: Lasers and Optics. 2013;113:551-559

ric imaging. Optics Letters. 2012;37:824-826

Valenciana (GRISOLIA/2015/037).

#### 6. Conclusions

In this chapter, a numerical model of a single-pixel camera (SPC) has been developed, considering the characteristics of the incident light and the physical properties, as well as the specifications of the photodiode. We have accomplished a careful and rigorous mathematical review of the electrical behavior of Si and InGaAs detectors. Our model takes into account the photocurrent, the dark current, the photocurrent shot noise, the dark-current shot noise, and the Johnson-Nyquist (thermal) noise of two commercial photodiodes, a Si and an InGaAs photodetector.

Numerical simulations with our model have allowed us to analyze the behavior of the singlepixel imaging (SPI) technique in different contexts. In particular, we have studied the quality of the final image as a function of the power of the light source. We have corroborated the reduction of the SNR for low light levels. We have also observed the clear link between the quality of the photocurrent signal and the quality of the reconstructed image. These results can be useful to predict the behavior of imaging systems working in low light level conditions.

We have also studied the dependence of the SNR with the wavelength of the light source. In this case, we conclude that the influence of the wavelength arises from the variation of the quantum efficiency and the responsivity of the photodetector. Such analysis could be the first step in the application of SPI techniques to multispectral imaging.

Finally, we have analyzed the quality of the images provided by the SPC as a function of the photodiode temperature. The study is performed for both a Si biased and an InGaAs biased detector. The main conclusion in this case is that the SNR of the reconstructed images changes only slightly with the temperature for high values of the light power. However, the reduction is clearly significant for low light levels. Therefore, cooling the detector can play an important role in photon counting or low light level applications.

An experimental SPC has been developed in order to validate the results provided by our model. The quality of the images obtained experimentally does not match perfectly with that predicted by the model. The discrepancy is due to several unaccounted sources of uncertainty such as nonuniformities in the mirrors of the DMD or in the object substrate, as well as noise introduced in the signal amplification process or the analog to digital conversion procedure. However, we have shown that the quality of the final image, in terms of the SNR, changes in a similar way with the light power. This allows us to confirm that the model can be useful to predict the behavior of SPI systems based on photodiodes under different circumstances.

### Funding information

However, even though the model has been developed taking into account the most important noise factors during the imaging process, there is still a discrepancy in the values of the SNR for the experimental and the simulated images. This difference is produced by several other noise sources not included in the model. First, we have considered that both the DMD reflectance and the object transmittance are ideal binary functions, which is not true in practice. Second, we did not introduce background, or ambient, light into the numerical model, with the unavoidable associated noise. Finally, we did not consider the current-to-voltage and the analog-to-digital conversion processes, which produce certain amount of noise. A clear exam-

In this chapter, a numerical model of a single-pixel camera (SPC) has been developed, considering the characteristics of the incident light and the physical properties, as well as the specifications of the photodiode. We have accomplished a careful and rigorous mathematical review of the electrical behavior of Si and InGaAs detectors. Our model takes into account the photocurrent, the dark current, the photocurrent shot noise, the dark-current shot noise, and the Johnson-Nyquist (thermal) noise of two commercial photodiodes, a Si and an InGaAs

Numerical simulations with our model have allowed us to analyze the behavior of the singlepixel imaging (SPI) technique in different contexts. In particular, we have studied the quality of the final image as a function of the power of the light source. We have corroborated the reduction of the SNR for low light levels. We have also observed the clear link between the quality of the photocurrent signal and the quality of the reconstructed image. These results can be useful to predict the behavior of imaging systems working in low light level conditions.

We have also studied the dependence of the SNR with the wavelength of the light source. In this case, we conclude that the influence of the wavelength arises from the variation of the quantum efficiency and the responsivity of the photodetector. Such analysis could be the first

Finally, we have analyzed the quality of the images provided by the SPC as a function of the photodiode temperature. The study is performed for both a Si biased and an InGaAs biased detector. The main conclusion in this case is that the SNR of the reconstructed images changes only slightly with the temperature for high values of the light power. However, the reduction is clearly significant for low light levels. Therefore, cooling the detector can play an important

An experimental SPC has been developed in order to validate the results provided by our model. The quality of the images obtained experimentally does not match perfectly with that predicted by the model. The discrepancy is due to several unaccounted sources of uncertainty such as nonuniformities in the mirrors of the DMD or in the object substrate, as well as noise introduced in the signal amplification process or the analog to digital conversion procedure.

step in the application of SPI techniques to multispectral imaging.

role in photon counting or low light level applications.

ple in the last case is the quantization noise.

110 Advances in Photodetectors - Research and Applications

6. Conclusions

photodetector.

We acknowledge financial support from MINECO (FIS2016-75618-R and FIS2015-72872-EXP), Generalitat Valenciana (PROMETEO/2016/079), and Universitat Jaume I (P1-1B2015-35). Yessenia Jauregui-Sánchez acknowledges the Santiago Grisolía support from Generalitat Valenciana (GRISOLIA/2015/037).

### Author details

Yessenia Jauregui-Sánchez<sup>1</sup> \*, Pere Clemente1,2, Pedro Latorre-Carmona3 , Jesús Lancis<sup>1</sup> and Enrique Tajahuerce<sup>1</sup>

\*Address all correspondence to: jauregui@uji.es

1 GROCUJI, Institute of New Imaging Technologies (INIT), Universitat Jaume I, Castelló, Spain


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**Chapter 7**

**Provisional chapter**

**Overcoming the Bandwidth-Quantum Efficiency Trade-**

Optical systems and microwave photonics applications rely heavily on high-performance photodetectors having a high bandwidth-efficiency product. The main types of photodetector structures include Schottky and PIN-photodiodes, heterojunction phototransistors, avalanche photodetectors, and metal-semiconductor-metal photodetectors. Verticallyilluminated photodetectors intrinsically present bandwidth-efficiency limitations, but these have been mitigated by new innovations over the years in quantum well photodetectors, edge-coupled photodetectors and resonant-cavity enhanced photodetectors for improved photophysical characteristics. Edge-coupled ultra-high-speed photodetectors have yielded high conversion efficiencies, and the active device structure of resonantcavity-enhanced photodetectors allows wavelength selectivity and optical field enhancement due to resonance, enabling photodetectors to be made thinner and hence faster, while simultaneously increasing the quantum efficiency at the resonant wavelengths. Single-photon avalanche diodes have been developed, which combine an ultimate sensitivity with excellent timing accuracy. Further advances in addressing the bandwidthquantum efficiency trade-off have incorporated photon-trapping nanostructures and plasmonic nanoparticles. Nanowire photodetectors have also demonstrated the highest

**Keywords:** bandwidth-efficiency product, saturation current, quantum efficiency,

High-performance photodetectors (PDs) are key components in optical systems and microwave photonics applications. Examples include radio telescope arrays, optical fiber communication

**Overcoming the Bandwidth-Quantum Efficiency** 

© 2016 The Author(s). Licensee InTech. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use,

distribution, and reproduction in any medium, provided the original work is properly cited.

DOI: 10.5772/intechopen.86506

**Off in Conventional Photodetectors**

**Trade-Off in Conventional Photodetectors**

Additional information is available at the end of the chapter

Additional information is available at the end of the chapter

Tianyi Zhou and Kuan W.A. Chee

Tianyi Zhou and Kuan W.A. Chee

http://dx.doi.org/10.5772/intechopen.86506

photophysical performance to date.

photosensitivity, optical absorption, drift layers

**Abstract**

**1. Introduction**


#### **Overcoming the Bandwidth-Quantum Efficiency Trade-Off in Conventional Photodetectors Overcoming the Bandwidth-Quantum Efficiency Trade-Off in Conventional Photodetectors**

DOI: 10.5772/intechopen.86506

Tianyi Zhou and Kuan W.A. Chee Tianyi Zhou and Kuan W.A. Chee

Additional information is available at the end of the chapter Additional information is available at the end of the chapter

http://dx.doi.org/10.5772/intechopen.86506

#### **Abstract**

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114 Advances in Photodetectors - Research and Applications

Optical systems and microwave photonics applications rely heavily on high-performance photodetectors having a high bandwidth-efficiency product. The main types of photodetector structures include Schottky and PIN-photodiodes, heterojunction phototransistors, avalanche photodetectors, and metal-semiconductor-metal photodetectors. Verticallyilluminated photodetectors intrinsically present bandwidth-efficiency limitations, but these have been mitigated by new innovations over the years in quantum well photodetectors, edge-coupled photodetectors and resonant-cavity enhanced photodetectors for improved photophysical characteristics. Edge-coupled ultra-high-speed photodetectors have yielded high conversion efficiencies, and the active device structure of resonantcavity-enhanced photodetectors allows wavelength selectivity and optical field enhancement due to resonance, enabling photodetectors to be made thinner and hence faster, while simultaneously increasing the quantum efficiency at the resonant wavelengths. Single-photon avalanche diodes have been developed, which combine an ultimate sensitivity with excellent timing accuracy. Further advances in addressing the bandwidthquantum efficiency trade-off have incorporated photon-trapping nanostructures and plasmonic nanoparticles. Nanowire photodetectors have also demonstrated the highest photophysical performance to date.

**Keywords:** bandwidth-efficiency product, saturation current, quantum efficiency, photosensitivity, optical absorption, drift layers

#### **1. Introduction**

High-performance photodetectors (PDs) are key components in optical systems and microwave photonics applications. Examples include radio telescope arrays, optical fiber communication

© 2016 The Author(s). Licensee InTech. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. © 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

systems and optically controlled phased array radar. Over the past several decades, the design principles of PDs and their technologies have become well developed, as various structures and fabrication/processing strategies have been established. Overall, the main types of PDs include *p*-*i*-*n* PDs, metal-semiconductor-metal (MSM) PDs, waveguide PDs (WGPDs) and traveling-wave PDs (TWPDs). These can be placed into three categories, according to the direction of optical propagation in the PDs, i.e., vertically-illuminated PDs (VPDs), edge-coupled PDs (EC-PDs) and resonant-cavity enhanced PDs (RCE-PDs). On the other hand, the lump and distributed PDs can be classified based on the component properties. The basic requirements for the PDs are high efficiency and high bandwidth, which are especially significant for systems operating at high data rates. In general, the quality of the different types of the high-speed PDs is characterized by the bandwidth-efficiency product. Another performance requirement of PDs is a high saturation current, especially for high power systems.

temperatures. As a result of large optical coefficients, more than 70% quantum efficiency has

Overcoming the Bandwidth-Quantum Efficiency Trade-Off in Conventional Photodetectors

http://dx.doi.org/10.5772/intechopen.86506

117

Although HgCdTe is considered as an ideal material providing high degrees of freedom in infrared detector design, the difficulty in the fabrication and integration of such narrow bandgap materials (0–1.5 eV) is one practical limitation toward developing large-scale array applications [15]. Alternatively, photodetectors employing quantum wells in wide bandgap semiconductors (e.g., III-nitrides) were studied, such as, the so-called quantum well infrared photodetectors (QWIPs). Taking advantage of the artificial quantum well structure, the photocurrent is derived from optical absorption due to intersubband transitions involving many interacting and quantum-confined electrons. Based on previous theoretical and experimental investigations [19–22], Levine et al. [23] demonstrated the first QWIP, achieving a high peak responsivity at a wavelength of 10.8 μm. Thereafter, QWIPs were extensively explored [24–28]

However, *n*-type doped QWIP cannot utilize normal incidence illumination, and therefore optical coupling can be realized using gratings [32, 33], corrugated surfaces or 45° edge illumination [34, 35] to achieve promising results. Despite the relatively low quantum efficiency, the high uniformity and excellent reproducibility benefitting from mature growth and processing technologies represent main advantages of the QWIP over previous generation infrared detectors. It is the superior QWIP technology that makes large-scale focal plane arrays (FPA) possible. Examples include 1024 × 1024 pixel QWIP FPAs at mid-wavelength infrared and long-wavelength infrared [29], and 640 × 512 pixel four-band FPAs fabricated by monolithic

Although various structures have been proposed and experimentally characterized, the bandwidth-efficiency product of conventional VPDs are limited due to the trade-off between quantum efficiency and bandwidth, which imposes a limit on the speed and sensitivity for photonic applications. For VPDs, increasing the thickness of the PD absorption layer offers the advantages of high quantum efficiency but suffers from a narrow bandwidth. Fortunately, the edge-coupled WGPD has been widely investigated as a promising approach to overcome the bandwidth-efficiency trade-off found in the VPD. The structure of the WGPD permits the bandwidth and efficiency to be specified almost independently because the quantum efficiency is determined by the waveguide length instead of the absorption layer thickness. However, the optical waveguide structure of the WGPD results in a low optical coupling efficiency [38], which is mainly caused by the mode mismatch between waveguide and optical fiber. In practice, efficient coupling is usually enhanced by a mode field converter [39]. Accordingly, depending on the structural configuration,

As reported in [40], a bandwidth of 28 GHz and an efficiency of 25% have been achieved by the first ever high-speed edge-coupled WGPD. In 1991, WGPDs with double-core multimode

been achieved in HgCdTe infrared photodetectors [18].

and related applications were developed [29–31].

stacking of different multi-quantum well structures [36, 37].

WGPDs can be divided into mushroom-WGPDs and TWPDs.

**3. Edge-coupled photodetectors**

#### **2. Vertically-illuminated photodetectors (VPDs)**

The VPD comprises either the *p*-*i*-*n* or MSM structure. Upon optical illumination, electronhole pairs generated in the device are separated by the electric fields within the *i*-region, thus contributing to a photocurrent through the processes of drift and diffusion. Simple-structured *p*-*i*-*n* PDs are the most common components in many optical systems. Yet, in order to improve on existing features of the conventional *p*-*i*-*n* PDs, different design variations, such as, those found in dual-depletion-region photodiodes (DDR PDs) [1, 2], uni-traveling-carrier photodiodes (UTC-PDs) [3–5] and avalanche photodiodes (APDs) [6–9], were extensively studied. Utilizing optical absorption layers combined with drift layers having wide bandgap, the DDR PDs typically have a larger bandwidth-efficiency product than that of conventional *p*-*i*-*n* PDs. In addition, the saturation current can be increased by optimizing the thicknesses of the absorption and drift layers [10]. To increase both bandwidth and saturation current, the UTC *p*-*i*-*n* structure is used, via leveraging the fast electrons during charge carrier transport. Thanks to the internal gain based on the avalanche multiplication effect, an enhanced sensitivity can be achieved by the APDs at the expense of higher operating voltages. MSM PDs based on the Schottky barrier [11–13] are another type of VPDs, which possess a smaller capacitance and lower dark current compared with that of the traditional design.

Due to broad and significant military and civilian applications, research on infrared detection and infrared photodetectors has intensified. In past decades, work on developing the operating temperature and spectral sensitivity capabilities of infrared photodetectors have become significant with the rapid development of photoelectric materials, for example, mercury cadmium telluride (HgCdTe) ternary alloys. Since the first synthesis of HgCdTe materials [14], HgCdTe infrared detectors with variable wavelength response have been manufactured by varying the alloy composition [15]. The amount of cadmium in the alloy can be selected in order to tune the bandgap which in turn determines the optical absorption of the material in the desired infrared range spanning the shortwave infrared to the very long wave infrared. As reported in [16, 17], HgCdTe infrared detectors with low frequency noise and high R0 A product in the long wavelength spectral region were demonstrated at liquid nitrogen temperatures. As a result of large optical coefficients, more than 70% quantum efficiency has been achieved in HgCdTe infrared photodetectors [18].

Although HgCdTe is considered as an ideal material providing high degrees of freedom in infrared detector design, the difficulty in the fabrication and integration of such narrow bandgap materials (0–1.5 eV) is one practical limitation toward developing large-scale array applications [15]. Alternatively, photodetectors employing quantum wells in wide bandgap semiconductors (e.g., III-nitrides) were studied, such as, the so-called quantum well infrared photodetectors (QWIPs). Taking advantage of the artificial quantum well structure, the photocurrent is derived from optical absorption due to intersubband transitions involving many interacting and quantum-confined electrons. Based on previous theoretical and experimental investigations [19–22], Levine et al. [23] demonstrated the first QWIP, achieving a high peak responsivity at a wavelength of 10.8 μm. Thereafter, QWIPs were extensively explored [24–28] and related applications were developed [29–31].

However, *n*-type doped QWIP cannot utilize normal incidence illumination, and therefore optical coupling can be realized using gratings [32, 33], corrugated surfaces or 45° edge illumination [34, 35] to achieve promising results. Despite the relatively low quantum efficiency, the high uniformity and excellent reproducibility benefitting from mature growth and processing technologies represent main advantages of the QWIP over previous generation infrared detectors. It is the superior QWIP technology that makes large-scale focal plane arrays (FPA) possible. Examples include 1024 × 1024 pixel QWIP FPAs at mid-wavelength infrared and long-wavelength infrared [29], and 640 × 512 pixel four-band FPAs fabricated by monolithic stacking of different multi-quantum well structures [36, 37].

### **3. Edge-coupled photodetectors**

systems and optically controlled phased array radar. Over the past several decades, the design principles of PDs and their technologies have become well developed, as various structures and fabrication/processing strategies have been established. Overall, the main types of PDs include *p*-*i*-*n* PDs, metal-semiconductor-metal (MSM) PDs, waveguide PDs (WGPDs) and traveling-wave PDs (TWPDs). These can be placed into three categories, according to the direction of optical propagation in the PDs, i.e., vertically-illuminated PDs (VPDs), edge-coupled PDs (EC-PDs) and resonant-cavity enhanced PDs (RCE-PDs). On the other hand, the lump and distributed PDs can be classified based on the component properties. The basic requirements for the PDs are high efficiency and high bandwidth, which are especially significant for systems operating at high data rates. In general, the quality of the different types of the high-speed PDs is characterized by the bandwidth-efficiency product. Another performance requirement

The VPD comprises either the *p*-*i*-*n* or MSM structure. Upon optical illumination, electronhole pairs generated in the device are separated by the electric fields within the *i*-region, thus contributing to a photocurrent through the processes of drift and diffusion. Simple-structured *p*-*i*-*n* PDs are the most common components in many optical systems. Yet, in order to improve on existing features of the conventional *p*-*i*-*n* PDs, different design variations, such as, those found in dual-depletion-region photodiodes (DDR PDs) [1, 2], uni-traveling-carrier photodiodes (UTC-PDs) [3–5] and avalanche photodiodes (APDs) [6–9], were extensively studied. Utilizing optical absorption layers combined with drift layers having wide bandgap, the DDR PDs typically have a larger bandwidth-efficiency product than that of conventional *p*-*i*-*n* PDs. In addition, the saturation current can be increased by optimizing the thicknesses of the absorption and drift layers [10]. To increase both bandwidth and saturation current, the UTC *p*-*i*-*n* structure is used, via leveraging the fast electrons during charge carrier transport. Thanks to the internal gain based on the avalanche multiplication effect, an enhanced sensitivity can be achieved by the APDs at the expense of higher operating voltages. MSM PDs based on the Schottky barrier [11–13] are another type of VPDs, which possess a smaller capacitance

Due to broad and significant military and civilian applications, research on infrared detection and infrared photodetectors has intensified. In past decades, work on developing the operating temperature and spectral sensitivity capabilities of infrared photodetectors have become significant with the rapid development of photoelectric materials, for example, mercury cadmium telluride (HgCdTe) ternary alloys. Since the first synthesis of HgCdTe materials [14], HgCdTe infrared detectors with variable wavelength response have been manufactured by varying the alloy composition [15]. The amount of cadmium in the alloy can be selected in order to tune the bandgap which in turn determines the optical absorption of the material in the desired infrared range spanning the shortwave infrared to the very long wave infrared. As reported in [16, 17], HgCdTe infrared detectors with low frequency noise and high

A product in the long wavelength spectral region were demonstrated at liquid nitrogen

of PDs is a high saturation current, especially for high power systems.

and lower dark current compared with that of the traditional design.

R0

**2. Vertically-illuminated photodetectors (VPDs)**

116 Advances in Photodetectors - Research and Applications

Although various structures have been proposed and experimentally characterized, the bandwidth-efficiency product of conventional VPDs are limited due to the trade-off between quantum efficiency and bandwidth, which imposes a limit on the speed and sensitivity for photonic applications. For VPDs, increasing the thickness of the PD absorption layer offers the advantages of high quantum efficiency but suffers from a narrow bandwidth. Fortunately, the edge-coupled WGPD has been widely investigated as a promising approach to overcome the bandwidth-efficiency trade-off found in the VPD. The structure of the WGPD permits the bandwidth and efficiency to be specified almost independently because the quantum efficiency is determined by the waveguide length instead of the absorption layer thickness. However, the optical waveguide structure of the WGPD results in a low optical coupling efficiency [38], which is mainly caused by the mode mismatch between waveguide and optical fiber. In practice, efficient coupling is usually enhanced by a mode field converter [39]. Accordingly, depending on the structural configuration, WGPDs can be divided into mushroom-WGPDs and TWPDs.

As reported in [40], a bandwidth of 28 GHz and an efficiency of 25% have been achieved by the first ever high-speed edge-coupled WGPD. In 1991, WGPDs with double-core multimode waveguide structures were proposed to address the coupling problem [41, 42]. The calculated coupling efficiency of the WGPD having such a structure can exceed 80% [43], which is regarded as a breakthrough in WGPDs for practical applications. By combining the structures of the waveguide and photodiode, the waveguide-fed photodiode (WG-fed-PD) is another design innovation to boost the coupling efficiency of the edge-coupled WGPD. Besides, the WG-fed-PD is ideal for implementation in optoelectronic integrated circuits. Previously, 70-GHz and 100-GHz photodetectors based on WG-fed-PD have been reported in [44, 45], respectively. Since WGPDs are categorically lumped devices, their bandwidths are limited by the RC time introduced by the parasitic capacitances and resistances. Kato et al proposed a new structure, which is the so-called the mushroom-WGPD having cladding layers that are wider than the core layer [46]. In such a structure, the capacitance as well as contact resistance can be reduced to obtain a larger bandwidth. In [47], a mushroom-WGPD with a bandwidthefficiency product of 55 GHz was demonstrated. Furthermore, the distributed-element TWPD was proposed to overcome the RC bandwidth limitation of the WGPD. Although the structures of TWPD and WGPD are similar, the electrical properties of these two photodetectors are essentially different. Therefore, the TWPD bandwidth is mainly limited by the mismatch of the optical wave and microwave propagation velocities rather than the RC time delay.

RCE-PDs, the MRPDs are suitable for planar lightwave circuit integration. Various photosensitive devices based on MRPDs were reported in [57–59]. Moreover, the RCE-PDs based on grating were also presented in [60–62]. Due to the advantage of ultimate sensitivity combined with excellent timing accuracy, single-photon detectors, especially the single-photon avalanche diodes (SPADs), are important [63, 64]. As reported in [65, 66], the first RCE-SPAD

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By adopting micro/nanostructures, photon-material interactions can be enhanced to address the trade-off between speed (bandwidth) and efficiency [67, 68]. The low-dimensional structures are able to control light for further interaction with the absorbing materials, excite the lateral propagation mode, and reduce surface reflection. Recently, silicon SPADs incorporating photon-trapping nanostructures were demonstrated [69]. Through diffraction of the vertically incident photons into the horizontal waveguide mode, the photons are trapped in the inverted pyramidal thin-film, and the absorption length is significantly increased to enhance the photon detection efficiency while retaining a low timing jitter. Similarly, a photon-trapping photodiode with micron- and nanoscale holes has demonstrated high-speed/ high-efficiency performance [70], achieving an ultrafast impulse response of 30 ps FWHM (full-width at half-maximum), and a high efficiency of more than 50%. Another alternative technology being exploited to realize light-trapping in thin-film PDs is plasmonic nanostructures [71–74]. Unlike the photon-trapping mechanism enabled by micro/nanoholes, the metallic nanoparticles in plasmonic nanostructures act as sub-wavelength scattering centers, which

With the development of advanced nanofabrication technologies, photodetectors with integrated nanowires, i.e., nanowire PDs, have been realized and studied extensively [75–79]. In particular, several demonstrations of high-speed nanowire PDs were reported. In [80], a photoconductor with intersecting InP nanowires was demonstrated to obtain a pulse response of 14 ps FWHM at 780-nm wavelength irradiation. Compared with using bare core nanowires, higher response was achieved in MSM PDs using Schottky-contacted GaAs/AlGaAs core/ shell nanowires [81]. In [82], nanopillar-based APDs have exhibited a 200-GHz gain band-

This chapter introduces the main types of PD structures including the Schottky and PIN PDs, APDs, MSM PDs, and heterojunction phototransistors. Vertically-illuminated PDs have inherently low bandwidth-efficiency products but have been mitigated by new innovations in QWIP, edge-coupled, RCE and nanostructure, designs. Since the 1990s, RCE and WG PDs have been explored to address the bandwidth-quantum efficiency trade-off. RCE-SPADs have been recently developed for the ultimate in sensitivity while maintaining a low timing jitter.

was fabricated on a reflecting silicon-on-insulator (SOI) substrate.

**5. Micro/nanostructured photodetectors**

allow coupling of the incident light into the semiconductor.

width product at 1060-nm illumination.

**6. Conclusion**

As early as 1990, the design concept of the TWPD was reported by Taylor et al. [48], and a velocity-matched *p*-*i*-*n* TWPD [49] was proposed soon after. Since the first TWPD was experimentally demonstrated in 1994 [50], TWPDs with different configurations have been extensively studied [51, 54]. The photodiode element used in the TWPD can be a *p*-*i*-*n*, MSM diode [52] or avalanche diode. The TWPD structures are configured in various forms, in which the PD is based on the simultaneous operation of optical and electrical waveguides. Additionally, the photodiode elements can be distributed over the length of the waveguides. The so-called periodic TWPD or velocity-matched distributed photodetector (VMDP) is designed based on such a structure, where the optical waveguide is periodically loaded by discrete photodiodes [51, 53].

#### **4. Resonant-cavity-enhanced photodetectors**

As stated earlier, it is possible to mitigate the limited bandwidth-efficiency product in VPDs by means of increasing the length of the optical paths while retaining the thickness of the absorption layer. Thus, the resonant-cavity-enhanced photodetector (RCE-PD) was put forth as an alternative method to solve the trade-off conundrum between efficiency and bandwidth. Since the 1990s, a family of RCE-PDs was proposed, in which the photophysical performance was enhanced by placing the VPD within a Fabry-Perot resonator [55]. Since the photodiode elements incorporated inside the resonator are conventional VPDs, it should be noted that the electrical parameters of the RCE-PD, such as, the bandwidth, and dark and saturation currents, will not be enhanced. Based on microring resonators, Abaeiani et al. presented a new structure called the RCE-WGPD or microring PD (MRPD) [56], taking advantage of both the RCE-PDs and WGPDs. With such a structure, selective wavelength detection as well as a high efficiency-bandwidth product can be achieved. Without the mirrors used in traditional RCE-PDs, the MRPDs are suitable for planar lightwave circuit integration. Various photosensitive devices based on MRPDs were reported in [57–59]. Moreover, the RCE-PDs based on grating were also presented in [60–62]. Due to the advantage of ultimate sensitivity combined with excellent timing accuracy, single-photon detectors, especially the single-photon avalanche diodes (SPADs), are important [63, 64]. As reported in [65, 66], the first RCE-SPAD was fabricated on a reflecting silicon-on-insulator (SOI) substrate.

#### **5. Micro/nanostructured photodetectors**

waveguide structures were proposed to address the coupling problem [41, 42]. The calculated coupling efficiency of the WGPD having such a structure can exceed 80% [43], which is regarded as a breakthrough in WGPDs for practical applications. By combining the structures of the waveguide and photodiode, the waveguide-fed photodiode (WG-fed-PD) is another design innovation to boost the coupling efficiency of the edge-coupled WGPD. Besides, the WG-fed-PD is ideal for implementation in optoelectronic integrated circuits. Previously, 70-GHz and 100-GHz photodetectors based on WG-fed-PD have been reported in [44, 45], respectively. Since WGPDs are categorically lumped devices, their bandwidths are limited by the RC time introduced by the parasitic capacitances and resistances. Kato et al proposed a new structure, which is the so-called the mushroom-WGPD having cladding layers that are wider than the core layer [46]. In such a structure, the capacitance as well as contact resistance can be reduced to obtain a larger bandwidth. In [47], a mushroom-WGPD with a bandwidthefficiency product of 55 GHz was demonstrated. Furthermore, the distributed-element TWPD was proposed to overcome the RC bandwidth limitation of the WGPD. Although the structures of TWPD and WGPD are similar, the electrical properties of these two photodetectors are essentially different. Therefore, the TWPD bandwidth is mainly limited by the mismatch of the optical wave and microwave propagation velocities rather than the RC time delay.

As early as 1990, the design concept of the TWPD was reported by Taylor et al. [48], and a velocity-matched *p*-*i*-*n* TWPD [49] was proposed soon after. Since the first TWPD was experimentally demonstrated in 1994 [50], TWPDs with different configurations have been extensively studied [51, 54]. The photodiode element used in the TWPD can be a *p*-*i*-*n*, MSM diode [52] or avalanche diode. The TWPD structures are configured in various forms, in which the PD is based on the simultaneous operation of optical and electrical waveguides. Additionally, the photodiode elements can be distributed over the length of the waveguides. The so-called periodic TWPD or velocity-matched distributed photodetector (VMDP) is designed based on such a structure, where the optical waveguide is periodically loaded by

As stated earlier, it is possible to mitigate the limited bandwidth-efficiency product in VPDs by means of increasing the length of the optical paths while retaining the thickness of the absorption layer. Thus, the resonant-cavity-enhanced photodetector (RCE-PD) was put forth as an alternative method to solve the trade-off conundrum between efficiency and bandwidth. Since the 1990s, a family of RCE-PDs was proposed, in which the photophysical performance was enhanced by placing the VPD within a Fabry-Perot resonator [55]. Since the photodiode elements incorporated inside the resonator are conventional VPDs, it should be noted that the electrical parameters of the RCE-PD, such as, the bandwidth, and dark and saturation currents, will not be enhanced. Based on microring resonators, Abaeiani et al. presented a new structure called the RCE-WGPD or microring PD (MRPD) [56], taking advantage of both the RCE-PDs and WGPDs. With such a structure, selective wavelength detection as well as a high efficiency-bandwidth product can be achieved. Without the mirrors used in traditional

discrete photodiodes [51, 53].

118 Advances in Photodetectors - Research and Applications

**4. Resonant-cavity-enhanced photodetectors**

By adopting micro/nanostructures, photon-material interactions can be enhanced to address the trade-off between speed (bandwidth) and efficiency [67, 68]. The low-dimensional structures are able to control light for further interaction with the absorbing materials, excite the lateral propagation mode, and reduce surface reflection. Recently, silicon SPADs incorporating photon-trapping nanostructures were demonstrated [69]. Through diffraction of the vertically incident photons into the horizontal waveguide mode, the photons are trapped in the inverted pyramidal thin-film, and the absorption length is significantly increased to enhance the photon detection efficiency while retaining a low timing jitter. Similarly, a photon-trapping photodiode with micron- and nanoscale holes has demonstrated high-speed/ high-efficiency performance [70], achieving an ultrafast impulse response of 30 ps FWHM (full-width at half-maximum), and a high efficiency of more than 50%. Another alternative technology being exploited to realize light-trapping in thin-film PDs is plasmonic nanostructures [71–74]. Unlike the photon-trapping mechanism enabled by micro/nanoholes, the metallic nanoparticles in plasmonic nanostructures act as sub-wavelength scattering centers, which allow coupling of the incident light into the semiconductor.

With the development of advanced nanofabrication technologies, photodetectors with integrated nanowires, i.e., nanowire PDs, have been realized and studied extensively [75–79]. In particular, several demonstrations of high-speed nanowire PDs were reported. In [80], a photoconductor with intersecting InP nanowires was demonstrated to obtain a pulse response of 14 ps FWHM at 780-nm wavelength irradiation. Compared with using bare core nanowires, higher response was achieved in MSM PDs using Schottky-contacted GaAs/AlGaAs core/ shell nanowires [81]. In [82], nanopillar-based APDs have exhibited a 200-GHz gain bandwidth product at 1060-nm illumination.

#### **6. Conclusion**

This chapter introduces the main types of PD structures including the Schottky and PIN PDs, APDs, MSM PDs, and heterojunction phototransistors. Vertically-illuminated PDs have inherently low bandwidth-efficiency products but have been mitigated by new innovations in QWIP, edge-coupled, RCE and nanostructure, designs. Since the 1990s, RCE and WG PDs have been explored to address the bandwidth-quantum efficiency trade-off. RCE-SPADs have been recently developed for the ultimate in sensitivity while maintaining a low timing jitter. CMOS- and lithography-compatible processes have been adopted in the design of SOI-based SPADs. Photons can be diffracted, guided and absorbed in different pixels, especially for tightly-patterned silicon photomultipliers. Nanostructured materials and nanoplasmonics have been exploited for enhanced photon trapping, coupling and absorption in MSM PDs and APDs, for the highest bandwidth-efficiency product.

[9] Wu H, Wu W, Zhang H, Chen Y, Wu Z, Wang G, et al. All AlGaN epitaxial structure solar-blind avalanche photodiodes with high efficiency and high gain. Applied Physics

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### **Author details**

Tianyi Zhou<sup>1</sup> and Kuan W.A. Chee1,2\*

\*Address all correspondence to: kuan.chee@cantab.net

1 Faculty of Electrical Engineering and Computer Science, Ningbo University, Ningbo, Zhejiang, People's Republic of China

2 Laser Research Institute, Shandong Academy of Sciences, Qingdao, Shandong, People's Republic of China

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CMOS- and lithography-compatible processes have been adopted in the design of SOI-based SPADs. Photons can be diffracted, guided and absorbed in different pixels, especially for tightly-patterned silicon photomultipliers. Nanostructured materials and nanoplasmonics have been exploited for enhanced photon trapping, coupling and absorption in MSM PDs

and APDs, for the highest bandwidth-efficiency product.

120 Advances in Photodetectors - Research and Applications

and Kuan W.A. Chee1,2\*

Ningbo, Zhejiang, People's Republic of China

\*Address all correspondence to: kuan.chee@cantab.net

1 Faculty of Electrical Engineering and Computer Science, Ningbo University,

2 Laser Research Institute, Shandong Academy of Sciences, Qingdao, Shandong,

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**Chapter 8**

**Provisional chapter**

**Linear CCD-Based Spectrometry Using Either an ASIC or**

At room temperature, high-responsivity charge-coupled devices (CCD) comprising arrays of several thousand linear photodiodes are readily available. These sensors are capable of ultraviolet to near infrared wavelengths sensing with detecting resolutions of up to 24 dots per millimeter. Their applicability in novel spectrometry applications has been demonstrated. However, the complexity of their timing, image acquisition, and processing necessitates sophisticated peripheral circuitry for viable output. In this chapter, we outline the application specifications for a versatile spectrometer that is reliant on a field programmable gate array (FPGA) automation. The sustained throughput is 1.23 gigabit per second 8-bit color readout rate. This approach is attractive because the final FPGA design may be reconfigured readily to a single, branded, application-specific integrated circuit (ASIC) to drive a wider range of linear CCDs on the market. This is advantageous for rapid development and deployment of the spectrometer instrument. **Keywords:** linear image sensing, FPGA, ASIC, image acquisition, high-speed processing

The proliferation of imaging devices in many applications today is due to the significant technological progress that has occurred over the last few decades in the area of image sensing, particularly with respect to charge-coupled device (CCD) sensors. Today, they are found everywhere from document line-scanned imaging to high-definition planar image acquisition, thereby covering a wide variety of applications. The interest to use CCDs in serious scientific instruments arose from the advances in the area of high-sensitivity, large-area and low-noise CCDs. These CCDs began to routinely provide a high quantum efficiency (QE) figure for each of the millions of pixels, low-noise readout over wide spectral and dynamic

**Linear CCD-Based Spectrometry Using Either an ASIC** 

© 2016 The Author(s). Licensee InTech. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

© 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use,

distribution, and reproduction in any medium, provided the original work is properly cited.

DOI: 10.5772/intechopen.81654

**FPGA Design Methodology**

**or FPGA Design Methodology**

http://dx.doi.org/10.5772/intechopen.81654

Additional information is available at the end of the chapter

Additional information is available at the end of the chapter

Richard Ocaya

Richard Ocaya

**Abstract**

**1. Introduction**

[82] Farrell AC, Senanayake P, Hung CH, El-Howayek G, Rajagopal A, Currie M, et al. Plasmonic field confinement for separate absorption-multiplication in InGaAs nanopillar avalanche photodiodes. Scientific Reports. 2015;**5**:17580

#### **Linear CCD-Based Spectrometry Using Either an ASIC or FPGA Design Methodology Linear CCD-Based Spectrometry Using Either an ASIC or FPGA Design Methodology**

DOI: 10.5772/intechopen.81654

#### Richard Ocaya Richard Ocaya

[81] Gallo EM, Chen G, Currie M, McGuckin T, Prete P, Lovergine N, et al. Picosecond response times in GaAs/AlGaAs core/shell nanowire-based photodetectors. Applied

[82] Farrell AC, Senanayake P, Hung CH, El-Howayek G, Rajagopal A, Currie M, et al. Plasmonic field confinement for separate absorption-multiplication in InGaAs nanopil-

lar avalanche photodiodes. Scientific Reports. 2015;**5**:17580

Physics Letters. 2011;**98**(24):241113

126 Advances in Photodetectors - Research and Applications

Additional information is available at the end of the chapter Additional information is available at the end of the chapter

http://dx.doi.org/10.5772/intechopen.81654

#### **Abstract**

At room temperature, high-responsivity charge-coupled devices (CCD) comprising arrays of several thousand linear photodiodes are readily available. These sensors are capable of ultraviolet to near infrared wavelengths sensing with detecting resolutions of up to 24 dots per millimeter. Their applicability in novel spectrometry applications has been demonstrated. However, the complexity of their timing, image acquisition, and processing necessitates sophisticated peripheral circuitry for viable output. In this chapter, we outline the application specifications for a versatile spectrometer that is reliant on a field programmable gate array (FPGA) automation. The sustained throughput is 1.23 gigabit per second 8-bit color readout rate. This approach is attractive because the final FPGA design may be reconfigured readily to a single, branded, application-specific integrated circuit (ASIC) to drive a wider range of linear CCDs on the market. This is advantageous for rapid development and deployment of the spectrometer instrument.

**Keywords:** linear image sensing, FPGA, ASIC, image acquisition, high-speed processing

#### **1. Introduction**

The proliferation of imaging devices in many applications today is due to the significant technological progress that has occurred over the last few decades in the area of image sensing, particularly with respect to charge-coupled device (CCD) sensors. Today, they are found everywhere from document line-scanned imaging to high-definition planar image acquisition, thereby covering a wide variety of applications. The interest to use CCDs in serious scientific instruments arose from the advances in the area of high-sensitivity, large-area and low-noise CCDs. These CCDs began to routinely provide a high quantum efficiency (QE) figure for each of the millions of pixels, low-noise readout over wide spectral and dynamic

© 2016 The Author(s). Licensee InTech. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. © 2019 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

ranges. One factor that contributed to these advances is that solutions were given to many of the problems associated with defect states of the semiconductor substrates on which the devices were built. Defects lead to low charge transfer efficiencies due to their lossy nature. This made it difficult to fabricate large format image sensors. Various other advancements allowed the reduction of readout noise, thereby improving the photodiode sensitivity even further [1]. Of particular note is the electron multiplication scheme that provided on-chip gain with a net effect that is analogous to the operation of the photomultiplier tube (PMT). The typical CCD imager consists of a coordinated collection of individual photodiodes that can range from a few hundred pixels for computer optical mouse position encoding to high-speed high-definition imaging [2]. For many applications, the CCDs consist of primary color composite arrays that have image resolutions approaching 1200 dots per inch, excellent low-lux sensitivity. In general, devices with high QE and high detection sensitivity over wide wavelengths are fast-approaching performances nearly equal to the traditional photomultiplier tube, with an added bonus of having built-in control electronics that require only correct timing and serially orientated data acquisition [3–7]. The vast number of individual photosensors and serial readout for the typical CCD sensor necessitates a rather complex layout of additional components that are peripheral to the CCD for the purposes of control phasing and the actual data acquisition. CCDs have been successfully applied to many scientific applications, such as the cryogenically cooled CCDs in astronomy applications, in spectroscopy, and in education [8–14]. The operational principle of a CCD is simple in practice, namely that the individual photosensors are synchronously and serially clocked output. This poses formidable implementational challenges due to the complexity of biasing, timing, and control on any CCD device, for a usable intensity output data stream with high bandwidth images. According to the Nyquist sampling theorem, acquisition must therefore proceed at least twice the image bandwidth [15]. In practice, the analog-to-digital converter (ADC) must operate faster than the Nyquist frequency because of the mandatory intermediate processes in the sequence of acquisition, from initialization to acquired image transmission to data terminal equipment (DTE). There are a number of usable approaches to the implementation of the sequences in the image acquisition from a CCD device. The first is the basic microcontrolleror microprocessor-based approach. The second is based on a field programmable gate array (FPGA), and the third is based on an application-specific integrated circuit (ASIC)-based design. The third strategy is based on a custom-designed hardware application, known as an application-specific integrated circuit (ASIC). The ASIC approach offers a competing strategy to FPGA that, despite its generally higher speed and throughput, is likely to better suit larger corporations that have the resources to develop and manufacture specific integrated circuit designs. The needs for mass deployment of an ASIC require justification, such as the range and the volume of the final units required. Where the ASIC is the desired implementation, it is more likely that an FPGA will be used in the developmental stage for design and validation before a custom ASIC can be developed. The cores of such an FPGA-derived ASIC can have provisions for upgrading, such as externally connected dual data rate (DDR) block memories and secure device cards (SD cards) for storage upgrading, user-specifiable display options, USB communications, and other peripheral technological features. Generally, it has become trivial to configure the internal complex logic blocks into a user-defined architecture with optimized memory and execution speed in a manner that is less reliant on additional periph-

Linear CCD-Based Spectrometry Using Either an ASIC or FPGA Design Methodology

http://dx.doi.org/10.5772/intechopen.81654

129

An alternative solid-state imaging technology to the CCD is commonly referred to as active pixel sensors (APSs), which are based on complementary metal oxide semiconductors (CMOSs). The allure of the CMOS transistor is its low form factor (FF) on the semiconductor substrate in comparison with bipolar devices. In fact, advances in CMOS fabrication techniques are largely responsible for the microprocessor revolution because they are more suitable for large-scale integration (LSI). Therefore, APS devices have the primary advantage of having higher pixel densities; hence, these devices have larger pixel arrays and wider photon collection areas. The simplicity of the APS sensing mechanism, which comprises single photodiode and at most three transistors, is vastly reduced in comparison with that of the CCD. A detection element in an APS array essentially follows a randomized access, rowcolumn addressing protocol. The CCD element, on the other hand, relies on a sequential conveyance of charge, leading to a framing approach to image recovery. The general consensus appears to be that CMOS sensors suitable for scientific instrumentation still have much room for improvement with respect to QE, in spite of having higher image access speeds [1, 16, 17]. The low QE figures for APS devices stem from what is referred to as the "fill factor," which is a measure of the actual detection area to the entire area of the APS element. Although slow, CCDs have a high fill-factor and a large full-well capacity which makes them suitable for astrological imaging. The need to improve the QE figure has been the subject of active research and development, which has led to the attainment of CMOS performance at par with CCDs. Furthermore, unlike CMOS arrays, CCD pixels are not amenable to avalanchegain enhancement at a given detection site, frequency/phase lock-in, and do not benefit from local pixel amplifiers to improve the signal-to-noise (SNR) figure. Also, CMOS benefits significantly from time-correlated imaging, global shutter synchronization, photon counting, and 0.1–0.5e- (sub-electron) RMS readout noise levels. The definition of color at pixel level through color filtering by using different p-n junction layers is easier in CMOS. Hybridized devices comprising CCD and CMOS that capitalize on the desirable aspects of each technology are also now being developed [18, 19]. A detailed comparison between CCD and CMOS imagers is beyond our present scope. Holst and Lomheim [20], Janesick et al. [21, 22], and

We begin by discussing the design methodologies that might be considered when designing a spectrometer for scientific applications, such as wavelength resolvable imaging using a linear CCD. Then, a typical FPGA spectrometer design based on an exemplary CCD is described after laying out the rationale for why the FPGA is preferred for the design. The approach taken in this work is to present a proof-of-concept for the overall system functionality rather than as a final implementation. The FPGA is therefore being used merely for design verification with the intention to re-synthesize onto a purely ASIC system. However, it must be noted that the proprietary nature of the Xilinx IP cannot be synthesized without a license onto non-Xilinx ASICs processes from various manufacturers, such as the Taiwan Semiconductor Manufacturing Company (TMSC) or Global foundries. This would then necessitate the design

of equivalent codes for FIFOs and other IPs before implementation using ASICs.

erals and firmware.

others provide a good review of the two alternatives.

optimized memory and execution speed in a manner that is less reliant on additional peripherals and firmware.

ranges. One factor that contributed to these advances is that solutions were given to many of the problems associated with defect states of the semiconductor substrates on which the devices were built. Defects lead to low charge transfer efficiencies due to their lossy nature. This made it difficult to fabricate large format image sensors. Various other advancements allowed the reduction of readout noise, thereby improving the photodiode sensitivity even further [1]. Of particular note is the electron multiplication scheme that provided on-chip gain with a net effect that is analogous to the operation of the photomultiplier tube (PMT). The typical CCD imager consists of a coordinated collection of individual photodiodes that can range from a few hundred pixels for computer optical mouse position encoding to high-speed high-definition imaging [2]. For many applications, the CCDs consist of primary color composite arrays that have image resolutions approaching 1200 dots per inch, excellent low-lux sensitivity. In general, devices with high QE and high detection sensitivity over wide wavelengths are fast-approaching performances nearly equal to the traditional photomultiplier tube, with an added bonus of having built-in control electronics that require only correct timing and serially orientated data acquisition [3–7]. The vast number of individual photosensors and serial readout for the typical CCD sensor necessitates a rather complex layout of additional components that are peripheral to the CCD for the purposes of control phasing and the actual data acquisition. CCDs have been successfully applied to many scientific applications, such as the cryogenically cooled CCDs in astronomy applications, in spectroscopy, and in education [8–14]. The operational principle of a CCD is simple in practice, namely that the individual photosensors are synchronously and serially clocked output. This poses formidable implementational challenges due to the complexity of biasing, timing, and control on any CCD device, for a usable intensity output data stream with high bandwidth images. According to the Nyquist sampling theorem, acquisition must therefore proceed at least twice the image bandwidth [15]. In practice, the analog-to-digital converter (ADC) must operate faster than the Nyquist frequency because of the mandatory intermediate processes in the sequence of acquisition, from initialization to acquired image transmission to data terminal equipment (DTE). There are a number of usable approaches to the implementation of the sequences in the image acquisition from a CCD device. The first is the basic microcontrolleror microprocessor-based approach. The second is based on a field programmable gate array (FPGA), and the third is based on an application-specific integrated circuit (ASIC)-based design. The third strategy is based on a custom-designed hardware application, known as an application-specific integrated circuit (ASIC). The ASIC approach offers a competing strategy to FPGA that, despite its generally higher speed and throughput, is likely to better suit larger corporations that have the resources to develop and manufacture specific integrated circuit designs. The needs for mass deployment of an ASIC require justification, such as the range and the volume of the final units required. Where the ASIC is the desired implementation, it is more likely that an FPGA will be used in the developmental stage for design and validation before a custom ASIC can be developed. The cores of such an FPGA-derived ASIC can have provisions for upgrading, such as externally connected dual data rate (DDR) block memories and secure device cards (SD cards) for storage upgrading, user-specifiable display options, USB communications, and other peripheral technological features. Generally, it has become trivial to configure the internal complex logic blocks into a user-defined architecture with

128 Advances in Photodetectors - Research and Applications

An alternative solid-state imaging technology to the CCD is commonly referred to as active pixel sensors (APSs), which are based on complementary metal oxide semiconductors (CMOSs). The allure of the CMOS transistor is its low form factor (FF) on the semiconductor substrate in comparison with bipolar devices. In fact, advances in CMOS fabrication techniques are largely responsible for the microprocessor revolution because they are more suitable for large-scale integration (LSI). Therefore, APS devices have the primary advantage of having higher pixel densities; hence, these devices have larger pixel arrays and wider photon collection areas. The simplicity of the APS sensing mechanism, which comprises single photodiode and at most three transistors, is vastly reduced in comparison with that of the CCD. A detection element in an APS array essentially follows a randomized access, rowcolumn addressing protocol. The CCD element, on the other hand, relies on a sequential conveyance of charge, leading to a framing approach to image recovery. The general consensus appears to be that CMOS sensors suitable for scientific instrumentation still have much room for improvement with respect to QE, in spite of having higher image access speeds [1, 16, 17]. The low QE figures for APS devices stem from what is referred to as the "fill factor," which is a measure of the actual detection area to the entire area of the APS element. Although slow, CCDs have a high fill-factor and a large full-well capacity which makes them suitable for astrological imaging. The need to improve the QE figure has been the subject of active research and development, which has led to the attainment of CMOS performance at par with CCDs. Furthermore, unlike CMOS arrays, CCD pixels are not amenable to avalanchegain enhancement at a given detection site, frequency/phase lock-in, and do not benefit from local pixel amplifiers to improve the signal-to-noise (SNR) figure. Also, CMOS benefits significantly from time-correlated imaging, global shutter synchronization, photon counting, and 0.1–0.5e- (sub-electron) RMS readout noise levels. The definition of color at pixel level through color filtering by using different p-n junction layers is easier in CMOS. Hybridized devices comprising CCD and CMOS that capitalize on the desirable aspects of each technology are also now being developed [18, 19]. A detailed comparison between CCD and CMOS imagers is beyond our present scope. Holst and Lomheim [20], Janesick et al. [21, 22], and others provide a good review of the two alternatives.

We begin by discussing the design methodologies that might be considered when designing a spectrometer for scientific applications, such as wavelength resolvable imaging using a linear CCD. Then, a typical FPGA spectrometer design based on an exemplary CCD is described after laying out the rationale for why the FPGA is preferred for the design. The approach taken in this work is to present a proof-of-concept for the overall system functionality rather than as a final implementation. The FPGA is therefore being used merely for design verification with the intention to re-synthesize onto a purely ASIC system. However, it must be noted that the proprietary nature of the Xilinx IP cannot be synthesized without a license onto non-Xilinx ASICs processes from various manufacturers, such as the Taiwan Semiconductor Manufacturing Company (TMSC) or Global foundries. This would then necessitate the design of equivalent codes for FIFOs and other IPs before implementation using ASICs.

#### **2. FPGA or ASIC?**

For high-volume productions, the lower unit cost of an ASIC has generally made it attractive in comparison to FPGAs. FPGAs are now widely recognized as using leading edge technologies in order to obtain the same system performance as an ASIC in older technologies; an increasing number of FPGA-based systems are routinely being converted to ASICs. However, the appeal of ASICs transcends the issue of cost alone. ASIC systems generally have significantly much lower power consumption, and this is a bonus in battery-operated mobile devices such as cameras and mobile phones. Also, the hard coding of the logic in an ASIC leads to more secure and reliable systems by making it virtually impossible to reprogram the device. This reliability makes ASICs the obvious choice over FPGAs for critical applications. Over the past two decades, there has been a gradual movement toward the development and application of femtosecond time-resolved spectroscopy (TRS) in many areas of measurement [23–29]. Such imagers are used quite extensively with CCD and CMOS cameras to give high readout rates. Such fast performance places a significant demand on the control system. In TRS, fixed position measurements are correlated at fixed photon transit times. This is largely due to the increasing number of pixels and resolution of these cameras [30–34]. In general, the processing requirements of temporally demanding applications that maintain high sensitivity within a single package tend to transcend the capability of commercially sourced off-the-shelf components. ASICs have amicably risen to the challenge and are finding increasing usage for such applications, particularly because they do away with the need for a dedicated, high-throughput ADC altogether. Thus, these developments mean that printed circuit board level design practices of ADCs are no longer needed. The characterization of the ADC becomes critical in such applications, but ASICs and FPGAs are natively suited for speed optimization during the design phases. High-input bandwidth ADCs with sampling frequencies of over 300 Ms./s that digitize events with femtosecond resolution and low crosstalk are now commonly implemented using ASICs [35–37] as well as FPGAs [38]. Such ASICs are found in critical experiments such as the Large Hadron Collider (LHC) [39], space [1], organic, and biomedical applications [19–27].

#### **2.1. The FPGA design flow**

**Figure 1** depicts the design steps in a typical FPGA-based design process. In general, FPGAs provide reduced design time and bug fixes due to faulted design logic since the logic design step in customary ASIC designs is absent. The verification of deep-submicron placement issues, particularly with respect to performance issues of heat removal and speed, is easily achieved. The prototype designs can be verified virtually instantly during development as many times as necessary by simply downloading the design into the development test bed. The disadvantage is that a given FPGA design relies heavily on the programmer's abilities to write efficient FPGA code. The performance of the design therefore somewhat relies on developer's ability. As with ASICs, there is a clear need to optimize the hardware instance.

increasingly reliant on graphical user interfaces (GUIs), although the very high speed integrated circuit (VHSIC) hardware definition logic (VHDL) is inherently script driven. In ASIC design, postsynthesis analyses of the timing and functional equivalences are the responsibility of the system designer before prototyping. The effects of deep-micron logic element placements need careful appraisal by the designer, unlike in FPGAs where they are routinely part of the design verification step. Designing using FPGAs is therefore associated with fast turnaround.

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**Figure 3** shows the schematic of a typical linear CCD application in which the light focused on the CCD by a lens array is derived from a reflective or transmissive grating after striking

**2.3. A typical FPGA application in CCD-based spectroscopy**

**Figure 1.** Typical FPGA design flow.

#### **2.2. The ASIC design flow**

**Figure 2** depicts the design steps in a typical ASIC-based design process. ASIC tools are generally script driven, unlike FPGAs. In the development process, FPGA system designers are Linear CCD-Based Spectrometry Using Either an ASIC or FPGA Design Methodology http://dx.doi.org/10.5772/intechopen.81654 131

**Figure 1.** Typical FPGA design flow.

**2. FPGA or ASIC?**

130 Advances in Photodetectors - Research and Applications

**2.1. The FPGA design flow**

**2.2. The ASIC design flow**

For high-volume productions, the lower unit cost of an ASIC has generally made it attractive in comparison to FPGAs. FPGAs are now widely recognized as using leading edge technologies in order to obtain the same system performance as an ASIC in older technologies; an increasing number of FPGA-based systems are routinely being converted to ASICs. However, the appeal of ASICs transcends the issue of cost alone. ASIC systems generally have significantly much lower power consumption, and this is a bonus in battery-operated mobile devices such as cameras and mobile phones. Also, the hard coding of the logic in an ASIC leads to more secure and reliable systems by making it virtually impossible to reprogram the device. This reliability makes ASICs the obvious choice over FPGAs for critical applications. Over the past two decades, there has been a gradual movement toward the development and application of femtosecond time-resolved spectroscopy (TRS) in many areas of measurement [23–29]. Such imagers are used quite extensively with CCD and CMOS cameras to give high readout rates. Such fast performance places a significant demand on the control system. In TRS, fixed position measurements are correlated at fixed photon transit times. This is largely due to the increasing number of pixels and resolution of these cameras [30–34]. In general, the processing requirements of temporally demanding applications that maintain high sensitivity within a single package tend to transcend the capability of commercially sourced off-the-shelf components. ASICs have amicably risen to the challenge and are finding increasing usage for such applications, particularly because they do away with the need for a dedicated, high-throughput ADC altogether. Thus, these developments mean that printed circuit board level design practices of ADCs are no longer needed. The characterization of the ADC becomes critical in such applications, but ASICs and FPGAs are natively suited for speed optimization during the design phases. High-input bandwidth ADCs with sampling frequencies of over 300 Ms./s that digitize events with femtosecond resolution and low crosstalk are now commonly implemented using ASICs [35–37] as well as FPGAs [38]. Such ASICs are found in critical experiments such as the Large Hadron Collider (LHC) [39], space [1], organic, and biomedical applications [19–27].

**Figure 1** depicts the design steps in a typical FPGA-based design process. In general, FPGAs provide reduced design time and bug fixes due to faulted design logic since the logic design step in customary ASIC designs is absent. The verification of deep-submicron placement issues, particularly with respect to performance issues of heat removal and speed, is easily achieved. The prototype designs can be verified virtually instantly during development as many times as necessary by simply downloading the design into the development test bed. The disadvantage is that a given FPGA design relies heavily on the programmer's abilities to write efficient FPGA code. The performance of the design therefore somewhat relies on developer's ability. As with ASICs, there is a clear need to optimize the hardware instance.

**Figure 2** depicts the design steps in a typical ASIC-based design process. ASIC tools are generally script driven, unlike FPGAs. In the development process, FPGA system designers are increasingly reliant on graphical user interfaces (GUIs), although the very high speed integrated circuit (VHSIC) hardware definition logic (VHDL) is inherently script driven. In ASIC design, postsynthesis analyses of the timing and functional equivalences are the responsibility of the system designer before prototyping. The effects of deep-micron logic element placements need careful appraisal by the designer, unlike in FPGAs where they are routinely part of the design verification step. Designing using FPGAs is therefore associated with fast turnaround.

#### **2.3. A typical FPGA application in CCD-based spectroscopy**

**Figure 3** shows the schematic of a typical linear CCD application in which the light focused on the CCD by a lens array is derived from a reflective or transmissive grating after striking

**Figure 2.** Typical ASIC design flow.

a carefully positioned sample being characterized [14]. The general elements in the layout are identifiable in other specific implementations. The output of the grating is proportional to wavelength and manifest as angularly dispersed alternating zones of high and low light intensity with a linear resolution in terms of spectral, that is, wavelength spread or range per unit length [2].

**1. Figure 3** shows the general schematic of the image forming optics. A real but inverted image, shown as *x<sup>λ</sup>* ′′ , is required to fall onto the photosensitive areas of the CCD for detection. This image is a magnification of the virtual object *x<sup>λ</sup>* ′ , which is itself the result of net interference of the light source as it passes through the grating. It is easy to show that the spread of wavelength along the total detection array length of the CCD is distance resolved. Thus, assuming that the achromatic reduction lens has image magnification *m*, where generally *m* < 1, then the lengthwise spread of the image along the CCD's photosensors is:

$$\mathbf{x}\_{\lambda}^{\prime} = \mathbf{a}\lambda\_{\prime} \tag{1}$$

Therefore, a bright spot located at the position *x<sup>λ</sup>*

**Figure 3.** Layout of the image-forming arrangement typical in a scientific spectrometer.

(Φ1 and Φ2), and the register shift (RS) signals.

′′

Linear CCD-Based Spectrometry Using Either an ASIC or FPGA Design Methodology

measured at the corresponding photodiode. Hence, a direct readout of the CCD intensity data is possible. By utilizing a standardized light source, the voltage output of the CCD can be calibrated in lux; although this is not necessary in a spectroscopic application where knowing the spectral character and the relative peak intensities is more important than actual intensity, it is normal to express the output count in arbitrary units (au). Therefore, a plot of the CCD sensor output, which is proportional to the incident intensity, versus wavelength suffices for many applications. In our particular case, the CCD output is measured in volts. The CCD output is read out sequentially in step with synchronization pulses. The hardware or software that receives the CCD output should therefore be designed to interpret that the CCD output as being within a well-defined frame. **Figure 4** shows the timing and control signals that are typical in linear CCDs for the detection of three colors. The waveform-labeled OS (serial output) shows the intensity variations relative to the sample and hold (SH), clocking phases

**Figure 4** shows the complexity of the signals required to drive a typical CCD in even the most cursory application, without data acquisition in any form. These signals are derived from an actual CCD, the TCD2557, which henceforth we shall refer to as the exemplary application. The complexity of the additional conditioning circuitry can be appreciated by considering the following scenario. The exemplary CCD has 5415 elements that make up the readout frame, but 5340 actual photosensors. The remaining 75 elements are dummy sensors, 64 presensor blocks and 11 postsensor blocks. The CCD requires dual-phase clock signals (Φ1 and Φ2) which, if run at 1.25 MHz (*τ* = 0.8*s*), define the shortest frame time of 5415*τ* = 4.332 ms. The needs of additional processing cause timing overheads beyond the needs to construct the frame. USB transfers and other processes are nonparallel and consume added real time. Between the three afore-mentioned design strategies that would realize a practical spectrometer that is designed around the exemplary linear CCD, the microcontroller approach is the least efficient for the following reason. If the ADC presumably uses an 8-bit successive-approximation, ADC converter

will be at wavelength *λ* and an intensity

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where *α* = *mL*/*d*.

**Figure 3.** Layout of the image-forming arrangement typical in a scientific spectrometer.

a carefully positioned sample being characterized [14]. The general elements in the layout are identifiable in other specific implementations. The output of the grating is proportional to wavelength and manifest as angularly dispersed alternating zones of high and low light intensity with a linear resolution in terms of spectral, that is, wavelength spread or range per unit length [2].

**1. Figure 3** shows the general schematic of the image forming optics. A real but inverted image,

′

of the light source as it passes through the grating. It is easy to show that the spread of wavelength along the total detection array length of the CCD is distance resolved. Thus, assuming that the achromatic reduction lens has image magnification *m*, where generally

*m* < 1, then the lengthwise spread of the image along the CCD's photosensors is:

, is required to fall onto the photosensitive areas of the CCD for detection. This

, which is itself the result of net interference

′′ = , (1)

shown as *x<sup>λ</sup>*

where *α* = *mL*/*d*.

′′

**Figure 2.** Typical ASIC design flow.

132 Advances in Photodetectors - Research and Applications

image is a magnification of the virtual object *x<sup>λ</sup>*

*x<sup>λ</sup>*

Therefore, a bright spot located at the position *x<sup>λ</sup>* ′′ will be at wavelength *λ* and an intensity measured at the corresponding photodiode. Hence, a direct readout of the CCD intensity data is possible. By utilizing a standardized light source, the voltage output of the CCD can be calibrated in lux; although this is not necessary in a spectroscopic application where knowing the spectral character and the relative peak intensities is more important than actual intensity, it is normal to express the output count in arbitrary units (au). Therefore, a plot of the CCD sensor output, which is proportional to the incident intensity, versus wavelength suffices for many applications. In our particular case, the CCD output is measured in volts. The CCD output is read out sequentially in step with synchronization pulses. The hardware or software that receives the CCD output should therefore be designed to interpret that the CCD output as being within a well-defined frame. **Figure 4** shows the timing and control signals that are typical in linear CCDs for the detection of three colors. The waveform-labeled OS (serial output) shows the intensity variations relative to the sample and hold (SH), clocking phases (Φ1 and Φ2), and the register shift (RS) signals.

**Figure 4** shows the complexity of the signals required to drive a typical CCD in even the most cursory application, without data acquisition in any form. These signals are derived from an actual CCD, the TCD2557, which henceforth we shall refer to as the exemplary application. The complexity of the additional conditioning circuitry can be appreciated by considering the following scenario. The exemplary CCD has 5415 elements that make up the readout frame, but 5340 actual photosensors. The remaining 75 elements are dummy sensors, 64 presensor blocks and 11 postsensor blocks. The CCD requires dual-phase clock signals (Φ1 and Φ2) which, if run at 1.25 MHz (*τ* = 0.8*s*), define the shortest frame time of 5415*τ* = 4.332 ms. The needs of additional processing cause timing overheads beyond the needs to construct the frame. USB transfers and other processes are nonparallel and consume added real time. Between the three afore-mentioned design strategies that would realize a practical spectrometer that is designed around the exemplary linear CCD, the microcontroller approach is the least efficient for the following reason. If the ADC presumably uses an 8-bit successive-approximation, ADC converter

**Figure 4.** Timing diagrams that lead to the generation of CCD output.

availability, the author settled for the Spartan-6 LX9 FPGA device for an actual spectrometer application to drive the TCD2557 CCD [40–43]. The Xilinx software development kit (SDK) allows the organization of the complex logic blocks (CLB) in some of its FPGAs into a powerful, firmware-defined 100-MHz microprocessor referred to as MicroBlaze. With phase-locked loop clock synthesis, MicroBlaze is capable of 400-MHz internal clock speeds. This complex, proprietary engine has all the functionalities of a microprocessor. Furthermore, as with normal microcontrollers, MicroBlaze can be further controlled by a user-defined firmware written in a high-level language such as C/C++. A major advantage of VHDL is that its processes are, by default, parallel and can be made either synchronous or asynchronous. Thus, the generation and handling of the timing and synchronization signals becomes a trivial exercise. **Figure 6** shows the organization of the Spartan-6LX9 to implement the requisite control signals and the

**Figure 6.** FPGA-based CCD block schematic based on a typical Xilinx FPGA, the Spartan-6LX9. The implementation

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The FPGA hardware strategy features a parallel design paradigm that is generally simpler and highly repeatable. The FPGA design thus far is volatile with respect to the power state that is lost when the power to the FPGA is removed. The bitstream file that represents the developed design and defines the application must therefore be stored in an electrically erasable pro-

the intermediate memory is then implemented by defining an 8-kilobyte × 8-bit first-in first-out (FIFO) structure. Using a FIFO buffer allows the readout device to operate at a slower clock rate alongside other parallel processes such as acquisition and USB transfers. In the actual application mentioned above, we have achieved a CCD readout rate of 1.23 gigabit/s per color.

PROM) and reloaded into the FPGA at power on. The role of

connection of the CCD.

grammable read-only memory (E<sup>2</sup>

relies on various intellectual properties (IP) such as MicroBlaze.

**Figure 5.** Block diagram of an FPGA-driven CCD-based spectrometer.

running at 1 MHz (i.e., *τ* = 1*s*), then each photodiode level is converted to at least 28 *τ* = 2.56 ms. It is likely that an associated temporary memory for *M* = 8192 (4192 < (*M* = 5340) < 8192) bytes will be required. The operation of such a memory will be such that at the end of each conversion the memory is written with the ADC result. All photodiodes are then completely digitized in 5340 × 2<sup>8</sup> *τ* ≈ 13.67 s. This time is clearly far too long for a simple 8-bit acquisition. In addition, the firmware-defined timing signals need to be generated and issued to the CCD from the free output lines of the microcontroller, further complicating the design and requiring an extremely fast microcontroller. It is estimated that the operating frequency of such a microcontroller would need to be well in excess of 40 MHz. **Figure 5** shows an FPGA-based spectrometer built around a Xilinx Spartan FPGA. Several specific FPGAs may be used. For reasons of cost and Linear CCD-Based Spectrometry Using Either an ASIC or FPGA Design Methodology http://dx.doi.org/10.5772/intechopen.81654 135

**Figure 6.** FPGA-based CCD block schematic based on a typical Xilinx FPGA, the Spartan-6LX9. The implementation relies on various intellectual properties (IP) such as MicroBlaze.

availability, the author settled for the Spartan-6 LX9 FPGA device for an actual spectrometer application to drive the TCD2557 CCD [40–43]. The Xilinx software development kit (SDK) allows the organization of the complex logic blocks (CLB) in some of its FPGAs into a powerful, firmware-defined 100-MHz microprocessor referred to as MicroBlaze. With phase-locked loop clock synthesis, MicroBlaze is capable of 400-MHz internal clock speeds. This complex, proprietary engine has all the functionalities of a microprocessor. Furthermore, as with normal microcontrollers, MicroBlaze can be further controlled by a user-defined firmware written in a high-level language such as C/C++. A major advantage of VHDL is that its processes are, by default, parallel and can be made either synchronous or asynchronous. Thus, the generation and handling of the timing and synchronization signals becomes a trivial exercise. **Figure 6** shows the organization of the Spartan-6LX9 to implement the requisite control signals and the connection of the CCD.

The FPGA hardware strategy features a parallel design paradigm that is generally simpler and highly repeatable. The FPGA design thus far is volatile with respect to the power state that is lost when the power to the FPGA is removed. The bitstream file that represents the developed design and defines the application must therefore be stored in an electrically erasable programmable read-only memory (E<sup>2</sup> PROM) and reloaded into the FPGA at power on. The role of the intermediate memory is then implemented by defining an 8-kilobyte × 8-bit first-in first-out (FIFO) structure. Using a FIFO buffer allows the readout device to operate at a slower clock rate alongside other parallel processes such as acquisition and USB transfers. In the actual application mentioned above, we have achieved a CCD readout rate of 1.23 gigabit/s per color.

running at 1 MHz (i.e., *τ* = 1*s*), then each photodiode level is converted to at least 28

**Figure 5.** Block diagram of an FPGA-driven CCD-based spectrometer.

**Figure 4.** Timing diagrams that lead to the generation of CCD output.

134 Advances in Photodetectors - Research and Applications

5340 × 2<sup>8</sup>

It is likely that an associated temporary memory for *M* = 8192 (4192 < (*M* = 5340) < 8192) bytes will be required. The operation of such a memory will be such that at the end of each conversion the memory is written with the ADC result. All photodiodes are then completely digitized in

*τ* ≈ 13.67 s. This time is clearly far too long for a simple 8-bit acquisition. In addition, the firmware-defined timing signals need to be generated and issued to the CCD from the free output lines of the microcontroller, further complicating the design and requiring an extremely fast microcontroller. It is estimated that the operating frequency of such a microcontroller would need to be well in excess of 40 MHz. **Figure 5** shows an FPGA-based spectrometer built around a Xilinx Spartan FPGA. Several specific FPGAs may be used. For reasons of cost and

*τ* = 2.56 ms.

approach. In contrast to the FPGA approach, there are on the market dedicated CCD management ASICs, such as those developed by the CCD manufacturers themselves. However, the lead time, specificity to CCD, general complexity, and cost are factors to consider during the design of the application. Many ASICs are heuristic, "black box" solutions to complex image acquisition. Such solutions are, for the low volume designs at least, that ASICs can be notoriously closed, proprietary solutions whose innards and general operations are hard to decipher without knowledge of the intellectual property, or some amount of reverse engineering. Therefore, while an ASIC can deliver a blazingly fast and reliable performance in a given application, it can be beyond the means of a low volume production in terms of development cost and ASIC design. In this work, the necessary CCD control signals are derived from a finite state machine (FSM) that operates concurrently with a MicroBlaze core. Huang et al. have described their Xilinx FPGA implementation of a visualization spectrometer [43]. The FSM also synchronizes the 20 MB/s half-flash ADC with the FIFO. It effectively controls the output sequencing of the CCD output into the FIFO structure through the sample-and-hold (SH) signal, thereby allowing FIFO buffer reads by the DTE at rates that are significantly lower than the ADC conversion rate [37, 44, 45]. Much slower DTE interfaces, such as computer soundcard sampled at 44.1 kHz, can readily digitize the intensity stream using a number of

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The concept of reusable intellectual properties (IP) pioneered by Xilinx in their sixth-generation FPGAs speeds up the design process even further [40]. These are verified, visually presented subunits and instantiation templates that save further development time and effort. The sole requirement of the user is to correctly declare the desired unit and functionality, and then to contextualize the instance of the IP subunit. This approach, which has been employed in our practical instrument with respect to a 100-MHz MicroBlaze core and the FIFO IPs, enhances repeatability and dramatically improves lead-in time. The resulting system is supported by 16 kilobytes of RAM, a general-purpose output register (GPO) of 5-bit width, an 8- and 4-bit general-purpose input (GPI) registers, and communication interfaces consisting of a USB 2.0 port and a universal asynchronous receiver transmitter (UART). The UART is configured for 9600 baud, 8 bits, 1 stop bit, and no parity (9600, 8, N, 1). At present, the system

The implementation of the 8-kilobyte × 8-bit FIFO structure was done requisitioning 18 kilobytes of BRAM and relied on separate clocks for reading and writing to the structure [1]. **Figure 5** shows a diagrammatic depiction of how the FSM [46] scheme was configured to generate the various control and clock signals to drive the CCD and other features in the design. The handshaking and flag-signals handling that are typically associated with FIFO synchronization and flow control by a DTE unit were not used here, for the sake of simplicity and quick realization of a basic spectrometer. The design settled for software flow control instead. Potential data loss can be avoided and the performance maximized by defining a 3-byte threshold that signals a full FIFO buffer. Once detected, the DTE flushes the FIFO. The data transfers to the DTE are

third-party software (**Figure 8**).

*2.4.2. A description of the FIFO IP core*

*2.4.1. Emulating a microcontroller strategy using an IP core*

does not process interrupts pertaining to the image acquisition stages.

**Figure 7.** Actual photographs showing (a) the actual TCD2557 CCD output, (b) the CFL lamp spectrum that generates the output in (a).

**Figure 7** shows the actual oscilloscope output (a) in response to the diffracted spectrum (b) obtained when a source of illumination was directed at the spectrometer.

#### **2.4. The operational principle**

The Spartan-6 MicroBlaze FPGA intellectual property (IP) owned by Xilinx differs from the conventional micro-controller that comes with a fixed architecture and is supported by rigid peripherals in that it permits the arbitrary implementation of high-speed functional blocks from the array of CLBs, clocks, and system management tiles. Their internal structures can be arranged into several virtual, highly parallel microcontrollers and peripherals [41]. The advancements that culminate in MicroBlaze and other IPs are made possible due to the optimization of the logic of these "sixth-generation" FPGAs. The inherent 45-nanometer, copperinterconnected architecture permits devices to be built for speed and low-power consumption. Thus, FPGA-based applications having good cost/power and cost/performance ratios are a reality [42]. There are other FPGAs beside Xilinx made that have well-defined development flow. In the exemplary CCD implementation, we have implemented an efficient system comprising a 2-register, 6-input lookup table (LUT), steering logic, 18 kilobytes of random access memory (RAM), and support for the USB 2.0 standard for communications with the DTE. These features therefore make the FPGA a very good alternative to the microcontroller approach. In contrast to the FPGA approach, there are on the market dedicated CCD management ASICs, such as those developed by the CCD manufacturers themselves. However, the lead time, specificity to CCD, general complexity, and cost are factors to consider during the design of the application. Many ASICs are heuristic, "black box" solutions to complex image acquisition. Such solutions are, for the low volume designs at least, that ASICs can be notoriously closed, proprietary solutions whose innards and general operations are hard to decipher without knowledge of the intellectual property, or some amount of reverse engineering. Therefore, while an ASIC can deliver a blazingly fast and reliable performance in a given application, it can be beyond the means of a low volume production in terms of development cost and ASIC design. In this work, the necessary CCD control signals are derived from a finite state machine (FSM) that operates concurrently with a MicroBlaze core. Huang et al. have described their Xilinx FPGA implementation of a visualization spectrometer [43]. The FSM also synchronizes the 20 MB/s half-flash ADC with the FIFO. It effectively controls the output sequencing of the CCD output into the FIFO structure through the sample-and-hold (SH) signal, thereby allowing FIFO buffer reads by the DTE at rates that are significantly lower than the ADC conversion rate [37, 44, 45]. Much slower DTE interfaces, such as computer soundcard sampled at 44.1 kHz, can readily digitize the intensity stream using a number of third-party software (**Figure 8**).

#### *2.4.1. Emulating a microcontroller strategy using an IP core*

The concept of reusable intellectual properties (IP) pioneered by Xilinx in their sixth-generation FPGAs speeds up the design process even further [40]. These are verified, visually presented subunits and instantiation templates that save further development time and effort. The sole requirement of the user is to correctly declare the desired unit and functionality, and then to contextualize the instance of the IP subunit. This approach, which has been employed in our practical instrument with respect to a 100-MHz MicroBlaze core and the FIFO IPs, enhances repeatability and dramatically improves lead-in time. The resulting system is supported by 16 kilobytes of RAM, a general-purpose output register (GPO) of 5-bit width, an 8- and 4-bit general-purpose input (GPI) registers, and communication interfaces consisting of a USB 2.0 port and a universal asynchronous receiver transmitter (UART). The UART is configured for 9600 baud, 8 bits, 1 stop bit, and no parity (9600, 8, N, 1). At present, the system does not process interrupts pertaining to the image acquisition stages.

#### *2.4.2. A description of the FIFO IP core*

**Figure 7** shows the actual oscilloscope output (a) in response to the diffracted spectrum (b)

**Figure 7.** Actual photographs showing (a) the actual TCD2557 CCD output, (b) the CFL lamp spectrum that generates

The Spartan-6 MicroBlaze FPGA intellectual property (IP) owned by Xilinx differs from the conventional micro-controller that comes with a fixed architecture and is supported by rigid peripherals in that it permits the arbitrary implementation of high-speed functional blocks from the array of CLBs, clocks, and system management tiles. Their internal structures can be arranged into several virtual, highly parallel microcontrollers and peripherals [41]. The advancements that culminate in MicroBlaze and other IPs are made possible due to the optimization of the logic of these "sixth-generation" FPGAs. The inherent 45-nanometer, copperinterconnected architecture permits devices to be built for speed and low-power consumption. Thus, FPGA-based applications having good cost/power and cost/performance ratios are a reality [42]. There are other FPGAs beside Xilinx made that have well-defined development flow. In the exemplary CCD implementation, we have implemented an efficient system comprising a 2-register, 6-input lookup table (LUT), steering logic, 18 kilobytes of random access memory (RAM), and support for the USB 2.0 standard for communications with the DTE. These features therefore make the FPGA a very good alternative to the microcontroller

obtained when a source of illumination was directed at the spectrometer.

**2.4. The operational principle**

136 Advances in Photodetectors - Research and Applications

the output in (a).

The implementation of the 8-kilobyte × 8-bit FIFO structure was done requisitioning 18 kilobytes of BRAM and relied on separate clocks for reading and writing to the structure [1]. **Figure 5** shows a diagrammatic depiction of how the FSM [46] scheme was configured to generate the various control and clock signals to drive the CCD and other features in the design. The handshaking and flag-signals handling that are typically associated with FIFO synchronization and flow control by a DTE unit were not used here, for the sake of simplicity and quick realization of a basic spectrometer. The design settled for software flow control instead. Potential data loss can be avoided and the performance maximized by defining a 3-byte threshold that signals a full FIFO buffer. Once detected, the DTE flushes the FIFO. The data transfers to the DTE are

same pulse transitions. The external control of the FIFO by the DTE occurs through the highlevel, SDK-developed C/C++ that understands the hardware description, right from the initiation of the design. Upon a request by the DTE, the FPGA sends all of its 8-kilobyte contents to the DTE through the available communication channel. After the reception of the image data by the DTE is completed, the software on the host recomposites the intensity data using a suitable parsing algorithm. At this point, all the intensities and pixels are then matched numerically. The interpretation of these data then yields information about the light that falls on the CCD. This light can be due to the secondary scattering by a sample under characterization.

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This chapter presents a sufficiently detailed discussion regarding the pros and cons of three approaches in the design of a linear spectrometer instrument that uses a tricolor, CCD image sensor. The completed instrument is capable of being used for serious scientific measurements. The approaches discussed are with respect to the complex timing and signal conditioning requirements to realize a workable output from the CCD. These approaches are (i) microcontroller based, (ii) ASIC based, and (iii) FPGA based. We then described the essential aspects of the design by outlining the CCD and system control signals, the data acquisition and communication needs of the overall instrument. We suggest that the FPGA design approach leads to a high degree of reliability, repeatability for the task since a high performance, for rapid application development. The embedded intellectual properties found on later generations of Xilinx's FPGAs, most notably the MicroBlaze and FIFO IPs, allow rapid application definition, implementation, and testing on a low-cost FPGA. We have discussed an exemplary 20 Ms./s image acquisition system for a spectrometer instrument that allows both USART and USB 2.0 communications with a normal personal computer. The output data stream, comprising intensity versus wavelength format, can be incorporated directly into postprocessing programs. An equation was derived to show how the alignment and calibration of the spectrometer may be done. An aim of this has been to demystify the complexity of the system by outlining in sufficient detail the physics behind image sensing while presenting the overarching challenges that such sensing presents to the acquisition system. The sensing of wavelength-proportional intelligence with a resolution suitable for serious scientific work clearly generates vast amounts of data, from the sensor frontend up until the final acquisition and storage on the DTE, on a time domain that approaches real time. This naturally raises questions about the best acquisition strategy. We evaluate the pros and cons of the FPGA approach versus the ASIC. For a small-scale development, the FPGA provides a quick route to design completion, whereas the ASIC route may be preferable in larger volume productions. This spectrometer has in fact been deployed in thermoluminescence (TL) measurement, photoluminescence (TL), and line scans. The relative ease with which the FPGA was reconfigured for different, actual CCD displays from different manufacturers aptly demonstrates the versatility of the chosen design approach for once-off or low volume products such as this spectrometer. Characterization of the readout rates using a 400-MHz digital storage oscilloscope (DSO)

on the TCD2557 CCD produced a sustained figure of 1.23 gigabit/s.

**3. Conclusions**

**Figure 8.** Flowchart of the timing, control, synchronization, and DTE communications using an FPGA or FPGA-derived ASIC strategies.

initiated only upon the detection of the FIFO full state. This approach effectively frees up the DTE to other processing tasks during image acquisition. In **Figure 4**, the rising-edge transitions of the shift-pulse (SP), clamp-pulse (CP), and the photodiode cell reset (RS) produce the analog level-shifting action that defines the CCD operation. In this way, intensity level sensed by a photodiode, which is held as a proportional voltage, is shifted into the next photodiode and eventually out of the CCD analogue output, until all photodiode levels have been shifted out of the frame. All three colors, red, green and blue (RGB), are shifted out in parallel output by the same pulse transitions. The external control of the FIFO by the DTE occurs through the highlevel, SDK-developed C/C++ that understands the hardware description, right from the initiation of the design. Upon a request by the DTE, the FPGA sends all of its 8-kilobyte contents to the DTE through the available communication channel. After the reception of the image data by the DTE is completed, the software on the host recomposites the intensity data using a suitable parsing algorithm. At this point, all the intensities and pixels are then matched numerically. The interpretation of these data then yields information about the light that falls on the CCD. This light can be due to the secondary scattering by a sample under characterization.

#### **3. Conclusions**

initiated only upon the detection of the FIFO full state. This approach effectively frees up the DTE to other processing tasks during image acquisition. In **Figure 4**, the rising-edge transitions of the shift-pulse (SP), clamp-pulse (CP), and the photodiode cell reset (RS) produce the analog level-shifting action that defines the CCD operation. In this way, intensity level sensed by a photodiode, which is held as a proportional voltage, is shifted into the next photodiode and eventually out of the CCD analogue output, until all photodiode levels have been shifted out of the frame. All three colors, red, green and blue (RGB), are shifted out in parallel output by the

**Figure 8.** Flowchart of the timing, control, synchronization, and DTE communications using an FPGA or FPGA-derived

ASIC strategies.

138 Advances in Photodetectors - Research and Applications

This chapter presents a sufficiently detailed discussion regarding the pros and cons of three approaches in the design of a linear spectrometer instrument that uses a tricolor, CCD image sensor. The completed instrument is capable of being used for serious scientific measurements. The approaches discussed are with respect to the complex timing and signal conditioning requirements to realize a workable output from the CCD. These approaches are (i) microcontroller based, (ii) ASIC based, and (iii) FPGA based. We then described the essential aspects of the design by outlining the CCD and system control signals, the data acquisition and communication needs of the overall instrument. We suggest that the FPGA design approach leads to a high degree of reliability, repeatability for the task since a high performance, for rapid application development. The embedded intellectual properties found on later generations of Xilinx's FPGAs, most notably the MicroBlaze and FIFO IPs, allow rapid application definition, implementation, and testing on a low-cost FPGA. We have discussed an exemplary 20 Ms./s image acquisition system for a spectrometer instrument that allows both USART and USB 2.0 communications with a normal personal computer. The output data stream, comprising intensity versus wavelength format, can be incorporated directly into postprocessing programs. An equation was derived to show how the alignment and calibration of the spectrometer may be done. An aim of this has been to demystify the complexity of the system by outlining in sufficient detail the physics behind image sensing while presenting the overarching challenges that such sensing presents to the acquisition system. The sensing of wavelength-proportional intelligence with a resolution suitable for serious scientific work clearly generates vast amounts of data, from the sensor frontend up until the final acquisition and storage on the DTE, on a time domain that approaches real time. This naturally raises questions about the best acquisition strategy. We evaluate the pros and cons of the FPGA approach versus the ASIC. For a small-scale development, the FPGA provides a quick route to design completion, whereas the ASIC route may be preferable in larger volume productions. This spectrometer has in fact been deployed in thermoluminescence (TL) measurement, photoluminescence (TL), and line scans. The relative ease with which the FPGA was reconfigured for different, actual CCD displays from different manufacturers aptly demonstrates the versatility of the chosen design approach for once-off or low volume products such as this spectrometer. Characterization of the readout rates using a 400-MHz digital storage oscilloscope (DSO) on the TCD2557 CCD produced a sustained figure of 1.23 gigabit/s.

#### **Author details**

Richard Ocaya Address all correspondence to: ocayaro@ufs.ac.za University of the Free State, Phuthaditjhaba, South Africa

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**Chapter 9**

**Provisional chapter**

**Avalanche Photodiode Focal Plane Arrays and Their**

**Avalanche Photodiode Focal Plane Arrays and Their** 

Focal-plane avalanche photodiodes (APDs) are being more and more widely and deeply studied to satisfy the requirement in weak light and single photon imaging. The progresses of this worldwide study, especially the distinctive researches and achievements in Southwest Institute of Technical Physics and University of Electronic Science and Technology of China are reviewed in this chapter. We successfully fabricated up to 64 × 1 linear-mode Si APD arrays, and 32 × 32–64 × 64 Si single-photon avalanche detector (SPAD) arrays, and applied them in Laser Detection and Ranging (LADAR) platforms like driverless vehicles. Also, we developed 32 × 32–64 × 64 InGaAsP/InP SPAD arrays, and constructed three-dimensional imaging LADAR using them. Together with the progresses of other groups and other materials, we see a prospective future for the

> © 2016 The Author(s). Licensee InTech. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

© 2018 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use,

distribution, and reproduction in any medium, provided the original work is properly cited.

DOI: 10.5772/intechopen.81294

**Application to Laser Detection and Ranging**

**Application to Laser Detection and Ranging**

Additional information is available at the end of the chapter

Additional information is available at the end of the chapter

development and application of focal-plane APDs.

**Keywords:** avalanche photodiode, focus plane, laser detection and ranging

Avalanche photodiodes (APDs) have been widely studied and effectively applied in commercial, military, and academic fields [1] for a few decades. Compared with p-i-n photodiodes, APDs provide higher gain, higher sensitivity and lower detection limit [2], so they are mostly well applied in optical communications [3], imaging [4, 5], and single photon detection [6, 7] in recent years. As all-solid-state optoelectronic devices operating at room-temperature or under thermoelectrically-cooled conditions, APDs are scalable to numerous pixels so that they are taking more and more important roles in focal-plane processing and imaging [8]. Owing to the advantages such as internal photoelectric gain, small size, low driving voltages, high

http://dx.doi.org/10.5772/intechopen.81294

Hai-Zhi Song

Hai-Zhi Song

**Abstract**

**1. Introduction**

#### **Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging**

DOI: 10.5772/intechopen.81294

Hai-Zhi Song Hai-Zhi Song

Additional information is available at the end of the chapter Additional information is available at the end of the chapter

http://dx.doi.org/10.5772/intechopen.81294

#### **Abstract**

Focal-plane avalanche photodiodes (APDs) are being more and more widely and deeply studied to satisfy the requirement in weak light and single photon imaging. The progresses of this worldwide study, especially the distinctive researches and achievements in Southwest Institute of Technical Physics and University of Electronic Science and Technology of China are reviewed in this chapter. We successfully fabricated up to 64 × 1 linear-mode Si APD arrays, and 32 × 32–64 × 64 Si single-photon avalanche detector (SPAD) arrays, and applied them in Laser Detection and Ranging (LADAR) platforms like driverless vehicles. Also, we developed 32 × 32–64 × 64 InGaAsP/InP SPAD arrays, and constructed three-dimensional imaging LADAR using them. Together with the progresses of other groups and other materials, we see a prospective future for the development and application of focal-plane APDs.

**Keywords:** avalanche photodiode, focus plane, laser detection and ranging

#### **1. Introduction**

Avalanche photodiodes (APDs) have been widely studied and effectively applied in commercial, military, and academic fields [1] for a few decades. Compared with p-i-n photodiodes, APDs provide higher gain, higher sensitivity and lower detection limit [2], so they are mostly well applied in optical communications [3], imaging [4, 5], and single photon detection [6, 7] in recent years. As all-solid-state optoelectronic devices operating at room-temperature or under thermoelectrically-cooled conditions, APDs are scalable to numerous pixels so that they are taking more and more important roles in focal-plane processing and imaging [8]. Owing to the advantages such as internal photoelectric gain, small size, low driving voltages, high

© 2016 The Author(s). Licensee InTech. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. © 2018 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

efficiency, and fast response, focal-plane APD arrays bring about new three-dimensional (3D) imaging techniques which provide much wealthier and more accurate information for object recognition and identification [9]. Advanced 3D imaging technologies are strongly required in radar systems including laser detection and ranging (LADAR), so the focal-plane APDs and their LADAR applications were widely and deeply studied in recent years [10–20]. For the purpose of more progress in the future, it is necessary to take an overview on the present research and production of APD arrays. Briefly, the most significant progress is made by MIT Lincoln Laboratory. They developed state-of-the art products of Si and InP/InGaAs Geigermode focal-plane arrays [10], which have been successfully applied in a few LADAR systems. Princeton Lightwave also succeeded in producing focal-plane single photon avalanche detector (SPAD) arrays and commercializing their single-photon camera based on the SPADs [11]. The research and production of other groups [12–14] may also be valuable as references for future developments. In this chapter, we review the research and application of the focalplane APDs in Southwest Institute of Technical Physics and University of Electronic Science and Technology of China [15–20]. It includes linear mode Si APD arrays, Si SPAD arrays and InGaAsP/InP SPAD arrays, which have been applied in LADAR systems.

The design and simulation of an APD device were carried out using a full-band Monte Carlo (MC) device model. For each APD geometry, the MC model incorporates realistic band structures [26, 27]. The basic reach-through APD model with separate layers of absorption, charge and multiplication (SACM) is shown in **Figure 2(a)**. In particular, it is important to know that, in general, electrons can be much more ionized than holes in silicon. Electrons rather than holes should be swept by the electric field into the high field region where the multiplication takes place. Thus, there should be a π-type absorbing region of suitable width for absorbing the incident radiation, and the radiation should be able to enter this region with no loss in any

Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging

http://dx.doi.org/10.5772/intechopen.81294

147

The basic design of a reach-through APD consists of a narrow high-field region where the multiplication takes place, with a much wider low field region in which the incoming radiation is absorbed. As schematically shown in **Figure 2(b)**,an avalanche process occurs as the electric field in a p-n junction is higher than the critical field (*Ecr*) at which impact ionization of carrier starts. The electric field in the p-n junction of a Si APD should be some 2–5 × 10<sup>5</sup> V/cm.

For satisfactory operation of the APD, the high resistivity π-type substrate must be fully depleted by the applied bias voltage. Generally, it works well provided the substrate wafer is not too thick and the required response times are not less than ~10 ns. However, fabrication

**Figure 2.** (a) Schematic cross section (not to scale), and (b) schematic profile of electric field of a typical APD structure.

It should not be more than 106 V/cm at which the Zener effect may take place [28–30].

n+


**Figure 1.** Schematic of the linear-mode Si APD.

#### **2. Linear-mode Si APDs**

The detection of weak light is technically significant in many application fields such as single molecule fluorescence, high-speed quantum cryptography, and infrared detection [21–23]. In all the application fields, APD devices are strongly required to perform photon-counting with high quantum efficiencies, quick optoelectronic response, and low dark counting rates (noise). LADAR imaging systems work in the way of sampling the spatial and/or temporal information of the optical radiation to an array of detectors. Linear-mode (applied bias slightly lower than the breakdown voltage) APDs are often desired by LADAR systems because their deadtime is normally much shorter than that of Geiger-mode (applied bias slightly higher than the breakdown voltage) APDs so that they can measure sequential pulse returns from closely spaced multiple objects. In extreme cases, linear-mode APDs can even detect a few photons or a single photon, which adds an extra dimension to LADAR scene data [21]. Generally, in the near-infrared spectral band, especially at 905 nm, Si APDs might be applied for ultraweak light detection, and can be used in linear-mode at gains up to about 500 or greater [23]. Therefore, linear-mode Si APD arrays were developed and applied in LADAR systems.

#### **2.1. Fabrication of the linear-mode Si APD chips**

A basic linear-mode APD detector, as shown schematically in **Figure 1**, consists of the APD element and the readout integrated circuit (ROIC) [24, 25]. The ROIC is composed of a transimpedance amplifier (TIA), a stabilivolt source circuit and a comparer. The APD element converts incident light signal into primary photo-generated carriers and photocurrent, then amplifies the resulting photocurrent through internal avalanche gain, i.e. the impact ionization. The TIA converts the amplified APD current into a voltage signal, which is proportional to the total multiplied charge delivered by the APD.

The design and simulation of an APD device were carried out using a full-band Monte Carlo (MC) device model. For each APD geometry, the MC model incorporates realistic band structures [26, 27]. The basic reach-through APD model with separate layers of absorption, charge and multiplication (SACM) is shown in **Figure 2(a)**. In particular, it is important to know that, in general, electrons can be much more ionized than holes in silicon. Electrons rather than holes should be swept by the electric field into the high field region where the multiplication takes place. Thus, there should be a π-type absorbing region of suitable width for absorbing the incident radiation, and the radiation should be able to enter this region with no loss in any n+ -type layer.

The basic design of a reach-through APD consists of a narrow high-field region where the multiplication takes place, with a much wider low field region in which the incoming radiation is absorbed. As schematically shown in **Figure 2(b)**,an avalanche process occurs as the electric field in a p-n junction is higher than the critical field (*Ecr*) at which impact ionization of carrier starts. The electric field in the p-n junction of a Si APD should be some 2–5 × 10<sup>5</sup> V/cm. It should not be more than 106 V/cm at which the Zener effect may take place [28–30].

For satisfactory operation of the APD, the high resistivity π-type substrate must be fully depleted by the applied bias voltage. Generally, it works well provided the substrate wafer is not too thick and the required response times are not less than ~10 ns. However, fabrication

**Figure 1.** Schematic of the linear-mode Si APD.

efficiency, and fast response, focal-plane APD arrays bring about new three-dimensional (3D) imaging techniques which provide much wealthier and more accurate information for object recognition and identification [9]. Advanced 3D imaging technologies are strongly required in radar systems including laser detection and ranging (LADAR), so the focal-plane APDs and their LADAR applications were widely and deeply studied in recent years [10–20]. For the purpose of more progress in the future, it is necessary to take an overview on the present research and production of APD arrays. Briefly, the most significant progress is made by MIT Lincoln Laboratory. They developed state-of-the art products of Si and InP/InGaAs Geigermode focal-plane arrays [10], which have been successfully applied in a few LADAR systems. Princeton Lightwave also succeeded in producing focal-plane single photon avalanche detector (SPAD) arrays and commercializing their single-photon camera based on the SPADs [11]. The research and production of other groups [12–14] may also be valuable as references for future developments. In this chapter, we review the research and application of the focalplane APDs in Southwest Institute of Technical Physics and University of Electronic Science and Technology of China [15–20]. It includes linear mode Si APD arrays, Si SPAD arrays and

The detection of weak light is technically significant in many application fields such as single molecule fluorescence, high-speed quantum cryptography, and infrared detection [21–23]. In all the application fields, APD devices are strongly required to perform photon-counting with high quantum efficiencies, quick optoelectronic response, and low dark counting rates (noise). LADAR imaging systems work in the way of sampling the spatial and/or temporal information of the optical radiation to an array of detectors. Linear-mode (applied bias slightly lower than the breakdown voltage) APDs are often desired by LADAR systems because their deadtime is normally much shorter than that of Geiger-mode (applied bias slightly higher than the breakdown voltage) APDs so that they can measure sequential pulse returns from closely spaced multiple objects. In extreme cases, linear-mode APDs can even detect a few photons or a single photon, which adds an extra dimension to LADAR scene data [21]. Generally, in the near-infrared spectral band, especially at 905 nm, Si APDs might be applied for ultraweak light detection, and can be used in linear-mode at gains up to about 500 or greater [23]. Therefore, linear-mode Si APD arrays were developed and applied in LADAR systems.

A basic linear-mode APD detector, as shown schematically in **Figure 1**, consists of the APD element and the readout integrated circuit (ROIC) [24, 25]. The ROIC is composed of a transimpedance amplifier (TIA), a stabilivolt source circuit and a comparer. The APD element converts incident light signal into primary photo-generated carriers and photocurrent, then amplifies the resulting photocurrent through internal avalanche gain, i.e. the impact ionization. The TIA converts the amplified APD current into a voltage signal, which is proportional

InGaAsP/InP SPAD arrays, which have been applied in LADAR systems.

**2. Linear-mode Si APDs**

146 Advances in Photodetectors - Research and Applications

**2.1. Fabrication of the linear-mode Si APD chips**

to the total multiplied charge delivered by the APD.

**Figure 2.** (a) Schematic cross section (not to scale), and (b) schematic profile of electric field of a typical APD structure.

of Si APDs on 6-inch or 8-inch wafers, as is now usually the case, will often mean that the absorption region is thick (~700 μm), operating voltages are high, and response times are slow. These problems can be avoided with the use of an epitaxial version of the design in **Figure 2(a)**. In this approach, a high-resistivity π-type layer is epitaxially grown on the surface of a low resistivity p-type Si substrate. The absorption region (epitaxial layer) may be of any thickness (typically chosen to be in the range of 30–50 μm), and its resistivity is chosen to be low enough so that it does not introduce a significant series resistance. When bias voltage is applied, the depletion layer stops at the interface between the substrate and the epitaxial layer [31–34]. While fast response is a requirement, the narrow active region of this APD is normally the best option.

and M<sup>2</sup>

) and common source amplifier stage (including M<sup>1</sup>

into a voltage signal. The source follower, consisting of M<sup>3</sup>

secondary common-source amplifier is composed of M<sup>3</sup>

two-stage source followers, made up of M<sup>6</sup> + R5

**2.3. Properties of the Si APD array**

bias voltage of the designed SACM Si APD.

parallel negative feedback. The primary photocurrent generated by APD is imported to the source electrode of the cathode-input amplifier. Then the APD's current signal is converted

amplifying signal again. To improve the output drive capability, the output stage contains

Developed at SITP, Si APD arrays were characterized at UESTC. The fabricated devices exhibit high primary photoelectric sensitivity (about 0.5 A/W @905 nm at gain M = 1) and high speed of operation (about 10 ns). **Figure 4** shows an example of typical dependences of the gain on the reverse bias. As the bias arises up to the reach-through voltage *V*rt, it depletes the π-type avalanche region. For the APDs, *Vrt* attains values of 60–70 V, over which not much more regions are depleted. Further increasing the bias voltage mainly leads to higher electric fields in the structure. As the highest electric field reaches the critical value *E*cr, multiplication of carriers starts to occur. More rising in the reverse voltage makes the steady current density go up to in principle infinity, where actually the avalanche breakdown takes place [37–39]. The corresponding volt-

At operating voltage (*V*br × 98%), the multiplication region of a Si APD has an electric field as high as about 3.7 × 105 V/cm and an impact generation rate as high as about 2.8 × 1025 s−<sup>1</sup> cm−<sup>3</sup>

As a result, the avalanche gain (*M*) and the sensibility (*S*) of the linear-mode Si APDs are

**Figure 4.** Dependence of dark current, photocurrent (with/without multiplication) and multiplication gain on reverse

age here is thus named avalanche breakdown voltage *V*br, about 110 V for Si APDs.

observed to be up to about 600 and 300 A/W @905 nm respectively.

and M<sup>7</sup> + M<sup>8</sup>

Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging

and R3

and M<sup>4</sup>

respectively.

and R4

), forming partial current

149

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, is used for isolation. The

.

, which play a part role in

Linear-mode Si APD arrays are fabricated by adopting Si planar manufacturing process on a high-resistivity π-type layer, which is grown epitaxially on the top of a low resistivity p-type Si substrate. The initial material developed is the Si layer 35–40 μm thick, a highly-resistive epitaxial layer on a p+ -type Si <111> substrate.

#### **2.2. Design of the TIA**

As mentioned above, the ROIC chips consist of a voltage-stabilized source and a TIA. The voltage-stabilized source effectively reduces external noise jamming and increases voltage suppression ratio of the power source. Here we have the structure of a new-type regulated cascode circuit configuration which is compatible with the APD chips. The bandwidth, the parallel negative feedback and the trans-impedance gain of the TIA are improved by using regulated cascode circuit [35, 36].

**Figure 3** schematically illustrates the TIA with the regulated cascode circuit configuration. The regulated cascode circuit consists of common gate amplifier input stage (including R<sup>1</sup> , R2

**Figure 3.** The TIA with the regulated cascode circuit configuration.

and M<sup>2</sup> ) and common source amplifier stage (including M<sup>1</sup> and R3 ), forming partial current parallel negative feedback. The primary photocurrent generated by APD is imported to the source electrode of the cathode-input amplifier. Then the APD's current signal is converted into a voltage signal. The source follower, consisting of M<sup>3</sup> and M<sup>4</sup> , is used for isolation. The secondary common-source amplifier is composed of M<sup>3</sup> and R4 , which play a part role in amplifying signal again. To improve the output drive capability, the output stage contains two-stage source followers, made up of M<sup>6</sup> + R5 and M<sup>7</sup> + M<sup>8</sup> respectively.

#### **2.3. Properties of the Si APD array**

**Figure 3.** The TIA with the regulated cascode circuit configuration.

normally the best option.

148 Advances in Photodetectors - Research and Applications

epitaxial layer on a p+

**2.2. Design of the TIA**

regulated cascode circuit [35, 36].

of Si APDs on 6-inch or 8-inch wafers, as is now usually the case, will often mean that the absorption region is thick (~700 μm), operating voltages are high, and response times are slow. These problems can be avoided with the use of an epitaxial version of the design in **Figure 2(a)**. In this approach, a high-resistivity π-type layer is epitaxially grown on the surface of a low resistivity p-type Si substrate. The absorption region (epitaxial layer) may be of any thickness (typically chosen to be in the range of 30–50 μm), and its resistivity is chosen to be low enough so that it does not introduce a significant series resistance. When bias voltage is applied, the depletion layer stops at the interface between the substrate and the epitaxial layer [31–34]. While fast response is a requirement, the narrow active region of this APD is

Linear-mode Si APD arrays are fabricated by adopting Si planar manufacturing process on a high-resistivity π-type layer, which is grown epitaxially on the top of a low resistivity p-type Si substrate. The initial material developed is the Si layer 35–40 μm thick, a highly-resistive

As mentioned above, the ROIC chips consist of a voltage-stabilized source and a TIA. The voltage-stabilized source effectively reduces external noise jamming and increases voltage suppression ratio of the power source. Here we have the structure of a new-type regulated cascode circuit configuration which is compatible with the APD chips. The bandwidth, the parallel negative feedback and the trans-impedance gain of the TIA are improved by using

**Figure 3** schematically illustrates the TIA with the regulated cascode circuit configuration. The regulated cascode circuit consists of common gate amplifier input stage (including R<sup>1</sup>

, R2


Developed at SITP, Si APD arrays were characterized at UESTC. The fabricated devices exhibit high primary photoelectric sensitivity (about 0.5 A/W @905 nm at gain M = 1) and high speed of operation (about 10 ns). **Figure 4** shows an example of typical dependences of the gain on the reverse bias. As the bias arises up to the reach-through voltage *V*rt, it depletes the π-type avalanche region. For the APDs, *Vrt* attains values of 60–70 V, over which not much more regions are depleted. Further increasing the bias voltage mainly leads to higher electric fields in the structure. As the highest electric field reaches the critical value *E*cr, multiplication of carriers starts to occur. More rising in the reverse voltage makes the steady current density go up to in principle infinity, where actually the avalanche breakdown takes place [37–39]. The corresponding voltage here is thus named avalanche breakdown voltage *V*br, about 110 V for Si APDs.

At operating voltage (*V*br × 98%), the multiplication region of a Si APD has an electric field as high as about 3.7 × 105 V/cm and an impact generation rate as high as about 2.8 × 1025 s−<sup>1</sup> cm−<sup>3</sup> . As a result, the avalanche gain (*M*) and the sensibility (*S*) of the linear-mode Si APDs are observed to be up to about 600 and 300 A/W @905 nm respectively.

**Figure 4.** Dependence of dark current, photocurrent (with/without multiplication) and multiplication gain on reverse bias voltage of the designed SACM Si APD.

The ROIC chips were developed on the 0.18-μm CMOS platform of SMIC, Shanghai. The voltage-stabilized source effectively reduces external noise jamming and increases voltage suppression ratio of the power source. TIA shows trans-impedance of 120 dBΩ, the equivalent input noise is about 6 pA/Hz1/2*,* the rise time is 7.3 ns, and the bandwidth is *BW* ≥ 35 MHz.

Arrays of 64 × 1 Si APDs and ROIC chips were integrated to form the photodetector device by performing bonder-leading welding techniques. Together with packaging processing, the devices of 64 × 1 Si APD focal-plane arrays were successfully fabricated, one of which is shown in **Figure 5**. The power of input signal light is 0.9 nW (the duty cycle is 1/1000), and the maximum output voltage amplitude is 1.04 V. The devices present pulse responsivity *R* ≥ 1 × 106 V/W, noise equivalent power *NEP* ≤ 5 pW/Hz1/2, rise time *t <sup>r</sup>* ≤ 3 ns, and inhomogeneity of responsivity of each pixel ≤10%, under 905 nm, 100 ns and 10 kHz of laser irradiation.

#### **2.4. Application of the linear mode Si APD array**

As we constructed linear-mode Si APD focal-plane detectors, the 64 × 1 array devices are tested for possible applications. One example is that, the device is effective in running a driverless platform. Using this APD array, an obstacle-avoidance LADAR, as shown in **Figure 6(a)**, is successful with detection distance of 110 m, distance resolution of 5 cm and angle resolution of 0.5o . This LADAR can effectively detect the obstacles on the way, as shown in **Figure 6(b)**. Compared with traditional technique, in which a single detector was used, the image is much clearer (10 times of pixels) and the imaging speed is much faster (35 versus 15 Hz), so this newly developed obstacle-avoidance LADAR is more accurate and better to be used in driverless vehicles.

**3. Si SPAD focal-plane arrays**

**3.1. Fabrication of Si SPAD array chip**

*3.1.1. Design*

can be greatly decreased.

1014 cm−<sup>3</sup>

A Geiger-mode APD can detect a signal as weak as a single photon. In recent years, it is very active and effective as a single-photon detector and usually termed SPAD. Organized into arrays, SPAD can be used in many systems such as LADAR, mobile laser imaging and viewing instrument. By using some special processing, we developed typical Si-based SPAD

**Figure 6.** (a) An obstacle-avoidance LADAR, using 64 × 1 linear-mode Si APD array as the focal-plane detector, is installed on a driverless vehicle. (b) The imaging effect of the LADAR, where the red pattern shows the existence of obstacles.

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151

According to the requirement of a Si SPAD, there would be a depletion region as thick as 30 μm. Using usual single-sided abrupt p-n junction, to get such a large depletion while remaining avalanche gain, one need to apply a voltage as high as 500 V, which is not real-

in **Figure 7**. The electric field distribution under bias near breakdown is similar to that in **Figure 2(b)**. The light-generated carriers is multiplied in the region with highest electric field, so called multiplication region. This region is very thin compared to the whole depletion region. The other parts in the depletion region can have electric field as weak as possible but sufficient to ensure carrier drifting at the saturated speed. As a result, the operating voltage

There could be two types of host materials. One is high-resistive Si wafer (p-type with

To fabricate the reach-through structure on bulk Si, the whole wafer has to be depleted as the

boron doped), the other is epitaxial lowly-doped p-type Si on a p+


layers, as shown


arrays working at 905 nm. The key techniques are described as follows.

istic enough. We design a reach-through structure, containing n+

**Figure 5.** The device of 64 × 1 linear-mode Si APD focal-plane array.

Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging http://dx.doi.org/10.5772/intechopen.81294 151

**Figure 6.** (a) An obstacle-avoidance LADAR, using 64 × 1 linear-mode Si APD array as the focal-plane detector, is installed on a driverless vehicle. (b) The imaging effect of the LADAR, where the red pattern shows the existence of obstacles.

#### **3. Si SPAD focal-plane arrays**

A Geiger-mode APD can detect a signal as weak as a single photon. In recent years, it is very active and effective as a single-photon detector and usually termed SPAD. Organized into arrays, SPAD can be used in many systems such as LADAR, mobile laser imaging and viewing instrument. By using some special processing, we developed typical Si-based SPAD arrays working at 905 nm. The key techniques are described as follows.

#### **3.1. Fabrication of Si SPAD array chip**

#### *3.1.1. Design*

The ROIC chips were developed on the 0.18-μm CMOS platform of SMIC, Shanghai. The voltage-stabilized source effectively reduces external noise jamming and increases voltage suppression ratio of the power source. TIA shows trans-impedance of 120 dBΩ, the equivalent input noise is about 6 pA/Hz1/2*,* the rise time is 7.3 ns, and the bandwidth is *BW* ≥ 35 MHz.

Arrays of 64 × 1 Si APDs and ROIC chips were integrated to form the photodetector device by performing bonder-leading welding techniques. Together with packaging processing, the devices of 64 × 1 Si APD focal-plane arrays were successfully fabricated, one of which is shown in **Figure 5**. The power of input signal light is 0.9 nW (the duty cycle is 1/1000), and the maximum output voltage amplitude is 1.04 V. The devices present pulse responsivity

neity of responsivity of each pixel ≤10%, under 905 nm, 100 ns and 10 kHz of laser irradiation.

As we constructed linear-mode Si APD focal-plane detectors, the 64 × 1 array devices are tested for possible applications. One example is that, the device is effective in running a driverless platform. Using this APD array, an obstacle-avoidance LADAR, as shown in **Figure 6(a)**, is successful with detection distance of 110 m, distance resolution of 5 cm and angle resolution

. This LADAR can effectively detect the obstacles on the way, as shown in **Figure 6(b)**. Compared with traditional technique, in which a single detector was used, the image is much clearer (10 times of pixels) and the imaging speed is much faster (35 versus 15 Hz), so this newly developed obstacle-avoidance LADAR is more accurate and better to be used in driver-

*<sup>r</sup>* ≤ 3 ns, and inhomoge-

*R* ≥ 1 × 106 V/W, noise equivalent power *NEP* ≤ 5 pW/Hz1/2, rise time *t*

**2.4. Application of the linear mode Si APD array**

150 Advances in Photodetectors - Research and Applications

**Figure 5.** The device of 64 × 1 linear-mode Si APD focal-plane array.

of 0.5o

less vehicles.

According to the requirement of a Si SPAD, there would be a depletion region as thick as 30 μm. Using usual single-sided abrupt p-n junction, to get such a large depletion while remaining avalanche gain, one need to apply a voltage as high as 500 V, which is not realistic enough. We design a reach-through structure, containing n+ -π-p-π-p+ layers, as shown in **Figure 7**. The electric field distribution under bias near breakdown is similar to that in **Figure 2(b)**. The light-generated carriers is multiplied in the region with highest electric field, so called multiplication region. This region is very thin compared to the whole depletion region. The other parts in the depletion region can have electric field as weak as possible but sufficient to ensure carrier drifting at the saturated speed. As a result, the operating voltage can be greatly decreased.

There could be two types of host materials. One is high-resistive Si wafer (p-type with 1014 cm−<sup>3</sup> boron doped), the other is epitaxial lowly-doped p-type Si on a p+ -doped Si wafer. To fabricate the reach-through structure on bulk Si, the whole wafer has to be depleted as the

of the junction edge, to improve the breakdown voltage at the edge of the device. Properly controlling diffusion depth, doping level and ring width, the edge breakdown voltage can be improved to be about 1.5 times that in the avalanche region. As an example, usually, 2–3 μm

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In the avalanche procedure, there come photons at wavelength shorter than 1 μm while creating multiplication carriers. These photons may enter other pixels nearby to generate unintentional count. In order to suppress cross-talk between pixels, design of the SPAD structure is optimized. Further by processing the light-hiding belt and with the aid of decreasing the reflectivity at the interface, the optical cross-talk is well controlled. In the Si SPAD array, there exist big shunt capacitances in between the adjacent pixels, so the electric cross-talk could be of high possibility. This is resolved by decreasing capacitances related to the wires in the later

With a long absorption region (~30 μm), it needs to keep background doping level being lower

sion layer near the surface is a major factor causing device failure. Thus, it is necessary to set

region. Its final role is to suppress the surficial leakage current and to prevent the device from being broken down by a low bias. By calculation and experience, a doping level higher than

By performing the above processes, chips of 32 × 32–64 × 64 Si SPAD arrays are fabricated. One

in the surface layer is sufficient to form the channel-resisting effect.


in order to remain lower electric field in this layer. In the meantime, the inver-


wide guard-ring is suitable for the above purpose.

*3.1.3. Isolation process*

interconnection process.

the inversion layer at the SiO2

sample is shown in **Figure 8**.

**Figure 8.** One chip of Si SPAD array.

than 1014 cm−<sup>3</sup>

a p+

1016 cm−<sup>3</sup>

**Figure 7.** The designed structure of Si SPAD.

device works. To get low breakdown voltage of 150 V or so, we must polish the wafer down to a thickness of 50 μm, which is difficult and brings a lot of unstable features to the devices. Therefore, we use epitaxial wafer as the material for fabricating Si SPAD arrays.

Decreasing the dark count rate (DCR) is conflicting with choosing lower avalanche electric field *E*max and lower operating voltage. There should be tradeoff between these two to get optimized structure parameters. Our previous product has DCR of several 10 kHz with light receiving area of Φ500 μm. Here we try making a device area of Φ50 μm to get much lower DCR. By further well designing and optimizing the internal structure, improving the pixel uniformity and surface passivation effect, we succeeded in controlling the DCR under 10 kHz.

#### *3.1.2. Precise control and uniformity*

Precise control of the device structure is a decisive step. The multiplication layer and charge layer are most important because they greatly influence the key parameters such as quantum efficiency, response time and gain. To precisely control the charge quantity and multiplication length, we adopt the following process. Boron ion-implantation is firstly performed to accurately control the dopant amount. Due to smaller diffusion coefficient of boron in Si, the broadening of boron distribution after thermal treatment is weaker. Then, second epitaxy is carried out to grow n-type layer. This is the way to precisely control the multiplication length.

It is the critical process of a Si SPAD array to make all the pixels controllably consistent in characteristics, e.g. the avalanche gain, the response time, and the breakdown behavior. The pixels uniformity is influenced by four factors: epitaxial structure, ion-implantation of the charge layer, diffusion of the p-n junction, heat-induced doping redistribution in the device process. The most important is that, the epitaxial layers should be grown as uniform as possible. Usually, a 50-μm thick epitaxial layer should have thickness uncertainty of less than 50 nm.

In an SPAD array, one of the critical structures is the guard-ring. The designed SPAD structure shows that, the n+ contact and light-incident layer is so small that the p-n junction depth is about 0.5 μm. In order to prevent the device from being lowly broken down, a guard-ring around the device can be fabricated by doping at the edge of the n+ -doped area. It uses more deeply diffused n-doping (Phosphorus has big diffusion coefficient in silicon) to decrease the curvature rate of the edge of the p-n junction with the π-region, to reduce the electric-field of the junction edge, to improve the breakdown voltage at the edge of the device. Properly controlling diffusion depth, doping level and ring width, the edge breakdown voltage can be improved to be about 1.5 times that in the avalanche region. As an example, usually, 2–3 μm wide guard-ring is suitable for the above purpose.

#### *3.1.3. Isolation process*

device works. To get low breakdown voltage of 150 V or so, we must polish the wafer down to a thickness of 50 μm, which is difficult and brings a lot of unstable features to the devices.

Decreasing the dark count rate (DCR) is conflicting with choosing lower avalanche electric field *E*max and lower operating voltage. There should be tradeoff between these two to get optimized structure parameters. Our previous product has DCR of several 10 kHz with light receiving area of Φ500 μm. Here we try making a device area of Φ50 μm to get much lower DCR. By further well designing and optimizing the internal structure, improving the pixel uniformity and surface passivation effect, we succeeded in controlling the DCR under 10 kHz.

Precise control of the device structure is a decisive step. The multiplication layer and charge layer are most important because they greatly influence the key parameters such as quantum efficiency, response time and gain. To precisely control the charge quantity and multiplication length, we adopt the following process. Boron ion-implantation is firstly performed to accurately control the dopant amount. Due to smaller diffusion coefficient of boron in Si, the broadening of boron distribution after thermal treatment is weaker. Then, second epitaxy is carried out to grow n-type layer. This is the way to precisely control the multiplication length. It is the critical process of a Si SPAD array to make all the pixels controllably consistent in characteristics, e.g. the avalanche gain, the response time, and the breakdown behavior. The pixels uniformity is influenced by four factors: epitaxial structure, ion-implantation of the charge layer, diffusion of the p-n junction, heat-induced doping redistribution in the device process. The most important is that, the epitaxial layers should be grown as uniform as possible. Usually, a 50-μm thick epitaxial layer should have thickness uncertainty of less than 50 nm. In an SPAD array, one of the critical structures is the guard-ring. The designed SPAD struc-

is about 0.5 μm. In order to prevent the device from being lowly broken down, a guard-ring

deeply diffused n-doping (Phosphorus has big diffusion coefficient in silicon) to decrease the curvature rate of the edge of the p-n junction with the π-region, to reduce the electric-field

around the device can be fabricated by doping at the edge of the n+

contact and light-incident layer is so small that the p-n junction depth


Therefore, we use epitaxial wafer as the material for fabricating Si SPAD arrays.

*3.1.2. Precise control and uniformity*

**Figure 7.** The designed structure of Si SPAD.

152 Advances in Photodetectors - Research and Applications

ture shows that, the n+

In the avalanche procedure, there come photons at wavelength shorter than 1 μm while creating multiplication carriers. These photons may enter other pixels nearby to generate unintentional count. In order to suppress cross-talk between pixels, design of the SPAD structure is optimized. Further by processing the light-hiding belt and with the aid of decreasing the reflectivity at the interface, the optical cross-talk is well controlled. In the Si SPAD array, there exist big shunt capacitances in between the adjacent pixels, so the electric cross-talk could be of high possibility. This is resolved by decreasing capacitances related to the wires in the later interconnection process.

With a long absorption region (~30 μm), it needs to keep background doping level being lower than 1014 cm−<sup>3</sup> in order to remain lower electric field in this layer. In the meantime, the inversion layer near the surface is a major factor causing device failure. Thus, it is necessary to set a p+ -doped area around the surficial active region, i.e. the channel-resisting region. It can cut the inversion layer at the SiO2 -p-Si interface and stop the surficial expansion of the depletion region. Its final role is to suppress the surficial leakage current and to prevent the device from being broken down by a low bias. By calculation and experience, a doping level higher than 1016 cm−<sup>3</sup> in the surface layer is sufficient to form the channel-resisting effect.

By performing the above processes, chips of 32 × 32–64 × 64 Si SPAD arrays are fabricated. One sample is shown in **Figure 8**.

**Figure 8.** One chip of Si SPAD array.

#### **3.2. ROIC optimization**

To realize highly accurate timing of the photon arrival, we use a time-digit-conversion (TDC) circuit with the aid of phase-shifting technique. This approach satisfies the requirements of 2 ns in the time resolution and 20 kHz in frame frequency while decreasing the power consumption of the whole chip. An active-quenching design is used to reach an extinction time of less than 50 ns.

between start and stop is converted into a 12-bit digital signal. When the counter output clock is effective, its locked state is transferred bit by bit into a 12-digit register. Controlled by a 25 MHz clock, the register transfers its digits into the register of the neighboring pixel. This

Avalanche-quenching circuit is another important aspect in SPAD array. To realize a dead-time less than 50 ns, we design actively-quenching circuit as shown in **Figure 10**. When avalanche photocurrent is detected, the voltage at point a jumps down and forces the quenching circuit run. After a while, the voltage at point b comes higher, switching on the transistor M1 via the feedback branch, and quickly pulling down the voltage at point Vapd to make the APD bias lower than breakdown voltage (quenching the APD). After more a while, the charge–discharge circuit gradually decreases the voltage at point b, M1 is turned off via feedback circuit, and Vdd

The above designs are realized by performing CMOS processing, and thus the ROIC chips

The next key processing is interconnecting the SPAD chip and the ROIC chip. The fabrication is as follows. After some degree of thinning processing, the backside of the wafer is treated to have a light-incident window for every pixel. As shown in **Figure 11**, the window area is formed by etching off the p-type substrate, and the layer under the etched window is made to

sidewalls. In addition, the uniformity of this processing must remain ≤ ±2% in the window depth and ≤ ±0.5 μm in the window diameter. Then, it is realized that negligible light is absorbed by the p-type substrate. Using standard Indium-shot interconnection processing, the SPAD chip is connected exactly with the ROIC, as shown in **Figure 11**. Integrating the interconnected chip with TEC cooling cells, and packing these all into a vacuum can, a Si

and parasitic capacitances to restore the Geiger mode.

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ICP is used to fabricate windows with straight

serial transform mode gives at last a frame frequency of 25 kHz.

charges the APD through R0

**3.3. Interconnection and package**

be ~35 μm thick. Dry etching such as SF6 + O2

SPAD focal-plane device is developed.

**Figure 10.** Structure of the quenching circuit for Si SPAD array.

are produced.

High precision timing and time-reading circuit is composed of TDC and memory readout unit, as shown in **Figure 9**. After gate/signal conversion circuit transforms the high voltage output of SPAD into low voltage signal, it firstly needs to read the photon flying time of every pixel through TDC, to change times into digits, and to read out the digits through the memory readout circuit. For the purpose of 2 ns of time resolution, highly frequent, highly stable main clock is supplied to the 12-digits counter. Frequency more than 500 MHz is not easy to be realized at every pixel at the same time. Due to the processing limit, shunt resistors and capacitors may significantly contribute to the power consumption (To an 32 × 32 array, the power consumed in clock lines would be 100 mW). Without using phase-locking loop (PLL), here we design TDC circuit with the aid of phase-shifting technique, to satisfy the requirement of high time resolution while decreasing the requirement for clock frequency. The TDC consists of counter and time-delay chain. When the external timing signal (a rising edge) comes, the counter starts to work; when a photon is detected, the circuit generates a signal to stop the counter and remain the present count data. Via the time-delay chain composed of 8 units, the external clock creates 8 clock signals with different phases. As the starting signal comes, every clock signal is sampled and the time-delay chain outputs an 8-digit signal, which will be coded and saved into the data process module. A similar process happens when a stop signal comes. Difference calculation between the start and stop data gives a 4-digit signal, constructing a 12-digit information together with the data from the counter. Then, the time interval

**Figure 9.** Structure of the high precision time-digit conversion circuit designed for Si SPAD array.

between start and stop is converted into a 12-bit digital signal. When the counter output clock is effective, its locked state is transferred bit by bit into a 12-digit register. Controlled by a 25 MHz clock, the register transfers its digits into the register of the neighboring pixel. This serial transform mode gives at last a frame frequency of 25 kHz.

Avalanche-quenching circuit is another important aspect in SPAD array. To realize a dead-time less than 50 ns, we design actively-quenching circuit as shown in **Figure 10**. When avalanche photocurrent is detected, the voltage at point a jumps down and forces the quenching circuit run. After a while, the voltage at point b comes higher, switching on the transistor M1 via the feedback branch, and quickly pulling down the voltage at point Vapd to make the APD bias lower than breakdown voltage (quenching the APD). After more a while, the charge–discharge circuit gradually decreases the voltage at point b, M1 is turned off via feedback circuit, and Vdd charges the APD through R0 and parasitic capacitances to restore the Geiger mode.

The above designs are realized by performing CMOS processing, and thus the ROIC chips are produced.

#### **3.3. Interconnection and package**

**3.2. ROIC optimization**

154 Advances in Photodetectors - Research and Applications

of less than 50 ns.

To realize highly accurate timing of the photon arrival, we use a time-digit-conversion (TDC) circuit with the aid of phase-shifting technique. This approach satisfies the requirements of 2 ns in the time resolution and 20 kHz in frame frequency while decreasing the power consumption of the whole chip. An active-quenching design is used to reach an extinction time

High precision timing and time-reading circuit is composed of TDC and memory readout unit, as shown in **Figure 9**. After gate/signal conversion circuit transforms the high voltage output of SPAD into low voltage signal, it firstly needs to read the photon flying time of every pixel through TDC, to change times into digits, and to read out the digits through the memory readout circuit. For the purpose of 2 ns of time resolution, highly frequent, highly stable main clock is supplied to the 12-digits counter. Frequency more than 500 MHz is not easy to be realized at every pixel at the same time. Due to the processing limit, shunt resistors and capacitors may significantly contribute to the power consumption (To an 32 × 32 array, the power consumed in clock lines would be 100 mW). Without using phase-locking loop (PLL), here we design TDC circuit with the aid of phase-shifting technique, to satisfy the requirement of high time resolution while decreasing the requirement for clock frequency. The TDC consists of counter and time-delay chain. When the external timing signal (a rising edge) comes, the counter starts to work; when a photon is detected, the circuit generates a signal to stop the counter and remain the present count data. Via the time-delay chain composed of 8 units, the external clock creates 8 clock signals with different phases. As the starting signal comes, every clock signal is sampled and the time-delay chain outputs an 8-digit signal, which will be coded and saved into the data process module. A similar process happens when a stop signal comes. Difference calculation between the start and stop data gives a 4-digit signal, constructing a 12-digit information together with the data from the counter. Then, the time interval

**Figure 9.** Structure of the high precision time-digit conversion circuit designed for Si SPAD array.

The next key processing is interconnecting the SPAD chip and the ROIC chip. The fabrication is as follows. After some degree of thinning processing, the backside of the wafer is treated to have a light-incident window for every pixel. As shown in **Figure 11**, the window area is formed by etching off the p-type substrate, and the layer under the etched window is made to be ~35 μm thick. Dry etching such as SF6 + O2 ICP is used to fabricate windows with straight sidewalls. In addition, the uniformity of this processing must remain ≤ ±2% in the window depth and ≤ ±0.5 μm in the window diameter. Then, it is realized that negligible light is absorbed by the p-type substrate. Using standard Indium-shot interconnection processing, the SPAD chip is connected exactly with the ROIC, as shown in **Figure 11**. Integrating the interconnected chip with TEC cooling cells, and packing these all into a vacuum can, a Si SPAD focal-plane device is developed.

**Figure 10.** Structure of the quenching circuit for Si SPAD array.

necessary control accuracies in a few significant structure parameters, which are required for nice device homogeneity. Accordingly, we fabricate InGaAsP/InP SPAD focal-plane arrays

Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging

An InGaAsP/InP APD structure is designed as an example SPAD object. It is of a heterostructure comprising SACM layers, as can be seen schematically in **Figure 12(a)**. By using conventional APD theory [28, 47] and lately advanced approaches [48–50], citing material parameters from previous reports [49, 51, 52], and neglecting the dead-space effect [53], the

**Figure 12(b)** illustrates the calculated current–voltage (*I*-*V*) characteristics in dark. Here

current. The simulated DCR *r*d versus PDE *η* is shown in **Figure 12(c)**. Both of them are

excess bias *V*ex0 = 5 V, *r*d is found below 10 kHz and *η* appears some 0.50. It suggests that 5 V of *V*ex is an optimal operating condition at 230 K, so *V*ex = 5 V will be the reference point

thousands of pixels [44]. Provided structure fluctuations exist among the numerous pixels, the

**Figure 12.** (a) The structure diagram of a designed InGaAsP/InP Geiger-mode APD (or SPAD) studied in this work; (b) calculated *I*-*V* relationship in dark and (c) calculated DCR versus PDE for the InGaAsP/InP SPAD device at 230 K.

is principally the applied reverse bias *V* at infinite avalanche

. As the SPAD is running under a middle

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157

generally applied to more than

and demonstrate their applications.

the breakdown voltage *V*<sup>b</sup>

in this study.

**4.1. SPAD array homogeneity versus material controllability**

device characteristics of this structure was calculated.

dependent on the applied excess bias *V*ex = *V* − *V*<sup>b</sup>

As a SPAD array is used, there is usually a common bias *V*<sup>0</sup>

**Figure 11.** Schematic of the interconnection process for fabricating Si SPAD arrays.

#### **3.4. Application of Si SPAD focal-plane arrays**

Measurements show that the developed SPAD array have DCR lower than 5 kHz, average photon detection efficiency (PDE) ~25%, time resolution <1 ns, and frame speed ~25 kHz. The 32 × 32 SPAD array exhibits pixel uniformity < ±5% (e.g. in counting rate). It can thus be applied in a practical imaging system. The above fabricated SPAD array device is installed in a LADAR 3D imaging instrument. The instrument can three-dimensionally detect and recognize multi-hided objects in forests and mountains, and be of small size, light weight, high resolution and rapid imaging.

#### **4. InGaAsP/InP SPAD focal-plane arrays**

Like InGaAs/InP SPADs [40], InGaAsP/InP SPADs are also extensively studied and practically explored for their utility in many fields including single photon imaging [41] and quantum information processing [42, 43] in the near-infrared wavelength range. Thanks to the advanced epitaxial techniques, this kind of SPADs has been well developed and applied in, e.g., LADAR in recent years [41, 44]. Nevertheless, many critical problems are still open to be resolved. One of them is the device homogeneity, such as the reproducibility and uniformity of the SPAD performance [45], which are strongly required to be precisely controlled by refining the structure parameters in epitaxial growing and device processing. One can, of course, estimate the effects of some individual physical parameters on the performance homogeneity using some analytical method [46], but it is not easy to obtain the knowledge of many parameters at the same time. It is even unlikely to make clear the collective influence of multiple parameters and to quantitatively take a balance between various parameters. The quantitative association between the device inhomogeneity and structure uncertainty should thus be necessarily established. Therefore, we firstly carry out a statistical analysis on InGaAsP/ InP SPAD characteristics by randomizing the structure parameters, and then figure out the necessary control accuracies in a few significant structure parameters, which are required for nice device homogeneity. Accordingly, we fabricate InGaAsP/InP SPAD focal-plane arrays and demonstrate their applications.

#### **4.1. SPAD array homogeneity versus material controllability**

**3.4. Application of Si SPAD focal-plane arrays**

156 Advances in Photodetectors - Research and Applications

**Figure 11.** Schematic of the interconnection process for fabricating Si SPAD arrays.

**4. InGaAsP/InP SPAD focal-plane arrays**

resolution and rapid imaging.

Measurements show that the developed SPAD array have DCR lower than 5 kHz, average photon detection efficiency (PDE) ~25%, time resolution <1 ns, and frame speed ~25 kHz. The 32 × 32 SPAD array exhibits pixel uniformity < ±5% (e.g. in counting rate). It can thus be applied in a practical imaging system. The above fabricated SPAD array device is installed in a LADAR 3D imaging instrument. The instrument can three-dimensionally detect and recognize multi-hided objects in forests and mountains, and be of small size, light weight, high

Like InGaAs/InP SPADs [40], InGaAsP/InP SPADs are also extensively studied and practically explored for their utility in many fields including single photon imaging [41] and quantum information processing [42, 43] in the near-infrared wavelength range. Thanks to the advanced epitaxial techniques, this kind of SPADs has been well developed and applied in, e.g., LADAR in recent years [41, 44]. Nevertheless, many critical problems are still open to be resolved. One of them is the device homogeneity, such as the reproducibility and uniformity of the SPAD performance [45], which are strongly required to be precisely controlled by refining the structure parameters in epitaxial growing and device processing. One can, of course, estimate the effects of some individual physical parameters on the performance homogeneity using some analytical method [46], but it is not easy to obtain the knowledge of many parameters at the same time. It is even unlikely to make clear the collective influence of multiple parameters and to quantitatively take a balance between various parameters. The quantitative association between the device inhomogeneity and structure uncertainty should thus be necessarily established. Therefore, we firstly carry out a statistical analysis on InGaAsP/ InP SPAD characteristics by randomizing the structure parameters, and then figure out the An InGaAsP/InP APD structure is designed as an example SPAD object. It is of a heterostructure comprising SACM layers, as can be seen schematically in **Figure 12(a)**. By using conventional APD theory [28, 47] and lately advanced approaches [48–50], citing material parameters from previous reports [49, 51, 52], and neglecting the dead-space effect [53], the device characteristics of this structure was calculated.

**Figure 12(b)** illustrates the calculated current–voltage (*I*-*V*) characteristics in dark. Here the breakdown voltage *V*<sup>b</sup> is principally the applied reverse bias *V* at infinite avalanche current. The simulated DCR *r*d versus PDE *η* is shown in **Figure 12(c)**. Both of them are dependent on the applied excess bias *V*ex = *V* − *V*<sup>b</sup> . As the SPAD is running under a middle excess bias *V*ex0 = 5 V, *r*d is found below 10 kHz and *η* appears some 0.50. It suggests that 5 V of *V*ex is an optimal operating condition at 230 K, so *V*ex = 5 V will be the reference point in this study.

As a SPAD array is used, there is usually a common bias *V*<sup>0</sup> generally applied to more than thousands of pixels [44]. Provided structure fluctuations exist among the numerous pixels, the

**Figure 12.** (a) The structure diagram of a designed InGaAsP/InP Geiger-mode APD (or SPAD) studied in this work; (b) calculated *I*-*V* relationship in dark and (c) calculated DCR versus PDE for the InGaAsP/InP SPAD device at 230 K.

effective *V*ex will vary from this to that pixel so that device performance exhibits inhomogeneity. To clarify this effect, we first set any structure parameter *t* randomly changing in a way as

$$t\_i = t\_0(1 + \mathcal{W}\,\sigma\_i). \tag{1}$$

The reason why the DCR fluctuation is much larger than PDE is that DCR depends almost

Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging

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159

In realistic epitaxial growth, controlling the thickness or the doping level may usually have a common precision in different layers, although a non-dope layer would have worse carrier density fluctuation than the intentionally doped regions. The following thus shows a way more effective to investigate the uncertainty correlation between the epitaxy growth and the device performance. Let us study the device characteristics varying with common fluctuation width *W*nd of the residual carrier densities in the absorption layer and the

**Figure 13.** (a) Simulated distribution FWHM of the excess bias *V*ex dependent of the number of simultaneously varying parameters; distribution histograms of (b) *V*ex, (c) DCR and (d) PDE brought about by six simultaneously varying

and of the multiplication region *n*m and *t*m, respectively. The dashed lines on the histograms indicate the fitted results to

and *t*<sup>a</sup>

, of the charge layer *n*<sup>c</sup>

 and *t*<sup>c</sup> ,

parameters including the doping level and the width of the absorption region *n*<sup>a</sup>

normal distributions.

exponentially on *V*ex and PDE, as **Figure 12(c)** shows.

where the subscription *i* = 1, 2, 3 is the calculation sequence number in a series of simulations, *t* i is the *i*th value of parameter *t*, *t* 0 is the designed value of *t*, *W* is the fluctuation degree of *t* relative to *t* 0 , and *σ<sup>i</sup>* is the *i*th value of the random variable *σ*, distributed in a normal mode with full width at half maximum (FWHM) of unity. Similarly we can set

$$
\begin{aligned}
\langle \mathbf{u}\_{\text{el}} \rangle &= \langle \mathbf{u}\_{\text{el}} \rangle \langle \mathbf{u}\_{\text{el}} \rangle = \langle \mathbf{u}\_{\text{el}} \rangle \langle \mathbf{u}\_{\text{el}} \rangle = \langle \mathbf{u}\_{\text{el}} \rangle \langle \mathbf{u}\_{\text{el}} \rangle \\
\langle \mathbf{u}\_{\text{el}} \rangle &= \langle \mathbf{u}\_{\text{el}} \rangle \langle \mathbf{1} + \mathcal{W}\_{\text{nc}} \sigma\_{\text{nc}} \rangle\_{\text{\prime}} \\
\mathbf{t}\_{\text{ml}} &= \mathbf{t}\_{\text{mol}} \langle \mathbf{1} + \mathcal{W}\_{\text{tm}} \sigma\_{\text{tm}} \rangle\_{\text{\prime}}
\end{aligned}
\tag{2}
$$

and so forth, where *n*c*<sup>i</sup>* (*t*m*<sup>i</sup>* ) is the *i*th value of charge density *n*<sup>c</sup> (multiplication width *t* m), *n*c0(*t*m0) is the designed value of *n*<sup>c</sup> (*t*m), *W*nc(*W*tm) is the relative FWHM of *n*<sup>c</sup> (*t*m) with respect to *n*c0(*t*m0), and *σ*nc*<sup>i</sup>* (*σ*tm*<sup>i</sup>* ) is the *i*th value of *σ* for changing *n*<sup>c</sup> (*t*m). All the variables are defined in a similar way to the above. The structure parameters are changing independently because each has its own FWHM and *σ* values. With a set of structure parameters (*n*c*<sup>i</sup>* , *t*m*<sup>i</sup>* ,...), one set of device performance data is calculated. With thousand sets of device performance data, distributions of *V*<sup>b</sup> , *V*ex, *r*d, and *η* are obtained through statistics, and then the correlation between the performance fluctuations and device structures is figured out.

Our simulations show that *n*<sup>c</sup> , *t*m and *t*<sup>c</sup> (charge layer thickness) have strong effects, while absorption layer doping level *n*<sup>a</sup> , thickness *t*<sup>a</sup> and multiplication layer doping level *n*m have weak effects on *V*ex. The strong *t*m effect can be easily understood since the width of the multiplication region is crucial to determine the characteristics of a SPAD [48, 54]. It means that the charge quantity should be controlled most precisely in design and epitaxy process. In addition, we see that every single structure parameter leads to *V*ex fluctuation in a linear manner.

Extending the above simulation to more structure parameters, the homogeneity of device performance can be obtained in terms of varying parameter numbers. The result of *V*ex is displayed in **Figure 13(a)**, where a sublinear change of *V*ex fluctuation is seen to happen with increasing parameter number. Taking all of the six parameters into account, we get that *V*ex varies with a FWHM of 24%, far less than a simple summation of the effects of individual parameters. The *V*ex distribution arisen by six independently varying parameters is demonstrated in **Figure 13(b)**. With the referred excess bias *V*ex0 = 5 V, the practical value of *V*ex varies mainly in the range of 4.4–5.6 V, quite good for many applications. It may be also worthy to get the effects on other performance characters. **Figure 13(c)** presents the variation of DCR *r*d, which exhibits a roughly normal distribution with a wide relative FWHM (54%). In detail, the worst DCR is some 30% higher than the designed value, which is acceptable in applications. **Figure 13(d)** displays the distribution of PDE *η*, normal with a narrow relative width (17%). It suggests a PDE change within 0.46–0.54, which is homogeneous enough in many applications. The reason why the DCR fluctuation is much larger than PDE is that DCR depends almost exponentially on *V*ex and PDE, as **Figure 12(c)** shows.

effective *V*ex will vary from this to that pixel so that device performance exhibits inhomogeneity. To clarify this effect, we first set any structure parameter *t* randomly changing in a way as

0(1 + *W σ<sup>i</sup>*

where the subscription *i* = 1, 2, 3 is the calculation sequence number in a series of simulations,

*<sup>t</sup>*

m0(1 + *W*tm *σ*tm*<sup>i</sup>*

), (1)

), (2)

(*t*m) with respect to *n*c0(*t*m0),

,...), one set of device

m), *n*c0(*t*m0)

(multiplication width *t*

(*t*m). All the variables are defined in a similar

, *t*m*<sup>i</sup>*

(charge layer thickness) have strong effects, while

and multiplication layer doping level *n*m have

is the designed value of *t*, *W* is the fluctuation degree of *t*

is the *i*th value of the random variable *σ*, distributed in a normal mode

),

*<sup>i</sup>* = *t*

0

*<sup>n</sup>*c*<sup>i</sup>* <sup>=</sup> *<sup>n</sup>*c0(1 <sup>+</sup> *<sup>W</sup>*nc *<sup>σ</sup>*nc*<sup>i</sup>*

) is the *i*th value of *σ* for changing *n*<sup>c</sup>

formance fluctuations and device structures is figured out.

its own FWHM and *σ* values. With a set of structure parameters (*n*c*<sup>i</sup>*

, *t*m and *t*<sup>c</sup>

, thickness *t*<sup>a</sup>

(*t*m*<sup>i</sup>*

with full width at half maximum (FWHM) of unity. Similarly we can set

<sup>m</sup>*<sup>i</sup>* = *t*

) is the *i*th value of charge density *n*<sup>c</sup>

(*t*m), *W*nc(*W*tm) is the relative FWHM of *n*<sup>c</sup>

way to the above. The structure parameters are changing independently because each has

performance data is calculated. With thousand sets of device performance data, distributions

weak effects on *V*ex. The strong *t*m effect can be easily understood since the width of the multiplication region is crucial to determine the characteristics of a SPAD [48, 54]. It means that the charge quantity should be controlled most precisely in design and epitaxy process. In addition, we see that every single structure parameter leads to *V*ex fluctuation in a linear

Extending the above simulation to more structure parameters, the homogeneity of device performance can be obtained in terms of varying parameter numbers. The result of *V*ex is displayed in **Figure 13(a)**, where a sublinear change of *V*ex fluctuation is seen to happen with increasing parameter number. Taking all of the six parameters into account, we get that *V*ex varies with a FWHM of 24%, far less than a simple summation of the effects of individual parameters. The *V*ex distribution arisen by six independently varying parameters is demonstrated in **Figure 13(b)**. With the referred excess bias *V*ex0 = 5 V, the practical value of *V*ex varies mainly in the range of 4.4–5.6 V, quite good for many applications. It may be also worthy to get the effects on other performance characters. **Figure 13(c)** presents the variation of DCR *r*d, which exhibits a roughly normal distribution with a wide relative FWHM (54%). In detail, the worst DCR is some 30% higher than the designed value, which is acceptable in applications. **Figure 13(d)** displays the distribution of PDE *η*, normal with a narrow relative width (17%). It suggests a PDE change within 0.46–0.54, which is homogeneous enough in many applications.

, *V*ex, *r*d, and *η* are obtained through statistics, and then the correlation between the per-

*t*

158 Advances in Photodetectors - Research and Applications

is the *i*th value of parameter *t*, *t*

0 , and *σ<sup>i</sup>*

and so forth, where *n*c*<sup>i</sup>*

(*σ*tm*<sup>i</sup>*

is the designed value of *n*<sup>c</sup>

Our simulations show that *n*<sup>c</sup>

absorption layer doping level *n*<sup>a</sup>

*t* i

relative to *t*

and *σ*nc*<sup>i</sup>*

of *V*<sup>b</sup>

manner.

In realistic epitaxial growth, controlling the thickness or the doping level may usually have a common precision in different layers, although a non-dope layer would have worse carrier density fluctuation than the intentionally doped regions. The following thus shows a way more effective to investigate the uncertainty correlation between the epitaxy growth and the device performance. Let us study the device characteristics varying with common fluctuation width *W*nd of the residual carrier densities in the absorption layer and the

**Figure 13.** (a) Simulated distribution FWHM of the excess bias *V*ex dependent of the number of simultaneously varying parameters; distribution histograms of (b) *V*ex, (c) DCR and (d) PDE brought about by six simultaneously varying parameters including the doping level and the width of the absorption region *n*<sup>a</sup> and *t*<sup>a</sup> , of the charge layer *n*<sup>c</sup> and *t*<sup>c</sup> , and of the multiplication region *n*m and *t*m, respectively. The dashed lines on the histograms indicate the fitted results to normal distributions.

multiplication layer, common fluctuation width *W*<sup>t</sup> of the widths of the absorption, charge and multiplication regions, and fluctuation width *W*n of the doping level in the charge layer, that reads

$$\begin{aligned} n\_{\text{al}} &= n\_{\text{on}} (1 + \mathcal{W}\_{\text{nd}} \,\sigma\_{\text{nd}}), \\ n\_{\text{ml}} &= n\_{\text{on}} (1 + \mathcal{W}\_{\text{nd}} \,\sigma\_{\text{nm}}), \\ n\_{\text{cl}} &= n\_{\text{cl}} (1 + \mathcal{W}\_{\text{n}} \,\sigma\_{\text{nc}}), \\ t\_{\text{al}} &= t\_{\text{al}} (1 + \mathcal{W}\_{\text{t}} \,\sigma\_{\text{tu}}), \\ t\_{\text{ml}} &= t\_{\text{mol}} (1 + \mathcal{W}\_{\text{t}} \,\sigma\_{\text{t}\text{m}}), \\ t\_{\text{cl}} &= t\_{\text{cl}} (1 + \mathcal{W}\_{\text{t}} \,\sigma\_{\text{nc}}). \end{aligned} \tag{3}$$

In conventional growth, it is more difficult to control doping than thickness. Based on the result of **Figure 14**, as the thickness control can be better than 1–2%, *V*ex homogeneity of 50, 40 and 30% could be realized by constraining the charge precision within 4–4.5, 3–3.6 and 2–2.7%, respectively. Viewed from another angle, the result is suggestive of a large space to tradeoff between the controls in thickness and charge. The example of *V*ex fluctuating below

Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging

) weakly decreases to be about 3.5%(3%). In general, limiting the device inhomogeneity

(in term of *V*ex) below 50, 40, 30, and 20% needs the thickness and charge be controlled to a precision degree better than 3–3.2, 2.4–2.6, 1.7–1.9, and 0.9–1.2%, respectively. Since these degrees of control accuracies are easy or possible in epitaxy growth, InGaAsP/InP SPAD arrays are now producible in many laboratories [55–57] including our group, as will be described below. In order to finely limiting the device homogeneity, such as with *V*ex fluctuation less than 10%, the thickness and charge should be controlled better than 0.5% in fluctuation, together with non-dope carrier density controlling within 10%. This degree of epitaxy precision is quite a challenging technique. It is possibly one of the reasons why it is presently still difficult to prepare 512 × 512 or larger scale SPAD arrays. Obviously, the above method is very helpful and effective to quantitatively correlate the controllability of multiple structure parameters

InP based APDs must use epitaxial materials. Firstly, we prepared APD materials with the main structure as shown in **Figure 12(a)** by using metal organic chemical vapor deposition (MOCVD). MOCVD growth is performed to satisfy the material uniformity requirements described above. On this epitaxial wafer, SPAD device structure as shown by **Figure 15** will be fabricated. As an array, there are isolating grooves (channels) between the pixels, Indium shots on the front side for interconnection and micro-lenses on the backside for light

The key processes to fabricate the InGaAsP/InP SPAD arrays are as follows. First the active p-n junction is formed by selective diffusion. The diffusion process includes, thermally

(*W*n) is better to be as

161

(*W*n) could be roughened to 3%(3.5%) if

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50% with *W*nd = 10% suggests that the thickness (charge) precision *W*<sup>t</sup>

) just satisfies 4.5%(4%), while *W*<sup>t</sup>

small as 1% if *W*n(*W*<sup>t</sup>

with the SPAD device homogeneity.

**4.2. Fabrication of InGaAsP/InP SPAD arrays**

**Figure 15.** Structure of InGaAsP/InP SPAD array chip.

*W*n(*W*<sup>t</sup>

collection.

One typical trial is to examine the dependence on two fluctuating parameters while remaining the others fixed. With *W*nd fixed, **Figure 14** shows the *V*ex contours as functions of *W*n and *W*t . From these data, the precision range of epitaxy growth required for definite performance homogeneity can be clearly seen. At first, two conditions with 10 and 20% of *W*nd appear close to each other, especially for high *V*ex variations, owing to the weak effect of the carrier density in non-dope layer. The relationship between *W*n and *W*<sup>t</sup> is far away from a linear curve but more like a circle for a finite *V*ex fluctuation. To constraint *V*ex fluctuation below a certain value, the fluctuations in thickness and charge control should roughly follow

$$\text{W}\_{\text{n}}^{2} + \text{W}\_{\text{t}}^{2} \le \text{W}\_{\text{x}}^{2} \,\tag{4}$$

where *W*<sup>x</sup> is a certain precision control value of thickness and charge. Quantitatively speaking, *V*ex relative fluctuations below 50, 40, 30 and 20% need *W*<sup>x</sup> values of about 4, 3, 2 and 1%, respectively.

**Figure 14.** Contours of *V*ex fluctuation width as a function of the thickness and doping level fluctuation widths *W*<sup>t</sup> and *W*n, under different fixed fluctuation widths of the residual carrier density in the non-dope layers *W*nd.

In conventional growth, it is more difficult to control doping than thickness. Based on the result of **Figure 14**, as the thickness control can be better than 1–2%, *V*ex homogeneity of 50, 40 and 30% could be realized by constraining the charge precision within 4–4.5, 3–3.6 and 2–2.7%, respectively. Viewed from another angle, the result is suggestive of a large space to tradeoff between the controls in thickness and charge. The example of *V*ex fluctuating below 50% with *W*nd = 10% suggests that the thickness (charge) precision *W*<sup>t</sup> (*W*n) is better to be as small as 1% if *W*n(*W*<sup>t</sup> ) just satisfies 4.5%(4%), while *W*<sup>t</sup> (*W*n) could be roughened to 3%(3.5%) if *W*n(*W*<sup>t</sup> ) weakly decreases to be about 3.5%(3%). In general, limiting the device inhomogeneity (in term of *V*ex) below 50, 40, 30, and 20% needs the thickness and charge be controlled to a precision degree better than 3–3.2, 2.4–2.6, 1.7–1.9, and 0.9–1.2%, respectively. Since these degrees of control accuracies are easy or possible in epitaxy growth, InGaAsP/InP SPAD arrays are now producible in many laboratories [55–57] including our group, as will be described below. In order to finely limiting the device homogeneity, such as with *V*ex fluctuation less than 10%, the thickness and charge should be controlled better than 0.5% in fluctuation, together with non-dope carrier density controlling within 10%. This degree of epitaxy precision is quite a challenging technique. It is possibly one of the reasons why it is presently still difficult to prepare 512 × 512 or larger scale SPAD arrays. Obviously, the above method is very helpful and effective to quantitatively correlate the controllability of multiple structure parameters with the SPAD device homogeneity.

#### **4.2. Fabrication of InGaAsP/InP SPAD arrays**

InP based APDs must use epitaxial materials. Firstly, we prepared APD materials with the main structure as shown in **Figure 12(a)** by using metal organic chemical vapor deposition (MOCVD). MOCVD growth is performed to satisfy the material uniformity requirements described above. On this epitaxial wafer, SPAD device structure as shown by **Figure 15** will be fabricated. As an array, there are isolating grooves (channels) between the pixels, Indium shots on the front side for interconnection and micro-lenses on the backside for light collection.

The key processes to fabricate the InGaAsP/InP SPAD arrays are as follows. First the active p-n junction is formed by selective diffusion. The diffusion process includes, thermally

**Figure 15.** Structure of InGaAsP/InP SPAD array chip.

**Figure 14.** Contours of *V*ex fluctuation width as a function of the thickness and doping level fluctuation widths *W*<sup>t</sup>

under different fixed fluctuation widths of the residual carrier density in the non-dope layers *W*nd.

multiplication layer, common fluctuation width *W*<sup>t</sup>

160 Advances in Photodetectors - Research and Applications

layer, that reads

*W*t

where *W*<sup>x</sup>

respectively.

and multiplication regions, and fluctuation width *W*n of the doping level in the charge

),

),

),

),

).

),

*n*a*<sup>i</sup>* = *n*a0(1 + *W*nd *σ*na*<sup>i</sup>*

<sup>a</sup>*<sup>i</sup>* = *t*

*t* <sup>m</sup>*<sup>i</sup>* = *t*

*t* <sup>c</sup>*<sup>i</sup>* = *t*

the fluctuations in thickness and charge control should roughly follow

in non-dope layer. The relationship between *W*n and *W*<sup>t</sup>

ing, *V*ex relative fluctuations below 50, 40, 30 and 20% need *W*<sup>x</sup>

*W*<sup>n</sup>

*n*m*<sup>i</sup>* = *n*m0(1 + *W*nd *σ*nm*<sup>i</sup>*

*<sup>t</sup>*

a0(1 + *W*<sup>t</sup> *σ*ta*<sup>i</sup>*

c0(1 + *W*<sup>t</sup> *σ*tc*<sup>i</sup>*

One typical trial is to examine the dependence on two fluctuating parameters while remaining the others fixed. With *W*nd fixed, **Figure 14** shows the *V*ex contours as functions of *W*n and

. From these data, the precision range of epitaxy growth required for definite performance homogeneity can be clearly seen. At first, two conditions with 10 and 20% of *W*nd appear close to each other, especially for high *V*ex variations, owing to the weak effect of the carrier density

more like a circle for a finite *V*ex fluctuation. To constraint *V*ex fluctuation below a certain value,

<sup>2</sup> < *W*<sup>x</sup> 2

is a certain precision control value of thickness and charge. Quantitatively speak-

<sup>2</sup> + *W*<sup>t</sup>

m0(1 + *W*<sup>t</sup> *σ*tm*<sup>i</sup>*

*<sup>n</sup>*c*<sup>i</sup>* <sup>=</sup> *<sup>n</sup>*c0(1 <sup>+</sup> *<sup>W</sup>*<sup>n</sup> *<sup>σ</sup>*nc*<sup>i</sup>*

and *W*n,

of the widths of the absorption, charge

is far away from a linear curve but

, (4)

values of about 4, 3, 2 and 1%,

(3)

evaporating one layer of solid Zn3 P2 , depositing one layer of SiNx to thoroughly cover Zn3 P2 , rapid thermal annealing to diffuse Zn into the chip, and etching off the SiN<sup>x</sup> and the resident Zn3 P2 . To make the response time of a SPAD device shorter than 5 ns, the active area (the p-n junction area) of a pixel is made to be less than *ϕ*100 μm. Considering the guard-rings, the lateral depletion width and the diffusion length of electrons and holes, the distance between neighboring pixel centers is taken to be 300 μm. To suppress the cross-talk between pixels, the isolation between pixels is, besides the deep grooves, aided by highly resistive p-n junction. To increase the filling factor, light is incident on the backside, where there fabricated microlenses for each pixel. The microlenses here are not bonded onto the backside, but directly fabricated on the backside by specific dry-etching.

The fabricated SPAD array is characterized as shown in **Figure 16**. Measurements on material properties show that residual carrier density, layer thickness, and doping level fluctuations in a 10 × 10 mm2 area appear about 8, 0.8 and 1.5%. On such a chip, 32 × 32–64 × 64 arrays of SPADs were developed and characterized at low temperatures. Under gated mode with gate repetition rate of 500 kHz and gate width of 10 ns, DCR and PDE were measured using a single-photon laser at 1.06 μm. The afterpulsing probability is controlled below 2% by setting the dead time to be ~2 μs. As presented by the inset in **Figure 16**, various pixels have dark *I*-*V* curves with *V*<sup>b</sup> (defined to be the bias at 10 μA) weakly changing but around 75 V. **Figure 16** shows that, the fluctuation in the excess bias distributes in a normal way with FWHM of 14%, which is consistent with the simulated value 18%, and compatible with an estimation based on **Figure 16**. The DCR and PDE vary normally with FWHM of 31 and 10%, and this is also consistent with the simulated values 37 and 12%, respectively.

a transparent window, the InGaAsP/InP SPAD array is developed and can be used in an

Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging

http://dx.doi.org/10.5772/intechopen.81294

163

**Figure 17.** Imaging by a LADAR instrument with 64 × 64 InGaAsP/InP SPAD focal-plane array detectors.

A 64 × 64 InGaAsP/InP SPAD array device is installed onto the focal plane of a LADAR system. Under 1.06 μm laser irradiation, the scence 1–3 km away was successfully imaged with

APDs are being more and more widely and deeply studied to satisfy the requirement in weak light and single photon imaging. The progresses of this worldwide study, especially the distinctive researches and achievements in SITP and UESTC are reviewed. We successfully fabricated up to 64 × 1 linear-mode Si APD array, and 32 × 32–64 × 64 Si SPAD arrays, and applied them in LADAR platforms like driverless vehicles. Also, we developed 32 × 32-64 × 64 InGaAsP/InP SPAD arrays, and constructed 3D imaging LADAR using them. Together with the progresses of other groups and other materials, we see a prospective future for the develop-

This work was partially supported by 1000 Foreign Experts Program, China, and by the 1000 Talents Plan of Sichuan Province. We would like to thank Profs. L.B. Yu, Z. Shi, O. Wang, X. Li, Q. Dai, Y. Yang and Drs. J. Chen, X. Xie and Q. Xu at SITP for their practical help, and Profs.

Zh. M. Wang, Q. Zhou and G.W. Deng at UESTC for their theoretical assistance.

imaging system.

**5. Summary**

**4.3. Application of the InGaAsP/InP SPAD arrays**

3D information, as shown in **Figure 17**.

ment and application of focal-plane APDs.

**Acknowledgements**

The ROIC is designed in a way similar to that of Si SPAD arrays. The interconnection is a standard indium-shot inversion-bonding process. After packaging into a vacuum can with

**Figure 16.** An experimental result of *V*ex fluctuation distribution of InGaAsP/InP SPAD array. The dashed line represents the fitting to a normal distribution. The inset exhibits the *I*-*V* curves in dark of a few typical InGaAsP/InP SPAD devices.

Avalanche Photodiode Focal Plane Arrays and Their Application to Laser Detection and Ranging http://dx.doi.org/10.5772/intechopen.81294 163

**Figure 17.** Imaging by a LADAR instrument with 64 × 64 InGaAsP/InP SPAD focal-plane array detectors.

a transparent window, the InGaAsP/InP SPAD array is developed and can be used in an imaging system.

#### **4.3. Application of the InGaAsP/InP SPAD arrays**

A 64 × 64 InGaAsP/InP SPAD array device is installed onto the focal plane of a LADAR system. Under 1.06 μm laser irradiation, the scence 1–3 km away was successfully imaged with 3D information, as shown in **Figure 17**.

#### **5. Summary**

evaporating one layer of solid Zn3

162 Advances in Photodetectors - Research and Applications

fabricated on the backside by specific dry-etching.

consistent with the simulated values 37 and 12%, respectively.

Zn3 P2

in a 10 × 10 mm2

curves with *V*<sup>b</sup>

P2

rapid thermal annealing to diffuse Zn into the chip, and etching off the SiN<sup>x</sup>

, depositing one layer of SiNx

. To make the response time of a SPAD device shorter than 5 ns, the active area (the p-n junction area) of a pixel is made to be less than *ϕ*100 μm. Considering the guard-rings, the lateral depletion width and the diffusion length of electrons and holes, the distance between neighboring pixel centers is taken to be 300 μm. To suppress the cross-talk between pixels, the isolation between pixels is, besides the deep grooves, aided by highly resistive p-n junction. To increase the filling factor, light is incident on the backside, where there fabricated microlenses for each pixel. The microlenses here are not bonded onto the backside, but directly

The fabricated SPAD array is characterized as shown in **Figure 16**. Measurements on material properties show that residual carrier density, layer thickness, and doping level fluctuations

SPADs were developed and characterized at low temperatures. Under gated mode with gate repetition rate of 500 kHz and gate width of 10 ns, DCR and PDE were measured using a single-photon laser at 1.06 μm. The afterpulsing probability is controlled below 2% by setting the dead time to be ~2 μs. As presented by the inset in **Figure 16**, various pixels have dark *I*-*V*

shows that, the fluctuation in the excess bias distributes in a normal way with FWHM of 14%, which is consistent with the simulated value 18%, and compatible with an estimation based on **Figure 16**. The DCR and PDE vary normally with FWHM of 31 and 10%, and this is also

The ROIC is designed in a way similar to that of Si SPAD arrays. The interconnection is a standard indium-shot inversion-bonding process. After packaging into a vacuum can with

**Figure 16.** An experimental result of *V*ex fluctuation distribution of InGaAsP/InP SPAD array. The dashed line represents the fitting to a normal distribution. The inset exhibits the *I*-*V* curves in dark of a few typical InGaAsP/InP SPAD devices.

area appear about 8, 0.8 and 1.5%. On such a chip, 32 × 32–64 × 64 arrays of

(defined to be the bias at 10 μA) weakly changing but around 75 V. **Figure 16**

to thoroughly cover Zn3

P2 ,

and the resident

APDs are being more and more widely and deeply studied to satisfy the requirement in weak light and single photon imaging. The progresses of this worldwide study, especially the distinctive researches and achievements in SITP and UESTC are reviewed. We successfully fabricated up to 64 × 1 linear-mode Si APD array, and 32 × 32–64 × 64 Si SPAD arrays, and applied them in LADAR platforms like driverless vehicles. Also, we developed 32 × 32-64 × 64 InGaAsP/InP SPAD arrays, and constructed 3D imaging LADAR using them. Together with the progresses of other groups and other materials, we see a prospective future for the development and application of focal-plane APDs.

#### **Acknowledgements**

This work was partially supported by 1000 Foreign Experts Program, China, and by the 1000 Talents Plan of Sichuan Province. We would like to thank Profs. L.B. Yu, Z. Shi, O. Wang, X. Li, Q. Dai, Y. Yang and Drs. J. Chen, X. Xie and Q. Xu at SITP for their practical help, and Profs. Zh. M. Wang, Q. Zhou and G.W. Deng at UESTC for their theoretical assistance.

### **Author details**

Hai-Zhi Song1,2

Address all correspondence to: hzsong1296@163.com

1 Southwest Institute of Technical Physics (SITP), Chengdu, China

2 Institute of Fundamental and Frontier Sciences, University of Electronic Science and Technology of China (UESTC), Chengdu, China

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## *Edited by Kuan Chee*

This book provides a wide-ranging overview of the current state-of-the-art and new trends in photodetector design and research.

Written by a team of internationally renowned experts, with contributions from universities, research institutes and industries, this work is suitable for students and professionals interested in studying and dealing with photodetector design and technology, as well as the wide gamut of related applications. Its coverage includes: physics and fundamentals of photodetectors; physical models of photodetector operation; new materials, design, processing and function of photodetectors in related applications; testing, monitoring and calibration; and research progress in photodetector-related areas.

Theoretical aspects, design and simulation principles, and important experimental results are thoroughly addressed, embodying a comprehensive account of current activity in this important field of research and industry.

Published in London, UK © 2019 IntechOpen © carloscastilla / iStock

Advances in Photodetectors - Research and Applications

Advances in Photodetectors

Research and Applications

*Edited by Kuan Chee*