**Meet the editor**

Edward M.D. Fisher (IEEE Member 2008) received his MEng degree in Electronic and Electrical Engineering from the University of Edinburgh in 2009, interning at STMicroelectronics researching automatic exposure algorithms. After completing his PhD in single-photon avalanche diode (SPAD) arrays in CMOS for optical communications (University of Edinburgh, 2015), he be-

gan work on high-speed parallel data acquisition systems as a member of the Agile Tomography Group, University of Edinburgh. This work aimed to provide chemical species tomography diagnostics for aero-engines in collaboration with Rolls-Royce, Royal Dutch Shell, and academia within the FLITES project (www.flites.eu). He also previously worked with a bioelectrical impedance spectroscopy company utilizing microfluidics for label-less cell counting, classification, and sorting via electrophoresis. He periodically revisited SPADs with a 2017 chapter on ASIC readout topologies for high-speed data communications and a 2018 book chapter on a robust literature review of the historical development of avalanche gain devices and solid-state photon counting (1900–1969). He is now with Coda Octopus Products Ltd., working on digital design and data acquisition for deep-sea sonar. His responsibilities include adaptions to the sonar pulse waveform for military customers and the implementation of new bottom/ object detection algorithms based on the Canny filter. He has an interest in digital signal processing for low-noise data acquisition and methods in which ASIC and FPGA design can be taught.

Contents

**Preface VII**

**Techniques 3** Edward M.D. Fisher

**Evolution 15**

Vanhaverbeke

**Section 2 The Semiconductor Business 13**

**Section 3 Design Methods and Techniques 37**

Fawnizu Azmadi Hussin

Chapter 1 **Introductory Chapter: ASIC Technologies and Design**

Chapter 2 **ASIC Commercialization Analysis: Technology Portfolios and**

Chapter 3 **Case Study: First-Time Success ASIC Design Methodology Applied to a Multi-Processor System-on-Chip 39**

**the Innovative Performance of ASIC Firms during Technology**

Erik den Hartigh, Claire C.M. Stolwijk, J. Roland Ortt and Wim P.M.

Arya Wicaksana, Dareen Kusuma Halim, Dicky Hartono, Felix Lokananta, Sze-Wei Lee, Mow-Song Ng and Chong-Ming Tang

Muhammad Athar Javed Sethi, Momil Ijaz, Huma Urooj and

Chapter 4 **Bio-Inspired Solutions and Its Impact on Real-World Problems:**

**A Network on Chip (NoC) Perspective 61**

**Section 1 Introduction 1**

## Contents

**Preface XI**


#### **Section 4 ASIC Testing Methods 75**

#### Chapter 5 **Application of Optical Methods to Electronic Component Stress Analysis 77**

Caterina Casavola, Luciano Lamberti, Vincenzo Moramarco, Giovanni Pappalettera and Carmine Pappalettere

Preface

dimensional) ICs.

*To Rebecca Price. For always standing by my side.*

Since the 1970s, the field of integrated circuits (ICs) has matured rapidly and has made sig‐ nificant contributions to our society. Each day we hear of new photolithography methods able to produce novel nanometre-scale structures that can become new transistor devices, and new systems produced with the latest complementary metal-oxide semiconductor (CMOS) process node. We are often reminded of the history of application-specific integrat‐ ed circuits (ASICs) through discussions of Moore's law—the rough doubling of transistor counts every 18 months—and of course through discussions of where the IC field will go as Moore's law starts to slow, saturate, and become uneconomical for traditional planar (two-

There are now a wide variety of subfields under the ASIC umbrella. Each of these has re‐ ceived significant academic attention, commercial financing, and industrial research and de‐ velopment for large-scale manufacturing during different phases of their maturation process. We can chiefly split the ASIC field into three substrata. The first deals with digital ASICs such as central processing units, graphics processing units, microcontroller units, and of course memory ICs and custom-made digital signal processing ICs. The second substra‐ tum covers analog functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), oscillators such as phase-locked loops, amplifiers and sensor interfaces or native semiconductor sensors such as photodiode detectors, and Hall effect magnetic sen‐ sors. The third substratum would be best described as more-than-Moore technologies. These are not an increase in transistor count above Moore's law, but are instead an increase in functionality over and above the existing complex analog or digital functionality. For exam‐ ple, a fully integrated device bringing together low-noise high-accuracy analog circuits, mi‐ croelectromechanical systems, optical sensing, and significant volumes of high-speed digital-signal processing offers a far greater functionality per unit volume than each of these

This book brings together a small collection of chapters covering specific aspects of the ASIC field. The first section, or rather the introductory chapter (Chapter 1), discusses the field in general terms, providing the keen student with key literature and textbooks for a variety of subfields within ASIC design. The combination of sources in this chapter's reference list is a superb overview and introduction to the design methods used in the field, and sources have been selected to provide those interested with a starting point for a selection of disparate specialisms. The ASIC field and the literature are somewhat of a rabbit-hole, with these key

technologies operating in a nonintegrated or separate IC manner.

sources being suitable jumping points for more detailed reading.

## Preface

**Section 4 ASIC Testing Methods 75**

**VI** Contents

**Analysis 77**

Chapter 5 **Application of Optical Methods to Electronic Component Stress**

Giovanni Pappalettera and Carmine Pappalettere

Caterina Casavola, Luciano Lamberti, Vincenzo Moramarco,

#### *To Rebecca Price. For always standing by my side.*

Since the 1970s, the field of integrated circuits (ICs) has matured rapidly and has made sig‐ nificant contributions to our society. Each day we hear of new photolithography methods able to produce novel nanometre-scale structures that can become new transistor devices, and new systems produced with the latest complementary metal-oxide semiconductor (CMOS) process node. We are often reminded of the history of application-specific integrat‐ ed circuits (ASICs) through discussions of Moore's law—the rough doubling of transistor counts every 18 months—and of course through discussions of where the IC field will go as Moore's law starts to slow, saturate, and become uneconomical for traditional planar (twodimensional) ICs.

There are now a wide variety of subfields under the ASIC umbrella. Each of these has re‐ ceived significant academic attention, commercial financing, and industrial research and de‐ velopment for large-scale manufacturing during different phases of their maturation process. We can chiefly split the ASIC field into three substrata. The first deals with digital ASICs such as central processing units, graphics processing units, microcontroller units, and of course memory ICs and custom-made digital signal processing ICs. The second substra‐ tum covers analog functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), oscillators such as phase-locked loops, amplifiers and sensor interfaces or native semiconductor sensors such as photodiode detectors, and Hall effect magnetic sen‐ sors. The third substratum would be best described as more-than-Moore technologies. These are not an increase in transistor count above Moore's law, but are instead an increase in functionality over and above the existing complex analog or digital functionality. For exam‐ ple, a fully integrated device bringing together low-noise high-accuracy analog circuits, mi‐ croelectromechanical systems, optical sensing, and significant volumes of high-speed digital-signal processing offers a far greater functionality per unit volume than each of these technologies operating in a nonintegrated or separate IC manner.

This book brings together a small collection of chapters covering specific aspects of the ASIC field. The first section, or rather the introductory chapter (Chapter 1), discusses the field in general terms, providing the keen student with key literature and textbooks for a variety of subfields within ASIC design. The combination of sources in this chapter's reference list is a superb overview and introduction to the design methods used in the field, and sources have been selected to provide those interested with a starting point for a selection of disparate specialisms. The ASIC field and the literature are somewhat of a rabbit-hole, with these key sources being suitable jumping points for more detailed reading.

Section 2 covers aspects of the ASIC field itself in terms of business strategy and design practices. In Chapter 2, an assessment is made of how the market and company finances work in the field in the face of a base requirement of a diverse ASIC technology portfolio and the increasing barriers to entry into this area of modern technology.

In Section 3, a few critical aspects of ASIC design are presented. In Chapter 3, a case study is used to provide some lessons learnt that can aid in successful first-time ASIC designs taken to tape-out. A number of topics for the design of large, complex system on chip (SoC) de‐ signs are mirrored between this chapter and the introduction (Chapter 1). In Chapter 4, the author has chosen to investigate variants of the packet-switching protocols of the modern network on chip. These are becoming crucial parts of multiprocessor SoC architectures be‐ cause arrays of individually controllable processing elements can be efficiently allocated for the incoming data and instructions, and the packet routing strategy can afford a significant fault tolerance advantage over traditional bus architectures.

Finally, in Section 4, Chapter 5 provides an optical inspection method allowing fault detection and diagnostics to be performed on packaged and system-integrated ASICs. While the exam‐ ple uses a regulator IC within a basic small-outline transistor package, the principle of using optical methods to investigate thermal and mechanical stresses upon the silicon could provide crucial investigative information to aid system, ASIC, and design failure mechanisms.

I would like to express my gratitude to the publishers (InTechOpen) for their help with this book and the authors of accepted manuscripts for their work and patience. For the interest‐ ed readers, I would like to suggest they keep an eye on both the *IEEE Journal of Solid-State Circuits* and the annual conferences: the San Francisco-based International Solid-State Cir‐ cuits Conference, the European Solid-State Circuits Conference, and the Asian Solid-State Circuits Conference. Together with numerous books within the ASIC field, these track nov‐ elty within the field covering topics such as new Intel/ARM processors, Nvidia GPU struc‐ tures, cutting-edge ADC and DAC technologies, and the iterative progress being made in CMOS and Bi-CMOS nanometre-scale technologies.

> **Dr. Edward M. D. Fisher** Coda Octopus Products Ltd. Scotland, United Kingdom

**Introduction**

**Section 1**

**Section 1**
