3. Modeling process of 14-nm CNTFET

This research consists of the design and verification of the CNTFET device's small signal model. Figure 5 shows a solid model of CNTFET with a built-in circuit model in this work.

3.2. CNTFET small signal model

Figure 6. Common-source biasing circuit.

Figure 5. Perspective view of the CNTFET 3D solid model.

This section describes about the design and analysis of the small signal model circuit for CNTFET. The proposed small signal model of a CNTFET is shown in Figure 7. In Figure 7, Cg-CNTS refers to the capacitance between gate electrodes to source, Cg-CNTD refers to the capacitance between gate electrodes to drain, Cg-CNTS refers to the capacitance between gate electrodes to source, and Ri represents the internal resistance. Furthermore, gm refers to the intrinsic transconductance and gd refers to the drain conductance of the circuit as shown in

Modeling of Nano-Transistor Using 14-Nm Technology Node

http://dx.doi.org/10.5772/intechopen.76965

9

Figure 7. In this circuit, the parasitic elements are excluded for the analysis purpose.

#### 3.1. CNTFET biasing

Three different types of biasing structure are seen in the CNTFET device. They are commondrain, common-gate and common-source structure. Common-source transistor circuit is considered in this modeling. The common-source circuit is shown in Figure 6; the DC shows bias on drain and gate with an AC signal present as the input at the gate.

Modeling of Nano-Transistor Using 14-Nm Technology Node http://dx.doi.org/10.5772/intechopen.76965 9

Figure 5. Perspective view of the CNTFET 3D solid model.

Figure 6. Common-source biasing circuit.

As well as multi-walled carbon nanotube consists of two or more concentric cylindrical shells

The electrical properties of a nanotube can be realized from its bandgap. Semiconducting nanotube is a novel choice for the transistor development. Thus, Figure 4 shows bandgap versus radius for semiconducting (zigzag) nanotubes. The bandgap decreases inversely with an increase in diameter. The points with a zero bandgap correspond to metallic nanotubes

This research consists of the design and verification of the CNTFET device's small signal model. Figure 5 shows a solid model of CNTFET with a built-in circuit model in this work.

Three different types of biasing structure are seen in the CNTFET device. They are commondrain, common-gate and common-source structure. Common-source transistor circuit is considered in this modeling. The common-source circuit is shown in Figure 6; the DC shows bias

on drain and gate with an AC signal present as the input at the gate.

with the diameter of 2–30 nm.

3.1. CNTFET biasing

which satisfy n = 3i, where i is an integer.

Figure 4. Bandgap versus radius for zigzag nanotube.

8 Design, Simulation and Construction of Field Effect Transistors

3. Modeling process of 14-nm CNTFET

#### 3.2. CNTFET small signal model

This section describes about the design and analysis of the small signal model circuit for CNTFET. The proposed small signal model of a CNTFET is shown in Figure 7. In Figure 7, Cg-CNTS refers to the capacitance between gate electrodes to source, Cg-CNTD refers to the capacitance between gate electrodes to drain, Cg-CNTS refers to the capacitance between gate electrodes to source, and Ri represents the internal resistance. Furthermore, gm refers to the intrinsic transconductance and gd refers to the drain conductance of the circuit as shown in Figure 7. In this circuit, the parasitic elements are excluded for the analysis purpose.

Figure 7. Intrinsic circuit model for CNTFET.
