**4.3. Machining accuracy**

The results show no big difference between the single submodules with applied slim plate or without. That is to say, the influence of the slim plate on the clamping force distribution can be ignored. The reason is that the deformation of the silver slim plate is very limited even it

A clamping force is needed to ensure the basic functions, and all the components within PP IGBTs contact well. The silicon chips will produce much heat and increase the temperature under working condition of the PP IGBT. Thus, this high temperature induces thermal stress because all the components are constricted by the clamping fixture, and there is no space to move when they are heated up. The thermal stress during the heating phase will change the clamping force distribution within PP IGBTs to a large extent [20]. The finite element model of the conceptual PP IGBT studied consists of 44 silicon chips (30 IGBT chips and 14 FRD chips),

A finite element multi-physics model co-coupled with an electrical field, thermal field, and mechanical field is proposed to predict the clamping force distribution within the PP IGBT. The status of the clamping phase is that the PP IGBT is only clamped by the clamping fixture with a prescribed displacement. And the heating phase is the state where the clamped PP IGBT is heated up caused by the collector current to approximate its working condition. More details for this part can be found in the study [20]. The simulation results are shown in **Figure 11**.

The contact pressure distribution within the studied PP IGBT is relatively uniform under the clamping phase. However, this situation changes a lot when the PP IGBT is heated up. The pressure distribution is extremely uneven and is mainly concentrated in the center. That is to say, the clamping force distribution will also be uneven, and the change trend will be the same

has a relative small Young's modulus.

84 Design, Simulation and Construction of Field Effect Transistors

and the chip number is marked as shown in **Figure 10**.

**Figure 10.** Internal layout and chip numbers of the conceptual PP IGBT.

**4.2. Thermal stress**

As stated before, the PP IGBT has a multilayer structure and all components are stacked. It is impossible to control each component having the same size because of the machining accuracy. Therefore, the difference or error in the size among components is inevitable. Furthermore, the size error existing in each component will also be summed up during the assembling process as the components are stacked. Adding up all factors means that the height of each submodule will not be the same. These existing differences of the height of the submodules will affect the clamping force distribution. The finite element model including 11 IGBT chips and five FRD chips is shown in **Figure 12**. More details can be found in the study [13].

The FRD chip 5 with different height tolerances, ranges from 0 to −3 μm, is selected to predict the clamping force distribution within the studied PP IGBT. The von Mises stress on the surface of the silicon chips (IGBT 4, IGBT 8, FRD2, and FRD5) with different heights is extracted and shown in **Figure 13**. Furthermore, the average clamping force of FRD chip 5 is extracted under different height tolerances as shown in **Figure 14**.

The results show that the clamping force of FRD chip 5 decreases sharply while the height tolerances is increasing. The clamping force decreases to less than 100 N, which is much less than


**Table 4.** Average clamping force comparison.

the rated clamping force, when the height tolerance is 3 μm. It is assumed that this chip will lose contact if the height tolerance is more than 3 μm. Meanwhile, the von Mises of the chip nearby the FRD chip 5 will increase sharply, especially the von Mises in the border between the active area and the terminal area. This area is very easy to crack if too much clamping force is applied as stated in [20]. Therefore, the machining accuracy should be controlled to a certain extent to ensure the clamping force distribution. The maximum height tolerance of

Clamping Force Distribution within Press Pack IGBTs http://dx.doi.org/10.5772/intechopen.75999 87

From the simulation results of the study [13, 20], there still exists some difference among the submodules in the clamping force distribution within PP IGBTs because of the warpage of the collector electrode even everything is well controlled. The influence of the electrode on the clamping force in this packaging style is inevitable. However, the internal layout can be changed to reduce the influence of the electrode and improve the distribution a little bit. Three layouts are designed and analyzed through the finite element model as shown in **Figure 15**.

**Figure 15.** Three different layouts: (a) circular electrodes with the square internal layout, (b) square electrodes with the

square internal layout, and (c) circular electrodes with the circular internal layout.

each submodule should be controlled within 3 μm based on this simulation result.

**Figure 14.** Clamping force of FRD chip 5 under difference height tolerances.

**4.4. Internal layout**

**Figure 12.** Finite element model and chip number.

**Figure 13.** von Mises distribution of the selected silicon chips.

**Figure 14.** Clamping force of FRD chip 5 under difference height tolerances.

the rated clamping force, when the height tolerance is 3 μm. It is assumed that this chip will lose contact if the height tolerance is more than 3 μm. Meanwhile, the von Mises of the chip nearby the FRD chip 5 will increase sharply, especially the von Mises in the border between the active area and the terminal area. This area is very easy to crack if too much clamping force is applied as stated in [20]. Therefore, the machining accuracy should be controlled to a certain extent to ensure the clamping force distribution. The maximum height tolerance of each submodule should be controlled within 3 μm based on this simulation result.

#### **4.4. Internal layout**

**Figure 12.** Finite element model and chip number.

**Figure 13.** von Mises distribution of the selected silicon chips.

**Table 4.** Average clamping force comparison.

86 Design, Simulation and Construction of Field Effect Transistors

**Chip no. Rated (N) F (N) Deviation (%)**

#2 1660 1596.3 84.841 −3.84 −94.89 #3 1558 1549.2 2301.3 −0.56 47.71 #8 1558 1569.1 2949.6 0.71 89.32 #13 1558 1577.8 3072.5 1.27 97.21

**Case 1 Case 2 Case 1 Case 2**

From the simulation results of the study [13, 20], there still exists some difference among the submodules in the clamping force distribution within PP IGBTs because of the warpage of the collector electrode even everything is well controlled. The influence of the electrode on the clamping force in this packaging style is inevitable. However, the internal layout can be changed to reduce the influence of the electrode and improve the distribution a little bit. Three layouts are designed and analyzed through the finite element model as shown in **Figure 15**.

**Figure 15.** Three different layouts: (a) circular electrodes with the square internal layout, (b) square electrodes with the square internal layout, and (c) circular electrodes with the circular internal layout.

Proposal I is the circular electrodes with the square internal layout; proposal II is the square electrodes with the square internal layout, and proposal III is the circular electrodes with the circular internal layout. The different internal layouts lead to some distinction in the warpage of the electrodes and then affect the clamping force distribution. The average clamping force of each silicon chip is extracted and listed in **Table 5**.

of PP IGBTs. A step has to be designed in the electrode to form a flange to make the PP IGBT a confined space to protect the silicon chips out of environment disruption. Two important

Clamping Force Distribution within Press Pack IGBTs http://dx.doi.org/10.5772/intechopen.75999 89

Where *A* is the diameter of the electrode and *B* is the equivalent diameter of the pedestals. The parameter *A* is the most important parameter because it is used to conduct the current, heat flux, and the clamping force. And furthermore, the equivalent diameter *B* is also very important that the clamping force is transmitted through the pedestals. Whether the value of *A* is matched with *B* or not will affect the clamping force to a large extent. The finite element model used in this section consists of 40 IGBT chips and 20 FRD chips, and this model is axial symmetry. Only half of this model is simulated to save time, and then the results can be expanded to the whole model. Firstly, the electrode diameter of 125 and 141 mm is simulated and the

Where the value of 125 mm is smaller than the equivalent diameter of pedestals and 141 mm is larger than that value. The simulation results show that the pressure will concentrate in the center of the PP IGBT when the diameter of the electrode is smaller than the equivalent diameter of pedestals. And the pressure will concentrate in the boundary of the PP IGBT when the diameter of the electrode is too large. The reason is that the electrode undergoes a different direction warpage under those two conditions. Then, different electrode diameters as 125, 127, 131, 135, 139, and 141 mm are simulated based on this finite element model and the average clamping force of each silicon chip is extracted. The clamping force error of each

As it is seen in the results, the majority of the IGBT chips have plus deviation/error when the electrode diameter is smaller than 135 mm and they have minus error when the diameter is

**Figure 17.** Pressure distribution on the surface of the silicon chips: (a) diameter of 125 mm and (b) diameter of 141 mm.

parameters in this part are shown in **Figure 16** and are explained.

pressure on the surface of the silicon chips is shown in **Figure 17**.

silicon chip is shown in **Table 6** with half model.

**Figure 16.** Explanation for important parameters.

From the clamping force distribution of three different internal layouts, it is shown that it is relatively uniform and the error is acceptable. Considering the difference between the IGBT chips and FRD chips, proposal II is better than I and III with a relatively lower error between the IGBT chips and FRD chips of 4.3% (2.65% to (−1.65%)). The error of those two proposals is 14.98 and 15.75%, respectively. Considering the difference among IGBT chips or FRD chips, proposal III is better because all the IGBT chips or FRD chips are located in the same circular and have the same deformation. However, the error among IGBT chips or FRD chips of proposal II is also relatively low with a value of 0.9 and 0.39%, respectively. In conclusion, proposal II is better than those two proposals because the electrode undergoes little deformation when the PP IGBT is clamped.
