4. Development of analytical model for UL-HTFET

#### 4.1. 2-D Poisson equation-based model

In regions 1–4 of Figure 1, the 2-D Poisson's equation is considered and the 1-D Poisson's equation is solved on region 5 due to the absence of gate overlap. The following assumptions have been considered while modeling [12–16]:


In regions I–IV, the 2-D Poisson's equation is given as follows:

$$\frac{\partial^2 \Psi\_i(\mathbf{x}, y)}{\partial \mathbf{x}^2} + \frac{\partial^2 \Psi\_i(\mathbf{x}, y)}{\partial y^2} = \frac{qN\_i}{\mathcal{E}\_i} \tag{2}$$

where the subscript i ¼ 1, 2, 3, 4 corresponding to regions 1, 2, 3, or 4.

Ψið Þ x; y , Ni, and ℇ<sup>i</sup> are the two-dimensional potential, doping concentration, and permittivity of the semiconductor material, respectively, in the respective four regions.

The 2-D potential is approximated as parabolic along the depth of the device. So, the assumption for the 2-D potential is considered as

$$\Psi\_i(\mathbf{x}, \mathbf{y}) = \mathbb{C}\_{0i}(\mathbf{x}) + \mathbb{C}\_{1i}(\mathbf{x})\mathbf{y} + \mathbb{C}\_{2i}(\mathbf{x})\mathbf{y}^2 \tag{3}$$

where C0ið Þx , C1ið Þx , and C2ið Þx are coefficients that are functions of mole fraction.

In each of the four regions, three vertical boundary conditions must be satisfied to confirm the continuity of potential and electric field at the gate insulator–semiconductor interface (y ¼ 0) and at the lowermost part of the device (y ¼ ts)

$$
\Psi\_i(\mathbf{x}, 0) = \Psi\_{\rm si}(\mathbf{x})
$$

$$
\frac{\partial \Psi\_i(\mathbf{x}, 0)}{\partial y} = \frac{\varepsilon\_i}{\varepsilon\_{\rm ox} \mathbf{t}\_{\rm ox}} \{\Psi\_{\rm si}(\mathbf{x}) - \mathbf{v}\_i\}
$$

$$
\frac{\partial \Psi\_i(\mathbf{x}, t\_s)}{\partial y} = 0 \tag{4}
$$

where Ψsið Þx is the surface potential, ℇox is the permittivity of gate dielectric, tox is the gate dielectric thickness, and vi ¼ VGS � Vfbi. The gate voltages with respect to source and the flatband voltage are represented by VGS, and Vfbi, respectively. The bandgap EGi is a function of Ge-mole fraction in Si1-xGex expressed as a linear interpolation of the bandgaps of Si (� 1.10 eV) and Ge (� 0.66 eV):

$$E\_{\rm Ci} = 1.10 - 0.34x \tag{5}$$

Using the boundary conditions of Eq. (4), we obtain the coefficients of Eq. (3) as follows:

$$\mathbf{C}\_{\rm{0i}} = \Psi\_{\rm{si}}(\mathbf{x})$$

$$\mathbf{C}\_{\rm{li}} = \frac{\varepsilon\_{\rm{i}}}{\varepsilon\_{\rm{ox}}t\_{\rm{ox}}} \{\Psi\_{\rm{si}}(\mathbf{x}) - \mathbf{v}\_{\rm{i}}\}$$

$$\mathbf{C}\_{2i} = \frac{\varepsilon\_{\rm{i}}}{2\varepsilon\_{\rm{ox}}t\_{\rm{ox}}t\_{\rm{s}}} \{v\_{\rm{i}} - \Psi\_{\rm{si}}(\mathbf{x})\}\tag{6}$$

Using the coefficients of Eq. (6) in the polynomial in Eq. (3), the 2-D Poisson's equation can be expressed as

$$
\Psi\_{si}^{\prime\prime\prime} - k\_i^2 \Psi\_{si} = k\_i^2 \xi\_i \tag{7}
$$

with

(2)

4. Development of analytical model for UL-HTFET

Figure 6. ON and OFF current ratios (ION/ IOFF) and subthreshold swing (SS) versus Ge-mole fraction.

In regions 1–4 of Figure 1, the 2-D Poisson's equation is considered and the 1-D Poisson's equation is solved on region 5 due to the absence of gate overlap. The following assumptions

4. Source-channel and channel-drain depletion regions do not have any kind of mobile

∂2

Ψið Þ x; y , Ni, and ℇ<sup>i</sup> are the two-dimensional potential, doping concentration, and permittivity

The 2-D potential is approximated as parabolic along the depth of the device. So, the assump-

Ψið Þ x; y <sup>∂</sup>y<sup>2</sup> <sup>¼</sup> qNi

ℇi

<sup>Ψ</sup>ið Þ¼ <sup>x</sup>; <sup>y</sup> <sup>C</sup>0ið Þþ <sup>x</sup> <sup>C</sup>1ið Þ<sup>x</sup> <sup>y</sup> <sup>þ</sup> <sup>C</sup>2ið Þ<sup>x</sup> <sup>y</sup><sup>2</sup> (3)

4.1. 2-D Poisson equation-based model

42 Design, Simulation and Construction of Field Effect Transistors

1. No trap charges are considered.

3. Gate leakage current is zero.

tion for the 2-D potential is considered as

charges.

have been considered while modeling [12–16]:

2. There are no immobile charges in gate dielectric.

In regions I–IV, the 2-D Poisson's equation is given as follows:

∂2

where the subscript i ¼ 1, 2, 3, 4 corresponding to regions 1, 2, 3, or 4.

of the semiconductor material, respectively, in the respective four regions.

Ψið Þ x; y ∂x<sup>2</sup> þ

$$k\_i = \sqrt{\frac{\varepsilon\_{\alpha x}}{\varepsilon\_i t\_{\alpha x} t\_s}}$$

and <sup>ξ</sup><sup>i</sup> <sup>¼</sup> qNi εik<sup>2</sup> i � vi:

Eq. (7) has a solution of the form:

$$\Psi \mathcal{W}\_{\rm si}(\mathbf{x}) = A\_i \mathbf{e}^{+k\_i \mathbf{x}} + B\_i \mathbf{e}^{-k\_i \mathbf{x}} - \xi\_i \tag{8}$$

The surface potentials for regions I–IV of the device are represented by Eq. (8). For region V, we apply 1-D Poisson's equation:

$$\frac{\partial^2 \Psi\_5(x)}{\partial x^2} = \frac{qN\_5}{\varepsilon\_5} \tag{9}$$

values are mentioned in the inset of Figure 1. The width of the depletion region in the source is

ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi 2ε<sup>1</sup> ξ<sup>1</sup> � Ψss j j q Nj j <sup>1</sup>

> ln Ns ni<sup>2</sup> � �

(12)

45

Band Gap Modulated Tunnel FET

http://dx.doi.org/10.5772/intechopen.76098

(17)

f ¼

Using Eqs. (8) and (10), the lateral electric field for the five regions is given as

for i = 1, 2, 3, 4 corresponding to regions I, II, III, or IV.

for i = 1, 2, 3, 4 corresponding to regions I, II, III, or IV.

s

<sup>Ψ</sup>ss ¼ � kT q

Exi ¼ �ki Piekix � Qie�kix � �

ε5

The vertical electric fields for the different regions are expressed using Eqs. (3) and Eq. (10) as

The drain current is calculated by integrating the band-to-band generation rate GBTBT over the

ffiffiffiffiffiffiffi EGi <sup>p</sup> exp �<sup>B</sup> E<sup>1</sup>:<sup>5</sup> Gi j j E

!

Id ¼ q ð

GBTBT <sup>¼</sup> <sup>A</sup> j j <sup>E</sup> <sup>2</sup>

þ C1

� � (13)

Eyi ¼ �ð Þ a1<sup>i</sup> þ 2a2iy (14)

Ey5 ¼ 0 (15)

GBTBTdV (16)

Ex5 ¼ � qN5x

expressed as

where

and

and

where

where E ¼

ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi E2 <sup>x</sup> <sup>þ</sup> <sup>E</sup><sup>2</sup> y

q

volume of the device

to get

$$
\Psi\_5(\mathbf{x}) = \Psi\_{s5}(\mathbf{x}) = \frac{qN\_5}{\varepsilon\_5}\mathbf{x}^2 + \mathbf{C}\_1\mathbf{x} + \mathbf{C}\_2 \tag{10}
$$

The coefficients A1, B1, A2, B2, A3, B3, A4, B4, C1, and C<sup>2</sup> must satisfy the boundary conditions for the continuity of surface potential and electric field in the five regions:

$$\Psi\_{s1}(-\mathbf{f}) = -\left(\frac{\mathbf{kT}}{\mathbf{q}}\right)\ln\left(\frac{\mathbf{N\_s}}{\mathbf{n}\mathbf{u}}\right)$$

$$\Psi\_{s1}(0) = \Psi\_{s2}(0)$$

$$\frac{\partial\Psi\_{s1}(0)}{\partial\mathbf{x}} = \frac{\partial\Psi\_{s2}(0)}{\partial\mathbf{x}}$$

$$\Psi\_{s2}(\mathbf{a}) = \Psi\_{s3}(\mathbf{a})$$

$$\frac{\partial\Psi\_{s2}(\mathbf{a})}{\partial\mathbf{x}} = \frac{\partial\Psi\_{s3}(\mathbf{a})}{\partial\mathbf{x}}$$

$$\Psi\_{s3}(\mathbf{b}) = \Psi\_{s4}(\mathbf{b})$$

$$\frac{\partial\Psi\_{s3}(\mathbf{b})}{\partial\mathbf{x}} = \frac{\partial\Psi\_{s4}(\mathbf{b})}{\partial\mathbf{x}}$$

$$\Psi\_{s4}(\mathbf{c}) = \Psi\_{s5}(\mathbf{c})$$

$$\frac{\partial\Psi\_{s4}(\mathbf{c})}{\partial\mathbf{x}} = \frac{\partial\Psi\_{s5}(\mathbf{c})}{\partial\mathbf{x}}$$

$$\Psi\_{s5}(\mathbf{d}) = V\_{DS} + \left(\frac{kT}{q}\right)\ln\left(\frac{\mathbf{N}\_d}{n\_{d}}\right) \tag{11}$$

where VDS is the drain voltage with respect to source, and ni<sup>1</sup> and ni<sup>2</sup> are the intrinsic concentrations of the Si1-xGex layer and silicon, respectively. Here, a, b, c, d, and -f are the various positions along the channel at which the boundary conditions are applied. Their values are mentioned in the inset of Figure 1. The width of the depletion region in the source is expressed as

$$f = \sqrt{\frac{2\varepsilon\_1|\xi\_1 - \Psi\_{ss}|}{q|N\_1|}}\tag{12}$$

where

(9)

(11)

<sup>x</sup><sup>2</sup> <sup>þ</sup> <sup>C</sup>1<sup>x</sup> <sup>þ</sup> <sup>C</sup><sup>2</sup> (10)

The surface potentials for regions I–IV of the device are represented by Eq. (8). For region V, we

ε5

q 

Ψs1ð Þ¼ 0 Ψs2ð Þ0

<sup>∂</sup><sup>x</sup> <sup>¼</sup> <sup>∂</sup>Ψs2ð Þ<sup>0</sup> ∂x

Ψs2ð Þ¼ a Ψs3ð Þa

<sup>∂</sup><sup>x</sup> <sup>¼</sup> <sup>∂</sup>Ψs3ð Þ<sup>a</sup> ∂x

Ψs3ð Þ¼ b Ψs4ð Þ b

<sup>∂</sup><sup>x</sup> <sup>¼</sup> <sup>∂</sup>Ψs4ð Þ <sup>b</sup> ∂x

Ψs4ð Þ¼ c Ψs5ð Þc

where VDS is the drain voltage with respect to source, and ni<sup>1</sup> and ni<sup>2</sup> are the intrinsic concentrations of the Si1-xGex layer and silicon, respectively. Here, a, b, c, d, and -f are the various positions along the channel at which the boundary conditions are applied. Their

<sup>∂</sup><sup>x</sup> <sup>¼</sup> <sup>∂</sup>Ψs5ð Þ<sup>c</sup> ∂x

> kT q

ln Nd ni<sup>2</sup> 

ln Ns ni1 

The coefficients A1, B1, A2, B2, A3, B3, A4, B4, C1, and C<sup>2</sup> must satisfy the boundary conditions

∂2 Ψ5ð Þx <sup>∂</sup>x<sup>2</sup> <sup>¼</sup> qN<sup>5</sup> ε5

<sup>Ψ</sup>5ð Þ¼ <sup>x</sup> <sup>Ψ</sup>s5ð Þ¼ <sup>x</sup> qN<sup>5</sup>

<sup>Ψ</sup>s1ð Þ¼� �<sup>f</sup> kT

∂Ψs1ð Þ0

∂Ψs2ð Þa

∂Ψs3ð Þ b

∂Ψs4ð Þc

Ψs5ð Þ¼ d VDS þ

for the continuity of surface potential and electric field in the five regions:

apply 1-D Poisson's equation:

44 Design, Simulation and Construction of Field Effect Transistors

to get

$$\Psi\_{\rm ss} = -\frac{kT}{q} \ln\left(\frac{N\_s}{n\_{i2}}\right)$$

Using Eqs. (8) and (10), the lateral electric field for the five regions is given as

$$\mathbf{E}\_{\mathbf{x}i} = -\mathbf{k}\_{\mathbf{i}} \left( \mathbf{P}\_{\mathbf{i}} \mathbf{e}^{\mathbf{k}\times} - \mathbf{Q}\_{\mathbf{i}} \mathbf{e}^{-\mathbf{k}\times} \right),$$

for i = 1, 2, 3, 4 corresponding to regions I, II, III, or IV.

and

$$\mathbf{E\_{x5}} = -\left(\frac{\mathbf{qN\_5x}}{\varepsilon\_5} + \mathbf{C\_1}\right) \tag{13}$$

The vertical electric fields for the different regions are expressed using Eqs. (3) and Eq. (10) as

$$E\_{y^i} = -(a\_{1i} + 2a\_{2i}y) \tag{14}$$

for i = 1, 2, 3, 4 corresponding to regions I, II, III, or IV.

and

$$\mathbf{E\_{y5}} = \mathbf{0} \tag{15}$$

The drain current is calculated by integrating the band-to-band generation rate GBTBT over the volume of the device

$$I\_d = q \int G\_{BTBT}dV\tag{16}$$

where

$$G\_{BTBT} = A \frac{|E|^2}{\sqrt{E\_{Gi}}} \exp\left(-B \frac{E\_{Gi}^{1.5}}{|E|}\right) \tag{17}$$

where E ¼ ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi E2 <sup>x</sup> <sup>þ</sup> <sup>E</sup><sup>2</sup> y q

Figure 7. Variation of lateral electric field at the surface in the channel for different Ge-mole fractions.

#### 4.2. Validation of the analytical model

The developed analytical models are validated with simulation data from TCAD. Figure 7 shows the plot of lateral electric field at the surface of the UL-HTFET in the channel region for different Ge-mole fractions of the silicon-germanium layer, at VGS ¼ 1:2 V and VDS ¼ 0:7 V. It has been seen that the modeled values match with the simulated values of lateral electric field except that a small mismatch in the field is observed at the position in the channel where the gate-channel overlap terminates.

A plot of vertical electric field at the surface of the device versus horizontal position in the channel region is shown in Figure 8 for different values of Ge-mole fractions at a fixed drain voltage of 0.7 V and a gate voltage of 1.2 V. For all the cases, it has been observed that the modeled results closely approach the simulated results. The simulated vertical electric field is slightly different as compared to the modeled ones near the junction of silicon-germaniumsilicon in the channel region; however, at other positions in the channel, there is a close match

Figure 9. ID-Vgs characteristics at Ge-mole fraction equal to 0.5, gate voltage equal to 1.2 V, and drain voltage equal to

Band Gap Modulated Tunnel FET

47

http://dx.doi.org/10.5772/intechopen.76098

The variation of drain current with gate voltage has been computed and portrayed in Figure 9.

An algorithm for the extraction of threshold voltage in heterojunction TFET is presented in Figure 10 [17]. The algorithm uses the analytical model of Section 4 to plot multiple curves of surface potential versus position for different gate voltages and fixed drain voltage. The advantage of this algorithm is that the procedure is completely computational, and the threshold voltage can be determined without deriving the transfer characteristics. Moreover, the method can be extended to fit different threshold voltage extraction methods by changing the

The model takes into account the dependence of temperature. The method involves geometrical constructions on a plot of surface potential versus position and using mathematical param-

between the modeled and the simulated values of vertical electric field.

There is a close match between the model and the simulated data.

5. Dependence of threshold voltage on temperature

fitting parameter [17].

0.7 V.

eters to define a variable range\_point.

Figure 8. Variation of vertical electric field at the surface in the channel for different Ge-mole fractions.

Figure 9. ID-Vgs characteristics at Ge-mole fraction equal to 0.5, gate voltage equal to 1.2 V, and drain voltage equal to 0.7 V.

A plot of vertical electric field at the surface of the device versus horizontal position in the channel region is shown in Figure 8 for different values of Ge-mole fractions at a fixed drain voltage of 0.7 V and a gate voltage of 1.2 V. For all the cases, it has been observed that the modeled results closely approach the simulated results. The simulated vertical electric field is slightly different as compared to the modeled ones near the junction of silicon-germaniumsilicon in the channel region; however, at other positions in the channel, there is a close match between the modeled and the simulated values of vertical electric field.

The variation of drain current with gate voltage has been computed and portrayed in Figure 9. There is a close match between the model and the simulated data.
