**3. Toward green electronic devices**

Especially the Imagistics equipments that are extremely green with external environment, without wastes, without infected or contaminated rubbish, hardly interact with the human

The general purpose products of low energy consumption as refrigerators, washing machines, laptops, etc. of A, A+, A+++ energetic class have an extraordinary success on market, offering advantage in the user pocket, but also consuming small resources from earth. Therefore, the green electronics must accompany the household goods industry, to produce extremely low power consumption components. Obviously, nanodevices that consume few femto-Watts are

In the next sections, the integration technologies evolution and the electronic devices performances are selectively presented to meet these general green electronic demands. Some applications of nanomaterials cross over the electronic frontiers and provide multidisciplinary applications, briefly presented. Finally, some particular directions for the next future, in the

The nanotechnologies applied in integrated circuits give new challenge in nanometric scale structures, launching new applications or new components [13]. The traditional CMOS is more than nanoelectronics, passing rapidly from the 22 nm technology in 2012 to 10 nm technology in 2017 and toward 5 nm in 2020. Therefore, some authors claim that the future solutions require a diversification among nanocomponents, so that other devices than CMOS can restore or can be co-integrated together with CMOS circuitry to allow new functions, [14]. An extremely large palette of diversified devices is accomplished by the Silicon On Insulator (SOI) technologies [15]: from SOI-MOSFETs to radiation hardened circuits [16], up to micro-

The classical High Temperature Annealing Separation by IMplanted OXygen (HTA SIMOX) technology still offers clean SOI wafers with 200 nm Si-film on 400 nm buried oxide (BOX),

a thin oxide slice. Any SOI device possesses two interfaces: Si-film with BOX, and BOX with Substrate and thirdly the superior interface near gate oxide with Si-film, [18]. The classical model considers the electric charge included in first two interfaces, [15]. These fixed charges are spatially expanded inside a volume in oxide. In ultrathin SOI structures, consequently this

There are some distinct methods of the electrical characterization of the SOI products. If the studied SOI transistor has an uniform film, thicker than 200 nm, the classical method can be applied. In this case, the effect of the interface charges is modeled by the classical physics by

> *Qi*1 *εox*

<sup>⋅</sup> *xox* <sup>−</sup> \_\_\_\_\_\_ *Qox* 2 *εSi qNA*

, [15]. These charges are dispersed inside

(1)

body, exposing at increased risk after multiple imagistic tests [9].

of primary interest, [10–12].

4 Green Electronics

field of the green electronics, are presented.

machined NMEMS and sensors [17].

VFB−C, [19]:

**2. The integration technologies evolution**

and fixed interface charges of Qox = 1010÷1012 e/cm2

*VFB*−*<sup>C</sup>* <sup>=</sup> <sup>−</sup>\_\_\_

charges can be modeled by a surface charge density, [18].

Green electronic devices represent a new paradigm of recycling electronic nanodevices. Some revolutionary features are touched if bio-nanomaterials are used for integrated structures or combine organic semiconductors on organic insulators from non-toxic precursors for a green technological flow. Topic includes low voltage circuits and low size devices, recycling electronic bio-nanotechnologies, electronic re-conversion, solar cells as green energy provider and supra-capacitors as green accumulators and new solution of energy generation, coupled to almost zero electronic power consumption. Some devices reply to this demand, when we speak about Few—Electron Transistors or at limit the Single Electron Transistor that consumes current sub one electron per microsecond, possessing capacities sub 1atto-Farad, [22].

Some recent nanotechnologies could serve the green electronics purposes: Carbon Nano-Tube Field Effect Transistors (CNT-FET), [23], Nanowire-FETs, [24], Tunnel-FETs, Nanocore-shell technology for thin film transistors operated at 300 K temperature in white rooms, accompanied by low wastes by nanotechnologies, [25].

Also, the ULSI integrated circuits work at low voltages, providing low power consumption in electronics. Nanodevices with thin films or with one atomic layer exhibit confinement effects that decrease the conduction current. Currently the leading technology nodes are FinFET, [26] transistors that exploit raised inversion channels, multiplying the MOSFET capabilities.

**Figure 1.** A manufactured SOI nanotransistor with maximum 7 nm.

Sometimes the SOI device studies go to other aims: devices suitable for high temperature work regime, micro-nanosensors, [27], low power consumption, atypical SOI-MOSFET transistors, [28]. Other materials than Silicon on insulator were also intensively approached in the last period, (e.g. Germanium on oxides thin layers). The germanium growth is starting from the silicon seed and continues by wetting the SiO2 film, producing mono-crystalline layers [29].

limit. This cavity nanodevice is presented in **Figure 2** and can associate a green implementation technology, by undulated polysilicon film. In this case, just two high rectangular undulations of Silicon are preserved on the oxide layer. Therefore it was also called almost-NOI device, [33]. The substrate electrode acts as a back-gate terminal. Due to a vacuum distance

Introductory Chapter: Green Electronics Starting from Nanotechnologies and Organic…

Other recent research studies, in the field of the electron device with low power consumption, indicated an elevated interest for the pin devices as tunneling transistor or Tunnel-pin-FETs with extremely low sub-threshold slope, less than 60 mV/dec—the MOSFET physical limit, [36]. They are also based on the tunneling conduction mechanism, as a direct band to band tunneling, [37]. Other authors claimed in 2014 "Introducing the vacuum transistor: a device made of Nothing", "Transistorizing the Vacuum Tube", "A vacuum-channel transistor closely resembles an ordinary MOSFET", [38]. This NASA research group fabricated and measured a vacuum nanotransistor, [39]. However, this experimental device gets weaker performances (SS = 4 V/dec, VDS = 20 V) versus the simulated NOI characteristics, [40, 41] (SS = 650 mV/dec, VDS = 10 V). Obviously, the NOI nanotransistor has a similar work principle as these nanotran-

One direction in the organic thin film transistor (OTFT) optimization consists in alternative

A starting semiconductor of OTFT structure, suitable for optimization, is the pentacene. It posses the additional advantage to be already fully depicted inside the Atlas library. The simulated static characteristics prove the transistor effect, ensuring the drain current saturation, [42].

A special phenomenon observed by simulations is the volume conduction channel onset—a transport way that avoids interfaces vicinities, [43], **Figure 3a**. In an opposite manner, apply-

ing a low drain voltage, a weak conduction way occurs thru the channel, **Figure 3b**.

– source / n+

http://dx.doi.org/10.5772/intechopen.73312

– drain

7

under 4 nm (xc < 4 nm), the tunneling probability between the islands - n+

**Figure 2.** The conceptual architecture of the a-NOI nanotransistor sub-10 nm with a cavity.

sistors with vacuum that incited the international interest, [38].

**5. Nanomaterial, smart biomaterials and organic electronics**

OTFT technologies by new organic nanocomposites, selecting green routes.

significantly increases, [34, 35].

The Nothing On Insulator (NOI) transistor is another candidate to green electronic devices. Its technology can be rather based on room temperature processes. A sub-10 nm undulated polysilicon structure on insulator, [30] can be manufactured by the Secco etching that etches especially the boundaries of the polysilicon nanoclusters, providing nanoundulated films with top of 7 nm and valley of 3 nm thickness, **Figure 1**.

This undulation technology can be adapted for the NOI manufacturing, increasing the etching time, up to the Si valleys reaches the oxide. The NOI nanotransistor is a link device among vacuum transistors, SOI-MOSFETs, and Few Electron Transistors (FET), borrowing some characteristics from all of these, but being distinct.

In a mirror relation there is placed another representative of the SOI limit devices: the Silicon On Nothing transistor made by special etching techniques of the Si-membrane, [31].
