**3. Fabrication technology for electrostatically actuated RF-MEMS switches**

#### **3.1. RF-MEMS technology platform**

for the symmetric CPW-to-slotline transition is that of **Figure 4(b)**. As can be seen, a multimodal circuit model confines the contributions of each mode present in a transition into a different port.

Suppose an impedance connects the two outer CPW strips as shown in **Figure 5(a)**. This circuit can model an air bridge (a conducting wire connecting the two outer CPW strips, with an impedance *Z* = 0 ideally), but also more complicated situations. The even mode does not interact with the impedance since the two outer CPW conductors have the same even-mode electric potential. Therefore, the impedance behaves as a shunt impedance for the odd mode, and it is transparent to the even mode. Thus, its circuit model is that of **Figure 5(b)**. As can be seen, an air bridge (*Z* = 0) blocks the propagation of the odd mode by short-circuiting it. By controlling the value of *Z*, for instance, by means of MEMS switches, the amount of odd mode that propagates from the left side of the CPW to the right one can be controlled without

In the two previous examples, the even and odd modes behaved in a different way at the analyzed transitions but did not interact between them due to the symmetry of the transitions. When the transitions are asymmetric, as it is the case for the asymmetric shunt impedances connecting the strips of the CPW shown in **Figure 6(a)**, the modes interact between them. The behavior of this transition is not obvious, but it can be rigorously modeled by the circuit shown in **Figure 6(b)** [37]. As can be seen, in this case, there is an energy balance between even and odd modes (there is a circuit connection between the even- and odd-mode ports), provided that the impedances *ZA* and *ZB* are different. Again, by controlling the values of *ZA* and *ZB* by means of MEMS switches, the amount of energy transfer among modes can be controlled. This transition and other described in [38–40] are the base for building multimodal

*2.2.2. Impedances connecting the two outer CPW strips and air bridges*

uniplanar reconfigurable circuits [6, 9–11, 58] using MEMS switches.

**Figure 5.** (a) Impedances connecting the two outer CPW strips. (b) Multimodal circuit model.

affecting the propagation of the even mode.

122 MEMS Sensors - Design and Application

*2.2.3. Asymmetric shunt impedances in a CPW*

A flexible technology platform has been developed and optimized at the FBK Institute (Trento, Italy) for the fabrication of RF-MEMS. Basic components (like low-loss CPW, microstrip line and slotline, ohmic [41, 42] and capacitive [43, 44] switches, variable capacitors and inductors) can be integrated in complex reconfigurable RF circuits. Many kinds of devices were produced, mainly for space and communication application, like switching matrices [45, 46], tunable and switchable phase shifters [47], reconfigurable antennas, impedance matching networks [48], VCOs [49, 50], and tunable filters. Depending on the used substrate, highresistivity silicon (<40 GHz), or fused quartz (>40 GHz), the working frequency range spans from sub-GHz up to more than 100 GHz.

The base process requires eight lithography masks but, depending on the requirements, it can easily be expanded to deposit and pattern metal on the wafer backside to realize microstrip lines or antennas and to obtain devices suspended over thin membranes by locally removing the substrate. A wafer-to-wafer or a cap-to-die-bonding module is also available to encapsulate the delicate MEMS moving parts [51].

RF signal lines and ground area are made of thick electroplated gold to reduce insertion losses while actuation electrodes and DC-bias signal lines are made of a high-resistivity polysilicon to minimize coupling with adjacent RF lines. The movable and suspended structures of the electrostatically actuated switches, which can be either cantilevers or clamped-clamped beams, are made by gold deposited over a sacrificial photoresist layer having the thickness of the required air gap, while switch underpass lines and other conductors are made of a thin Al film. On ohmic-contact switches, the gold-to-gold contact area is defined by underneath polysilicon protruding dimples to ensure a repeatable contact force and a uniform and reproducible low contact resistance. On capacitive-contact switches, the contact capacitor is made by depositing a thin silicon oxide dielectric and an upper floating metal (FLOMET) electrode over the metal underpass line, obtaining a very well-defined and reproducible metal insulator metal (MIM) capacitor. In this way, when the switch-movable membrane is in an up position, the capacitance, due mainly to the air gap, is small while when it is actuated, the membrane contacts the top floating metal electrode, and the capacitance is defined by the MIM capacitor and not by the membrane itself. In this way, the switch is much more repeatable than the usual configuration, where the movable membrane directly touches the dielectric and the capacitance is strongly influenced by both the membrane deformations and surface roughness leading to a capacitance value much lower than the designed one.

For all the switch configurations, the actuation electrodes are separated from the contact area. This makes it possible to optimize them independently to sustain the high actuation voltage (up to 100 V) and reducing the charging phenomena. It is possible either to use a thicker dielectric over polysilicon to limit the electric field or better to use a dielectric-free configuration removing all the dielectric and using a matrix of mechanical stoppers to prevent short circuits. The height of the stoppers has to be designed in order to obtain an air gap between movable bridges and electrodes which is thick enough for isolation at the bias voltage used.

#### **3.2. Fabrication process**

The basic fabrication process for silicon substrate is reported in [20, 52] and illustrated in **Figure 7**, where a schematic cross section of an ohmic switch is represented. For highfrequency devices, the losses of the silicon are too high and quartz (fused silica) is preferred. Only minor adjustments are required to process transparent substrates.

A photoresist sacrificial layer (spacer) is lithographically defined under movable structures and suspended air bridges because later it can be easily removed by oxygen plasma to form an air gap (**Figure 7(e)**). To make the RF structures, a conductive seed layer of 2.5 nm of Cr and 25 nm of Au is deposited by e-beam, patterned using thick AZ 4562 positive resist, and a 1.8-μm-thick first gold layer (bridge) having a slightly tensile residual stress is selectively grown by electroplating (**Figure 7(f)**). A second 3.5-μm-thick gold layer (CPW) is then defined by AZ 4562 and electroplated. The thinner Au bridge layer is used to make the suspended and movable structure while both layers are superimposed to obtain thicker low resistance signal lines and ground areas. To better control the deformation of the movable parts of the switch, it is possible to use the bridge layer for deformable suspension legs and bridge plus CPW layer for a stiffer main body that moves rigidly, almost without deformations. This concept is applied in the fabricated devices, described in Section 5. To complete the fabrication, the seed layer is removed by wet etching, and the suspended structures are released by removing the

RF-MEMS Switches Designed for High-Performance Uniplanar Microwave and mm-Wave Circuits

http://dx.doi.org/10.5772/intechopen.76445

125

**Figure 7.** Depiction of the fabrication process flow on a schematic ohmic-switch cross section.

**4. Electromechanical models for electrostatically actuated RF-MEMS** 

Mechanical design plays an important role in the RF behavior of MEMS switches because it couples important parameters such as the required actuation voltage (also called pull-in voltage, *Vpull-in*), actuation time, release time, and the appearance of a bouncing phenomenon after release, which delays a complete release of the switch. The pull-in voltage is commonly calculated assuming a static mechanical behavior in RF-MEMS switches. For compatibility of RF-MEMS with low-voltage CMOS and BiCMOS technologies [14], charge-pump techniques are often used [53]. Nonetheless, a current trend is to decrease the MEMS high *Vpull-in*, because charge pump has some limitations given the ever-reducing voltages in CMOS and BiCMOS [54].

spacer underneath by an oxygen plasma (**Figure 7(g)**).

**switches: energy considerations**

The fabrication process starts with the oxidation of the high-resistivity (>5000 Ω·cm) 150-mm diameter silicon wafers in order to obtain a 1-μm-thick silicon oxide isolation layer. A 630 nm thick layer of polysilicon is then deposited by low-pressure chemical vapor deposition (LPCVD) and doped by ion implantation to obtain a sheet resistance of about 1600 Ω/sq. The polysilicon structures are defined by lithography and dry etching using chlorine-based gas plasma, and the residual photoresist is removed by an oxygen plasma (**Figure 7(a)**). An annealing at 925°C for 1 h in nitrogen atmosphere is required to diffuse and to electrically activate the B ions. To electrically isolate the polysilicon, 300 nm of silicon dioxide is deposited by LPCVD at 718°C (TEOS). When a backside conductive layer is required for microstrip lines or devices like phased array antennas, an aluminum film is sputtered and patterned on the wafer backside. The process continues on the front side with a lithography and dry etching to open holes in the TEOS layer for contacting the underneath polysilicon (**Figure 7(b)**). To realize connection lines, a conductive metal consisting of Ti/TiN diffusion barrier and Al1%Si is sputtered and patterned by dry etching (**Figure 7(c)**). The total thickness is the same as that of polysilicon to minimize distortion of the switch bridges crossing over both metal underpass and polysilicon actuation electrodes. A 100-nm thick SiO2 deposited by PECVD is used as dielectric for capacitive contacts as well as for metal isolation. Holes in the oxide (vias) are realized by lithography and dry etching to contact the underneath metal and for the dielectric-free actuation electrodes (**Figure 7(d)**).

To realize the bottom part of the gold-to-gold contacts of ohmic switches as well as an electrically floating metal layer for capacitive-contact switches, a 5-nm Cr adhesion layer and 150-nm Au are deposited by an electron beam gun, patterned and wet etched (**Figure 7(d)**).

RF-MEMS Switches Designed for High-Performance Uniplanar Microwave and mm-Wave Circuits http://dx.doi.org/10.5772/intechopen.76445 125

**Figure 7.** Depiction of the fabrication process flow on a schematic ohmic-switch cross section.

over the metal underpass line, obtaining a very well-defined and reproducible metal insulator metal (MIM) capacitor. In this way, when the switch-movable membrane is in an up position, the capacitance, due mainly to the air gap, is small while when it is actuated, the membrane contacts the top floating metal electrode, and the capacitance is defined by the MIM capacitor and not by the membrane itself. In this way, the switch is much more repeatable than the usual configuration, where the movable membrane directly touches the dielectric and the capacitance is strongly influenced by both the membrane deformations and surface rough-

For all the switch configurations, the actuation electrodes are separated from the contact area. This makes it possible to optimize them independently to sustain the high actuation voltage (up to 100 V) and reducing the charging phenomena. It is possible either to use a thicker dielectric over polysilicon to limit the electric field or better to use a dielectric-free configuration removing all the dielectric and using a matrix of mechanical stoppers to prevent short circuits. The height of the stoppers has to be designed in order to obtain an air gap between movable bridges and electrodes which is thick enough for isolation at the bias voltage used.

The basic fabrication process for silicon substrate is reported in [20, 52] and illustrated in **Figure 7**, where a schematic cross section of an ohmic switch is represented. For highfrequency devices, the losses of the silicon are too high and quartz (fused silica) is preferred.

The fabrication process starts with the oxidation of the high-resistivity (>5000 Ω·cm) 150-mm diameter silicon wafers in order to obtain a 1-μm-thick silicon oxide isolation layer. A 630 nm thick layer of polysilicon is then deposited by low-pressure chemical vapor deposition (LPCVD) and doped by ion implantation to obtain a sheet resistance of about 1600 Ω/sq. The polysilicon structures are defined by lithography and dry etching using chlorine-based gas plasma, and the residual photoresist is removed by an oxygen plasma (**Figure 7(a)**). An annealing at 925°C for 1 h in nitrogen atmosphere is required to diffuse and to electrically activate the B ions. To electrically isolate the polysilicon, 300 nm of silicon dioxide is deposited by LPCVD at 718°C (TEOS). When a backside conductive layer is required for microstrip lines or devices like phased array antennas, an aluminum film is sputtered and patterned on the wafer backside. The process continues on the front side with a lithography and dry etching to open holes in the TEOS layer for contacting the underneath polysilicon (**Figure 7(b)**). To realize connection lines, a conductive metal consisting of Ti/TiN diffusion barrier and Al1%Si is sputtered and patterned by dry etching (**Figure 7(c)**). The total thickness is the same as that of polysilicon to minimize distortion of the switch bridges crossing over both metal under-

as dielectric for capacitive contacts as well as for metal isolation. Holes in the oxide (vias) are realized by lithography and dry etching to contact the underneath metal and for the dielec-

To realize the bottom part of the gold-to-gold contacts of ohmic switches as well as an electrically floating metal layer for capacitive-contact switches, a 5-nm Cr adhesion layer and 150-nm Au are deposited by an electron beam gun, patterned and wet etched (**Figure 7(d)**).

deposited by PECVD is used

ness leading to a capacitance value much lower than the designed one.

Only minor adjustments are required to process transparent substrates.

pass and polysilicon actuation electrodes. A 100-nm thick SiO2

tric-free actuation electrodes (**Figure 7(d)**).

**3.2. Fabrication process**

124 MEMS Sensors - Design and Application

A photoresist sacrificial layer (spacer) is lithographically defined under movable structures and suspended air bridges because later it can be easily removed by oxygen plasma to form an air gap (**Figure 7(e)**). To make the RF structures, a conductive seed layer of 2.5 nm of Cr and 25 nm of Au is deposited by e-beam, patterned using thick AZ 4562 positive resist, and a 1.8-μm-thick first gold layer (bridge) having a slightly tensile residual stress is selectively grown by electroplating (**Figure 7(f)**). A second 3.5-μm-thick gold layer (CPW) is then defined by AZ 4562 and electroplated. The thinner Au bridge layer is used to make the suspended and movable structure while both layers are superimposed to obtain thicker low resistance signal lines and ground areas. To better control the deformation of the movable parts of the switch, it is possible to use the bridge layer for deformable suspension legs and bridge plus CPW layer for a stiffer main body that moves rigidly, almost without deformations. This concept is applied in the fabricated devices, described in Section 5. To complete the fabrication, the seed layer is removed by wet etching, and the suspended structures are released by removing the spacer underneath by an oxygen plasma (**Figure 7(g)**).
