**4. Conclusions**

A memory architecture has been proposed in this chapter. From the analysis of static noise margin (SNM) for SRAM cell, it could be concluded that the SRAM 8T cell has a higher SNM than the SRAM 6T and SRAM 11T, that is, SRAM 8T cell has a greater noise tolerance. The only drawback of the SRAM 8T and SRAM 11T is the area overhead over the SRAM 6T cell. In order to reduce this area overhead, DRAM-based memory systems are being used. Different types of DRAM cell structures have been used in the study. A novel structure using P-type-gated diode-based capacitor has been utilized in this work. The average power consumption for the structure is lower than those being implemented in the study. A significant reduction in both write and read access time has been achieved when the structure is compared with a similar structure. Area layout for the structure shows the reduction in the area overhead compared to the other implemented designs. A full memory subsystem implementation depicts the working of the architecture in practical working environment, achieving greater results. The memory subsystem implemented could successfully store 16 bits of data and the saved data could also be read effectively.
