**3. Multimodule converters and synthesis of the quasi-sinusoidal output voltage**

Multimodule multilevel converters (**Figure 4**) have their outputs connected in series to produce the so-called modified sinusoidal voltage or ladder-style voltage (**Figure 5**). DC inputs may be connected in parallel with the transformer combining the output voltages or in series for HVDC

**Figure 4.** Multimodule converters with different DC line feeds.

parallel to the same bus V0

**Figure 6.** Two module converter.

according to the module maximum voltage rating).

monics *n* satisfying the following requirement:

= \_\_

with THD requirements or other special conditions [26–31].

(c = *m*-1) of the modules and set *Φ* of harmonic canceling delays *φ* = π/n:

or in series (this is used for HVDC lines to share input DC voltage

Sequential Selective Harmonic Elimination and Outphasing Amplitude Control...

http://dx.doi.org/10.5772/intechopen.72198

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*<sup>n</sup>* (4)

To simplify analysis two identical modules are connected to the same DC bus, and their outputs are connected in series using two ideal output transformers TX1 and TX2 with transformer ratio 1:1 (**Figure 6**). The output voltages have identical amplitude and 50% duty cycle, and their relative position in time domain (delay or phase shift) is defined by the controller (not shown). The relative phase shift (relative to the fundamental harmonic) equal to π/3 or 1/6 of the module operation period is shown in **Figure 7**. For the third harmonic, the relative phase shift is π, and combined output signal has the third harmonics subtracted or eliminated. All other odd harmonics like 9th, 15th, 21st, 27th, etc., which are multiples of three, are eliminated too. Two identical periodic signals being combined with the phase shift *Φ* have eliminated har-

Two module output voltages shifted π/3 and combined output without 3rd, 9th, etc. harmonics are shown in **Figure 8**. When two signals with eliminated 3rd harmonic are added with phase shift π/5, their combined voltage has eliminated the 5th harmonic and also 15th, 25th, etc. To eliminate the fifth and seventh harmonics, this process should be repeated as shown in **Figure 9** where control signals to a set of eight modules are getting additional delay starting from sync pulse. This process may be continued to eliminate enough harmonics to comply

Total delays (or phase shift) *αm* per module *m* of a set of modules *M* (**Figure 9**) may be calculated as scalar product of matrix *C* formed by assigned to each module *m* binary numbers

*<sup>m</sup>* = [*cm*] · [] (5)

**Figure 5.** Forming ladder-style voltage using PWM (left) and phase shift only (right).

converters or be floating, for example, powered from the photovoltaic batteries, depending upon the application. Each module operates with high efficiency producing rectangular pulses with controlled timing. The control algorithm for timing calculations is a subject of this analysis.

Commonly used control algorithms are based on the pulse-width modulated signals to control multiple modules. The module output voltages are added in series to form the ladder-style voltage with optimized width of each pulse to eliminate harmonics and to regulate output voltage as shown in **Figure 5** (left). The discussed method was developed to operate the identical modules, producing 50% duty cycle pulses with the fundamental frequency and equal amplitude, combining their outputs in series and controlled by the phase shift only (**Figure 5**, right).

Equal ON and OFF time operation of all power switches has the following advantages:

