**3. Electrical overstress (EOS)**

where the n-cathode is the n-diffusion implant of the n-channel MOSFET device, or the n+/n-well implant and the p-anode is the p-well region or p-substrate region connected to the power supply VSS. This is sometimes referred to as the "down diode." This circuit provides a "forward bias" ESD protection solution for positive and negative ESD pulse events to the two power rails VDD and VSS. An advantage of the dual-diode ESD network is that it is easily to migrate from technology generation to technology generation. In shallow trench isolation (STI) technology, this structure is scalable. A second advantage is that it has a low turn-on voltage of 0.7 V. A third advantage is that it can be designed with low capacitance, making it suitable for CMOS, advanced CMOS, and RF technologies. A fourth

advantage is that it does not contain MOSFET gate dielectric failure mechanisms.

**2.2. Charged device model (CDM)**

12 System of System Failures

form measurement process.

*An example of a signal pin ESD network consisting of a grounded gate n-channel MOSFET device [3]. The grounded gate NMOS (also referred to as GGNMOS) ESD network is a commonly used network for complimentary metal oxide semiconductor (CMOS) technology. Typically, it is a n-channel MOS-FET whose MOSFET drain is connected to the signal pin, and whose MOSFET source and gate are connected to the ground power rail. This circuit remains "off" in normal operation. When the signal pin exceeds the MOSFET snapback voltage, this circuit discharges to the VSS power rail. When the signal pin is below the ground potential, the MOSFET drain forward biases to the p-well or p-substrate region. An advantage of the GGNMOS ESD network is that it is a natural scalable solution. As the technology scales, the MOSFET snapback voltage reduces, leading to an earlier turn-on of the MOSFET.*

The charged device model is an electrostatic discharge (ESD) test method that is part of the qualification of semiconductor components [4]. The charged device model (CDM) standard is supported by ESD Association as ANSI/ESD ESD-STM5.3.1-1999 [12]. Presently, there are four CDM test standard (ESDA S5.3.1, JEDEC JESD22-C101, AEC-Q100-011 Rev. C, and JEITA ED-4701-300). Each require different test platform, testing, waveform, and calibration requirements [4]. The charged device model (CDM) event is associated with the charging of the semiconductor component substrate and package. The charging of the package occurs through direct contact charging,

or field-induced charging process (e.g. the field-induced charge device model (FICDM)).

There is presently an effort to align the CDM standards between the ESD Association and the JEDEC organization, by establishing a joint ESDA/JEDEC standard. The ESDA/JEDEC joint standard (JS-002 2014) will replace existing CDM ESD standards JEDS22-C101 and ANSI/ESD S5.3.1. The new joint standard will preserve test systems in the field, and improve the wave-

The charged device model (CDM) pulse is regarded as the fastest event of all the ESD events [4, 12–15]. Note that the CDM pulse waveform is influenced by the test platform and measurement metrology. The test platform is influenced by the field plate, field plate dielectric thickness and material type, and the probe assembly (e.g. test head, and ground plane). The

First, the event is oscillatory. The CDM current pulse rise time is on the order of 250 ps, and with peak currents in the range of 10 A. The energy spectrum of the CDM pulse event extends to 5 GHz frequency. The CDM pulse waveform has a fast current pulse. The time scale of the CDM event is significantly lower than the thermal diffusion time; hence CDM events are in

metrology is influenced by the oscilloscope and verification module specifications.

the "adiabatic regime" of a Wunsch-Bell power-to-failure curve [4].

Electrical overstress (EOS) has been an issue in devices, circuit and systems for electronics for many decades, as early as the 1970s, and continues to be an issue today [1]. EOS failures are occurring at the device manufacturer, supplier, assembly and the field. In the electronic industry, many products and applications are returned from the field due to "EOS" failure. To make progress in addressing the electrical overstress (EOS) issue, it is important to provide a framework for evaluation and analysis of EOS phenomena.

Electrical overstress (EOS) sources exist from natural phenomena, and power distribution [1, 14–25]. Switches, cables, and other power electronics that can be a source of electrical overstress. EOS sources exist in devices, circuits and systems. In the following sections, these issues will be discussed [1].

## **3.1. EOS design issues**

Many of the electrical overstress (EOS) issues can occur from the design of the semiconductor component, the system and its integration. Examples of EOS source design issues are as follows [1]:

> Field returns occur in all electronic components independent of the technology generation and period of time of evaluation. One of the key difficulties in the semiconductor industry is

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EOS events do not have a characteristic time response. EOS events are typically slower, and distinguishable from ESD events by having longer characteristic times. The time constant for

Electrical over-voltage (EOV), electric over-current (EOC), and electrical over-power (EOP) can lead to failure mechanisms; these can lead to melted packages, blown single component capacitors and resistors, ruptured packages, blown bond wires, cracked dielectrics, fused and

Visual external or internal inspection can be applied to evaluate EOS failure mechnanisms.

the ability to track, record and maintain a database of these field failures.

EOS events range from sub-microseconds to seconds.

The failure analysis process can comprise of the following steps:

melted metal layers, and molten silicon.

• Failure site identification and localization.

Visual damage signatures can include the following:

• Information gathering. • Failure verification.

**Figure 2.** Safe operating area (SOA).

• Root cause determination. • Feedback of root cause.

• Documentation reports.

**3.2. EOS failure mechanisms**

• Corrective action.


**Figure 2** illustrates the safe operating area (SOA) of a semiconductor device. There is a current limit, and a voltage limit on the borders of the SOA. At the corner of the SOA, the limitation is a thermal limit, and a second breakdown limit. Thermal limit has to do with the thermal limit of a device. The second breakdown limit has to do with second breakdown or thermal breakdown limit.

Testing and test simulation of devices, components and systems are an important part of the evaluation to electrical overstress (EOS) [4]. EOS test simulation is valuable part of understand EOS failures. EOS testing provides [1, 4]:


System and Component Failure from Electrical Overstress and Electrostatic Discharge http://dx.doi.org/10.5772/intechopen.72677 15

**Figure 2.** Safe operating area (SOA).

industry, many products and applications are returned from the field due to "EOS" failure. To make progress in addressing the electrical overstress (EOS) issue, it is important to provide

Electrical overstress (EOS) sources exist from natural phenomena, and power distribution [1, 14–25]. Switches, cables, and other power electronics that can be a source of electrical overstress. EOS sources exist in devices, circuits and systems. In the following sections, these

Many of the electrical overstress (EOS) issues can occur from the design of the semiconductor component, the system and its integration. Examples of EOS source design issues are as

**Figure 2** illustrates the safe operating area (SOA) of a semiconductor device. There is a current limit, and a voltage limit on the borders of the SOA. At the corner of the SOA, the limitation is a thermal limit, and a second breakdown limit. Thermal limit has to do with the thermal limit of a device. The second breakdown limit has to do with second breakdown or thermal

Testing and test simulation of devices, components and systems are an important part of the evaluation to electrical overstress (EOS) [4]. EOS test simulation is valuable part of under-

a framework for evaluation and analysis of EOS phenomena.

• Semiconductor process - application mismatch.

• Safe operating area (SOA) power rating violation. • Safe operating area (SOA) voltage rating violation. • Safe operating area (SOA) current rating violation.

• Transient safe operating area - di/dt and dv/dt.

stand EOS failures. EOS testing provides [1, 4]:

• Printed circuit board (PCB) inductance. • Printed circuit board (PCB) resistance.

issues will be discussed [1].

**3.1. EOS design issues**

14 System of System Failures

• Latchup sensitivity [5].

breakdown limit.

• Root cause analysis.

• Replication of failure signature.

• Technology benchmarking.

• System qualification.

• Technology EOS hardness evaluation.

• Component reliability qualification.

follows [1]:

Field returns occur in all electronic components independent of the technology generation and period of time of evaluation. One of the key difficulties in the semiconductor industry is the ability to track, record and maintain a database of these field failures.

EOS events do not have a characteristic time response. EOS events are typically slower, and distinguishable from ESD events by having longer characteristic times. The time constant for EOS events range from sub-microseconds to seconds.

Electrical over-voltage (EOV), electric over-current (EOC), and electrical over-power (EOP) can lead to failure mechanisms; these can lead to melted packages, blown single component capacitors and resistors, ruptured packages, blown bond wires, cracked dielectrics, fused and melted metal layers, and molten silicon.

The failure analysis process can comprise of the following steps:


#### **3.2. EOS failure mechanisms**

Visual external or internal inspection can be applied to evaluate EOS failure mechnanisms. Visual damage signatures can include the following:


Visual damage can also be evaluated from internal inspection. For internal inspection, the following visual damage signatures are:

these devices can be referred to as "voltage clamp" devices where dI/dV remains positive for all states; for the second group, there exists a region where dI/dV is negative. The first group can be classified as "voltage clamp devices" whereas the second group can be referred to as an "S-type I-V characteristic device", or as a "snapback device." In the classification of voltage suppression devices, the second classification can be associated with the directionality; a voltage suppres-

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The choice of electrical overstress (EOS) device to use in an application is dependent on the electrical characteristics, cost, and size. The electrical characteristics that are of interest are the

The types of voltage suppression devices used electrical overstress (EOS) are Transient Voltage Suppression (TVS) Diodes [22], Thyristor devices, Varistor devices [21], Polymer

Current-limiting devices can be used in a series configuration for electrical overstress (EOS)

The choice of the current-limiting EOS protection device is a function of the cost, size, rated

Diodes are uni-directional type EOS structure, but can be utilized in a forward or reverse breakdown mode of operation for a voltage limiting EOS solution [1]. Schottky diodes are also commonly used uni-directional electrical overstress (EOS) protection device [1]. Schottky diodes have a forward conduction state, and reverse blocking state. Schottky diodes have a lower forward turn-on (e.g. 0.35 V) compared to standard silicon p-n junction (e.g. 0.7 V). For electrical overstress, Schottky diodes are mounted on printed circuit board (PCB) by soldering in the leads through vias, or surface mount. Schottky diodes are not as commonly used within components to provide electrostatic discharge (ESD) protection due to lack of availability. Schottky diodes are uni-directional type EOS structure, but can be utilized in a forward or reverse breakdown mode of operation for a voltage limiting EOS solution. Zener diodes are

Zener diodes are used for electrostatic discharge (ESD) protection for high voltage and power applications. Zener diodes are not used for ESD protection for low voltage CMOS applications. For electrical overstress (EOS) single component Zener diodes are mounted on printed circuit board (PCB) through vias, or surface mount. Zener diodes are uni-directional type EOS

also used as a uni-directional electrical overstress (EOS) protection device [1].

t value, rated voltage, voltage drops, and application requirements.

Voltage Suppression (PVS) devices, and Gas Discharge Tube (GDT) devices [23].

protection. EOS current-limiting devices can be as follows [16–24]:

sion device can be "uni-directional" or "bidirectional."

breakdown voltage, and the forward conduction [1].

• Positive temperature coefficient (PTC) devices.

• Resistors.

• eFUSE.

• Resetting fuses.

• Circuit breakers.

current, time response, I2

• Non-resetting fuses.


There are certain categories of failures that electrostatic discharge (ESD) does not typically cause, and EOS events do cause. Failures that typically are caused by EOS phenomena but not ESD are as follows [1]:


Today, electrical overstress (EOS) is still an issue in today's electronic systems. To address electrical overstress in systems, electrical overstress (EOS) protection device are added to printed circuit boards (PCB), cards, and systems. The integration of EOS protection devices into systems.

#### **3.3. EOS protection devices**

Electrical overstress (EOS) protection devices are supported by a large variety of technologies. Although material and operation may differ between the EOS protection devices, their electrical characteristics can be classified into a few fundamental groups [16–25].

EOS protection networks can be identified as a voltage suppression device, or as a current-limiting device. The voltage suppression device limits the voltage observed on the signal pins or power rails of a component, preventing electrical over-voltage (EOV). The current-limiting device prevents a high current from reaching sensitive nodes, avoiding electrical over-current (EOC) [1].

Voltage suppression devices can also be sub-divided into two major classifications [1]. Voltage suppression devices can be segmented into devices that remain with a positive differential resistance, and those that undergo a negative resistance region. For positive differential resistance, these devices can be referred to as "voltage clamp" devices where dI/dV remains positive for all states; for the second group, there exists a region where dI/dV is negative. The first group can be classified as "voltage clamp devices" whereas the second group can be referred to as an "S-type I-V characteristic device", or as a "snapback device." In the classification of voltage suppression devices, the second classification can be associated with the directionality; a voltage suppression device can be "uni-directional" or "bidirectional."

The choice of electrical overstress (EOS) device to use in an application is dependent on the electrical characteristics, cost, and size. The electrical characteristics that are of interest are the breakdown voltage, and the forward conduction [1].

The types of voltage suppression devices used electrical overstress (EOS) are Transient Voltage Suppression (TVS) Diodes [22], Thyristor devices, Varistor devices [21], Polymer Voltage Suppression (PVS) devices, and Gas Discharge Tube (GDT) devices [23].

Current-limiting devices can be used in a series configuration for electrical overstress (EOS) protection. EOS current-limiting devices can be as follows [16–24]:

• Resistors.

• Package lead damage.

• Package discoloration.

• Melted metallurgy.

not ESD are as follows [1]:

• Package molding damage.

**3.3. EOS protection devices**

• Package pin damage. • Wire bond damage.

into systems.

• Molten silicon.

lowing visual damage signatures are:

• Printed circuit board (PCB) damage.

• Cracked inter-level dielectrics.

Visual damage can also be evaluated from internal inspection. For internal inspection, the fol-

There are certain categories of failures that electrostatic discharge (ESD) does not typically cause, and EOS events do cause. Failures that typically are caused by EOS phenomena but

Today, electrical overstress (EOS) is still an issue in today's electronic systems. To address electrical overstress in systems, electrical overstress (EOS) protection device are added to printed circuit boards (PCB), cards, and systems. The integration of EOS protection devices

Electrical overstress (EOS) protection devices are supported by a large variety of technologies. Although material and operation may differ between the EOS protection devices, their electri-

EOS protection networks can be identified as a voltage suppression device, or as a current-limiting device. The voltage suppression device limits the voltage observed on the signal pins or power rails of a component, preventing electrical over-voltage (EOV). The current-limiting device prevents a high current from reaching sensitive nodes, avoiding electrical over-current (EOC) [1]. Voltage suppression devices can also be sub-divided into two major classifications [1]. Voltage suppression devices can be segmented into devices that remain with a positive differential resistance, and those that undergo a negative resistance region. For positive differential resistance,

cal characteristics can be classified into a few fundamental groups [16–25].

• Foreign material.

16 System of System Failures

• Cracks.

• Corrosion.


The choice of the current-limiting EOS protection device is a function of the cost, size, rated current, time response, I2 t value, rated voltage, voltage drops, and application requirements.

Diodes are uni-directional type EOS structure, but can be utilized in a forward or reverse breakdown mode of operation for a voltage limiting EOS solution [1]. Schottky diodes are also commonly used uni-directional electrical overstress (EOS) protection device [1]. Schottky diodes have a forward conduction state, and reverse blocking state. Schottky diodes have a lower forward turn-on (e.g. 0.35 V) compared to standard silicon p-n junction (e.g. 0.7 V). For electrical overstress, Schottky diodes are mounted on printed circuit board (PCB) by soldering in the leads through vias, or surface mount. Schottky diodes are not as commonly used within components to provide electrostatic discharge (ESD) protection due to lack of availability. Schottky diodes are uni-directional type EOS structure, but can be utilized in a forward or reverse breakdown mode of operation for a voltage limiting EOS solution. Zener diodes are also used as a uni-directional electrical overstress (EOS) protection device [1].

Zener diodes are used for electrostatic discharge (ESD) protection for high voltage and power applications. Zener diodes are not used for ESD protection for low voltage CMOS applications. For electrical overstress (EOS) single component Zener diodes are mounted on printed circuit board (PCB) through vias, or surface mount. Zener diodes are uni-directional type EOS structure, but can be utilized primarily in reverse breakdown mode of operation for a voltage limiting EOS solution.

One of the disadvantages of the GDT devices is the slow turn-on times typically in the micro-seconds. An example of some of the electrical characteristics can exhibit d.c. breakdown from 75 to 600 V, with a single surge response of 40 kA in 10–20 s, or multiple surges of magnitude of 20 kA. The electrical circuit breaker is used in industrial, commercial, and residential electrical systems for high currents. Electrical circuit breakers have issues of physical size, weight, cost, and time response. Circuit breakers can be used to protect household appliances, and large scale switchgear high voltage circuits. The circuit breaker is an electrical switch designed for the purpose of electrical over-current events, short circuits, or fault detection. Circuit breakers are typically "tripped" by the high current event, and can be manually reset. The concept of

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A class of circuit breakers is the thermal-magnetic circuit breaker [1]. Thermal-magnetic circuit breakers are used to avoid "short-circuit" currents. Thermal-magnetic circuit breakers are sensitive to temperature. Thermal-magnetic circuit breakers contain a bi-metal switch and an electromagnet. The bi-metal switch provides over-current protection. During current over-load, the bi-metal switch heats up, leading to bending of the element. The electromagnet

Power controllers are used for low power and low voltage applications; power controllers typically are low voltage high efficiency products that can carry amperes of current per channel. Buck-converters use over-current protection logic and networks; over-current functions protect the switching converter from an output short by monitoring current flow in the application. Hence, in power applications, it is possible to integrate electrical over-voltage (EOV) and electrical over-current (EOC) within a component design. Many analog and power applications also contain thermal protection networks as well to avoid thermal runaway and EOS damage.

Future challenges exist in improve reliability and safety in components and systems due to electrostatic discharge (ESD) and electrical overstress (EOS). Challenges include the following:

• Maintaining chip and system level performance objectives without lowering of ESD and

In conclusion, ESD and EOS failures occur in devices, components and systems in electronics in the past, and in the future with the introduction of both single component to VLSI technology.

• Achieving EOS and ESD standards protection levels in future technology generations.

• Electronic system failure from CMOS latchup in scaled future technology.

• Electronic system failure from overheating in handheld and portable devices.

the circuit breaker was invented by Charles Grafton Page, in 1836 [17].

responds to short-circuit currents [1].

**4. Challenges in the future**

EOS protection levels.

**5. Conclusions**

Zener diodes are used uni-directional electrical overstress (EOS) protection device. Zener diodes are typically used as a voltage clamping EOS protection device, and typically used in the breakdown state. Schottky and Zener diodes can both be integrated into a given application.

An EOS protection device used for high voltages is the varistor. A varistor is also known as a voltage dependent resistor (VDR). The varistor element behaves like a diode, forming a nonlinear current-voltage (I-V characteristic).

Another EOS protection device is the metal oxide varistor (MOV) device; this is the most common varistor composition [1, 21]. Zinc oxide, combined with other metal oxides are integrated between two metal electrodes. Metal oxide varistors can also include bismuth, cobalt, and manganese. The operation of the MOV device is based on conduction through ZnO grains; current flows "diodelike" through the grain structures creating a low current flow at low voltages. At higher voltages, the current flow is dominated by a combination of thermionic emissions and tunneling. This diode-like behavior forms the diode-like characteristic provides the high resistance/low voltage state, and the low resistance/high voltage state. An advantage of the MOV structure is it has a high trigger voltage, making it suitable for EOS protection in power electronics (e.g. 120–700 V applications) [1, 21]. The disadvantage of these elements is that it has high capacitance, high on-resistance, high trigger voltage, and variability of the device response (e.g. on-resistance and clamping voltage) in the MOV device characteristics. Key device parameters of varistor are the energy rating, operating voltage, response time, maximum current and breakdown voltages.

Gas discharge tubes (GDT) devices can be used to avoid electrical overstress (EOS) in systems [1, 23]. Gas discharge tubes (GDT) are bidirectional, allowing for protection for both positive and negative EOS events. GDT elements are suitable from surge protection. GDT devices have high trigger voltages (unless used as a first stage followed by other low voltage secondary EOS solutions) [1].

Gas-filled tubes (GDT) utilize electrical discharge in gases. An applied voltage initiates the device by ionizing the electrical gas, followed by electrical glow discharge, and an electrical arc. With creation of an electrical arc, the GDT device becomes a low resistance shunt for EOS protection. These gas-filled tubes can contain hydrogen, deuterium, and noble gases (e.g. helium, neon, argon, krypton, and xenon). GDT devices can vary their electrical characteristics by choices of the gas type, pressure, electrode design, and spacings.

GDT devices undergo three states: (1) electrical breakdown, (2) glow discharge, and (3) electrical arc [1, 23]. The electrical breakdown is a high voltage low current state prior to triggering of the GDT device. A glow discharge region forms a second state which incorporates a low current high voltage state. Lastly, after full ionization of the gas, a low voltage high current state occurs with a low "on-resistance."

GDT devices have high trigger voltages suitable for LDMOS power electronic applications to HV LDMOS (e.g. 120 V), and UHV LDMOS applications (e.g. 600–700 V) [1, 23]. These devices are used in a number of high voltage switch devices, such as ignitrons, krytons, and thyratrons. One of the disadvantages of the GDT devices is the slow turn-on times typically in the micro-seconds. An example of some of the electrical characteristics can exhibit d.c. breakdown from 75 to 600 V, with a single surge response of 40 kA in 10–20 s, or multiple surges of magnitude of 20 kA.

The electrical circuit breaker is used in industrial, commercial, and residential electrical systems for high currents. Electrical circuit breakers have issues of physical size, weight, cost, and time response. Circuit breakers can be used to protect household appliances, and large scale switchgear high voltage circuits. The circuit breaker is an electrical switch designed for the purpose of electrical over-current events, short circuits, or fault detection. Circuit breakers are typically "tripped" by the high current event, and can be manually reset. The concept of the circuit breaker was invented by Charles Grafton Page, in 1836 [17].

A class of circuit breakers is the thermal-magnetic circuit breaker [1]. Thermal-magnetic circuit breakers are used to avoid "short-circuit" currents. Thermal-magnetic circuit breakers are sensitive to temperature. Thermal-magnetic circuit breakers contain a bi-metal switch and an electromagnet. The bi-metal switch provides over-current protection. During current over-load, the bi-metal switch heats up, leading to bending of the element. The electromagnet responds to short-circuit currents [1].

Power controllers are used for low power and low voltage applications; power controllers typically are low voltage high efficiency products that can carry amperes of current per channel. Buck-converters use over-current protection logic and networks; over-current functions protect the switching converter from an output short by monitoring current flow in the application. Hence, in power applications, it is possible to integrate electrical over-voltage (EOV) and electrical over-current (EOC) within a component design. Many analog and power applications also contain thermal protection networks as well to avoid thermal runaway and EOS damage.
