2. Device physics

#### 2.1. Charge transport and related mechanisms

The study of electron and hole transport in organic materials has a long history which dates back to 60 years ago. Many groups have done their efforts on this topic. In the mid-1970s, Scher group laid the theoretical description of hopping transport in disordered materials by using the continuous-time random walk model [7]. Until today, the exact nature of charge transport in organic semiconductors is still open to debate. However, a general idea can be obtained using the disordered semiconductors and highly ordered organic single crystals as the standards. In organic semiconductors, the charge carrier transport mechanism depends on the degree of order and falls between the band and hopping transport which are the two extreme transport cases. Typically, band transport could be observed in highly purified molecular crystals at low temperatures. However, the bandwidth in organic semiconductors is smaller than that in inorganic semiconductors (typically a few kT at room temperature only) due to the weak electronic delocalization [8]. Hence, the mobility value in molecular single crystals at room temperature reaches only in the range from 1 to 10 cm2 V�<sup>1</sup> s �1 . In the other extreme case of an amorphous organic solid, hopping transport prevails, which leads to much lower mobility values (at best around 10�<sup>3</sup> cm<sup>2</sup> V�<sup>1</sup> s �1 ).

flexible substrates. Hence, using organic semiconducting materials has become an important

Organic-based semiconductors have various applications as key components of numerous electronic and optoelectronic devices, including field-effect transistors (FETs), photovoltaics (PVs), and light-emitting diodes (LED). Especially for the field-effect transistor, a lot of efforts have been done to develop new organic materials to improve device performance with high charge carrier mobility and good air stability. Anyhow, OFETs have been considered as a key component of organic integrated circuits for application in flexible smart cards, low-cost radio frequency identification (RFID) tags, sensor devices, organic active matrix displays, and so on [1–6]. However, it is still far from satisfactory for practical applications. The focus of recent attention has been devoted to improving device performance and stability, reducing the fabrication cost, exploring new applications, and developing simple fabrication techniques. Overcoming these challenges relies on the novel organic semiconductor development

In this chapter, organic field-effect transistors will be discussed from three aspects: the device physics, device materials, and device processing. The first section will talk about the charge transport and related mechanisms in organic semiconductor materials and the techniques used to characterize the charge carrier mobility, such as time of flight, field-effect transistor, and space-charge limited current (SCLC) technique. In the second section, we discuss the organic field-effect transistor from basic principle, device structure, and the main parameters, such as charge carrier mobility, current on/off ratio, threshold voltage, subthreshold voltage, and the corresponding influence factors in the OFET. The third section will talk about the organic materials selection, including mostly used aromatic p-type semiconductors and n-type semiconductors. The forth section will discuss the fabrication techniques in the organic field-effect transistors, including vapor deposition, solution deposition, and some thin-film alignment

The study of electron and hole transport in organic materials has a long history which dates back to 60 years ago. Many groups have done their efforts on this topic. In the mid-1970s, Scher group laid the theoretical description of hopping transport in disordered materials by using the continuous-time random walk model [7]. Until today, the exact nature of charge transport in organic semiconductors is still open to debate. However, a general idea can be obtained using the disordered semiconductors and highly ordered organic single crystals as the standards. In organic semiconductors, the charge carrier transport mechanism depends on the degree of order and falls between the band and hopping transport which are the two extreme transport cases. Typically, band transport could be observed in highly purified molecular crystals at low temperatures. However, the bandwidth in organic semiconductors is smaller than that in inorganic semiconductors (typically a few kT at room temperature only) due to the

topic in the development of low-cost, large area, flexible, and lightweight devices.

126 Different Types of Field-Effect Transistors - Theory and Applications

and device optimization.

methods.

2. Device physics

2.1. Charge transport and related mechanisms

When localization occurs in conjugated organic materials, the polarons resulting from the conjugated chain deformation under the charge action could be formed (or the charge is selftrapped by the deformation) [9]. This mechanism of self-trapping is often described through the creation of localized states in the gap between the valence and the conduction bands.

To better understand the charge transport in organic materials, a one-dimensional, oneelectron model, the small polaron model, has been developed by Holstein [9]. In this model, the electron-electron interactions are assumed to be neglected, and the lattice energy, electron dispersion energy, and the polaron banding energy are the three terms which constitute the total energy of the system [9].

The charge carrier mobility is temperature and field dependence. For temperature-dependent mobility, when the mobility is extrapolated at the zero-field limit, the Monte Carlo (MC) fitting results lead to the following expression:

$$
\mu(T) = \mu\_0 \exp\left[-\left(\frac{T\_0}{T}\right)^2\right] \tag{1}
$$

where μ<sup>0</sup> is the mobility at room temperature and T<sup>0</sup> is the room temperature. Since the temperature helps in overcoming the barriers introduced by the energetic disorder in the system, the temperature talked about here only depends on the amplitude of the diagonal disorder width. This expression deviates from an Arrhenius-like law, and this expression generally fits the experimental data well, as a result of the limited range of temperatures available.

The impact of an external electric field is to lower the energy barrier for the electron conduction band transport since part of this energy could be provided by the driving force of the electric field. In the presence of energetic disorder only, the Monte Carlo results generally yield a Poole-Frenkel behavior when electric fields are larger than 104 –105 V/cm:

$$
\mu(E) = \mu\_0 \exp(\beta \sqrt{E}) \tag{2}
$$

where μ<sup>0</sup> is the low field mobility, β is Poole-Frenkel coefficient, and E is the applied electric field [10]. The field dependence becomes more pronounced as the extent of energetic disorder grows. The increase in electric field amplitude is also accompanied by an increased diffusion constant.

#### 2.2. Characterization of charge carrier mobility

Charge carrier mobility can be determined by various techniques [11, 12]. The mobility measured by the methods with the measurement over macroscopic scales (~1 mm) is often dependent on the material order and purity. Instead, when the mobility measurement is over microscopic scales, the measurement result is less dependent on these characteristics. In this section, the basic principle of most used mobility measurement techniques, time-of-flight (TOF), field-effect transistor (FET), and space-charge limited current (SCLC) will be briefly described.

#### 2.2.1. Time-of-flight (TOF)

For the TOF measurement, a few micron thick organic active layer is sandwiched between two metal electrodes (Figure 1). As shown in Figure 1, first, the material is irradiated to generate charges by a laser pulse near one electrode. Then, the photo-generated holes or electrons migrate across the material toward another electrode depending on the polarity of the applied bias and the corresponding electric field (in the 10<sup>4</sup> –106 V/cm range). After that, the current at that electrode is recorded as a function of time. Finally, for ordered materials, a sharp signal will be obtained, while for disordered systems, a broadening of the signal will occur because of the distribution of transient times across the material. The hole or electron mobility is estimated via the following equation:

$$
\mu = \frac{\upsilon}{F} = \frac{d}{Ft} = \frac{d^2}{Vt} \tag{3}
$$

where d is the distance between the electrodes, F is the electric field, t is the averaged transient time, and V is the applied voltage. TOF measurements clearly show the impact of structural defects present in the material on charge carrier mobility. Charge carrier mobilities in organic materials were first measured with the TOF technique by Kepler [13] and Leblanc [14].

#### 2.2.2. Field-effect transistor (FET) configuration

The electrical characteristics measured in a field-effect transistor (FET) configuration could also be used to extract the charge carrier mobilities (Figure 2). As previously Horowitz talked about [15], the derived current-voltage expressions for inorganic-based transistors in both

Figure 1. The setup of the TOF technique.

Figure 2. The structure of thin-film transistor.

microscopic scales, the measurement result is less dependent on these characteristics. In this section, the basic principle of most used mobility measurement techniques, time-of-flight (TOF), field-effect transistor (FET), and space-charge limited current (SCLC) will be briefly

For the TOF measurement, a few micron thick organic active layer is sandwiched between two metal electrodes (Figure 1). As shown in Figure 1, first, the material is irradiated to generate charges by a laser pulse near one electrode. Then, the photo-generated holes or electrons migrate across the material toward another electrode depending on the polarity of the applied

that electrode is recorded as a function of time. Finally, for ordered materials, a sharp signal will be obtained, while for disordered systems, a broadening of the signal will occur because of the distribution of transient times across the material. The hole or electron mobility is esti-

where d is the distance between the electrodes, F is the electric field, t is the averaged transient time, and V is the applied voltage. TOF measurements clearly show the impact of structural defects present in the material on charge carrier mobility. Charge carrier mobilities in organic

The electrical characteristics measured in a field-effect transistor (FET) configuration could also be used to extract the charge carrier mobilities (Figure 2). As previously Horowitz talked about [15], the derived current-voltage expressions for inorganic-based transistors in both

Ft <sup>¼</sup> <sup>d</sup><sup>2</sup>

<sup>μ</sup> <sup>¼</sup> <sup>υ</sup> <sup>F</sup> <sup>¼</sup> <sup>d</sup>

materials were first measured with the TOF technique by Kepler [13] and Leblanc [14].

–106 V/cm range). After that, the current at

Vt <sup>ð</sup>3<sup>Þ</sup>

described.

2.2.1. Time-of-flight (TOF)

mated via the following equation:

2.2.2. Field-effect transistor (FET) configuration

Figure 1. The setup of the TOF technique.

bias and the corresponding electric field (in the 10<sup>4</sup>

128 Different Types of Field-Effect Transistors - Theory and Applications

linear and saturated regimes are also applicable to organic field-effect transistors (OFETs). These expressions in the linear regime are:

$$I\_{DS} = \frac{W}{L} \mathbb{C}\_{i} \mu (V\_G - V\_T) V\_{D\prime} V\_D < V\_G - V\_{T\prime} \tag{4}$$

and in the saturated regime:

$$I\_{DS} = \frac{W}{2L} \mathbb{C}\_l \mu (V\_G - V\_T)^2,\\ V\_D > V\_G - V\_T. \tag{5}$$

Here, IDS and VDS are the current and voltage bias between source and drain, respectively, VG denotes the gate voltage, VT is the threshold voltage, Ci is the capacitance of the gate dielectric, and W and L stand for the width and length of the conducting channel, respectively. In FETs, the charges migrate at the interface between the organic semiconductor and the dielectric within a few nanometer-wide channel [16, 17]. There are several factors that affect the charge transport, such as structural defects at the interface within the organic layer, the dielectric surface morphology and polarity, and the traps existing at the interface (that depends on the chemical structure of the gate dielectric surface). Contact resistances at the source and drain metal/organic interfaces also play significantly important roles, and when the channel length decreases and the transistor operates at low fields, it becomes more important. Anyhow, its effect can be accounted for via four-probe measurements [18].

The charge carrier mobilities extracted from the FET current-voltage curves in the saturated regime are generally higher than those in the linear regime due to different electric-field distributions. The mobility was found to be gate-voltage dependent [19], and it is often related to the presence of traps which is usually caused by structural defects and/or impurities and/or charge carrier density (which is modulated by VG) [20].

The dielectric constant of the gate insulator is another important parameter. For instance, measurements on rubrene single crystals [21] and polytriarylamine chains [22] show that the charge carrier mobility decreases with the increased dielectric constant because of polarization effects across the interface. At the dielectric surface, the polarization induced by the charge carriers within the conducting channel of organic semiconductors couples to the carrier motion, which can be cast in the form of a Frolich polaron [23, 24].

#### 2.2.3. Space-charge limited current (SCLC)

The mobilities can also be extracted from the electrical characteristics measured in a diode configuration with an organic layer sandwiched between two metal electrodes (Figure 3). In this case, we are assuming that carrier transport is bulk limited instead of contact limited. The electrode is chosen in such a way that at low voltage, only electrons or holes are injected. In the absence of traps and at low electric fields, the behavior of the current density J quadratically scaling with applied bias V is a space-charge limited current (SCLC) characteristic, and it corresponds to the current obtained when the number of injected charges reaches a maximum because their electrostatic potential prevents the injection of additional charges [25]. In this case, the charge density is maximum approaching the injecting electrode instead of uniform across the material [26]. In this regime, when diffusion contributions are neglected, we can describe J-V characteristics as:

$$J = \frac{9}{8} \varepsilon\_0 \varepsilon\_r \mu \frac{V^2}{d^3} \tag{6}$$

where ε<sup>r</sup> is the dielectric constant of the active layer and d denotes the device thickness. (Note that at high electric fields, it has to consider a field-dependence of the mobility.) With the presence of traps, the J-V curves become more complex. First, a linear regime with injectionlimited transport is exhibited in the J-V curves. Then, a sudden increase occurs in the intermediate range of applied biases. Finally, the V<sup>2</sup> dependence of the trap-free SCLC regime is reached. The extent of the intermediate region is governed by the spatial and energetic distribution of trap states, which is generally modeled by a Gaussian [27] or exponential distribution [28].

Figure 3. The structure of a SCLC-based device.

#### 3. Organic field-effect transistors

#### 3.1. Basic principles of field-effect transistors

In 1962, Weimer first introduced the concept of the thin-film transistor (TFT) [29]. This structure is well adapted to low conductivity materials and is currently used in amorphous silicon transistors. As shown in Figure 2, ohmic contacts are formed directly between the source and drain electrodes with conducting channel. Compared with the metal-insulation-semiconductor field-effect transistor (MISFET) structure, there are two crucial differences in the TFT structure. First, the depletion region to isolate the device from the substrate is absent. Second, instead of the inversion regime, the TFT operates in the accumulation regime although it is an insulated gate device. As a result, it should be especially careful when transferring the drain current equations from the MISFET to the TFT. In fact, the absence of a depletion region leads to a simplification of the equation as the following [30]:

$$I\_d = \frac{W}{L} \mathbf{C}\_i \mu \left(V\_G - V\_T - \frac{V\_D}{2}\right) V\_D \tag{7}$$

Here, the threshold voltage is the gate voltage, and the channel conductance (at low drain voltages) is equal to that of the whole semiconducting layer.

#### 3.2. Important parameters in OFET

#### 3.2.1. Mobility

carriers within the conducting channel of organic semiconductors couples to the carrier

The mobilities can also be extracted from the electrical characteristics measured in a diode configuration with an organic layer sandwiched between two metal electrodes (Figure 3). In this case, we are assuming that carrier transport is bulk limited instead of contact limited. The electrode is chosen in such a way that at low voltage, only electrons or holes are injected. In the absence of traps and at low electric fields, the behavior of the current density J quadratically scaling with applied bias V is a space-charge limited current (SCLC) characteristic, and it corresponds to the current obtained when the number of injected charges reaches a maximum because their electrostatic potential prevents the injection of additional charges [25]. In this case, the charge density is maximum approaching the injecting electrode instead of uniform across the material [26]. In this regime, when diffusion contributions are neglected, we can

> <sup>J</sup> <sup>¼</sup> <sup>9</sup> 8 ε0εrµ V2

Electrode Semiconductor Electrode

V

where ε<sup>r</sup> is the dielectric constant of the active layer and d denotes the device thickness. (Note that at high electric fields, it has to consider a field-dependence of the mobility.) With the presence of traps, the J-V curves become more complex. First, a linear regime with injectionlimited transport is exhibited in the J-V curves. Then, a sudden increase occurs in the intermediate range of applied biases. Finally, the V<sup>2</sup> dependence of the trap-free SCLC regime is reached. The extent of the intermediate region is governed by the spatial and energetic distribution of trap states, which is generally modeled by a Gaussian [27] or exponential distribu-

In 1962, Weimer first introduced the concept of the thin-film transistor (TFT) [29]. This structure is well adapted to low conductivity materials and is currently used in amorphous silicon

<sup>d</sup><sup>3</sup> <sup>ð</sup>6<sup>Þ</sup>

motion, which can be cast in the form of a Frolich polaron [23, 24].

2.2.3. Space-charge limited current (SCLC)

130 Different Types of Field-Effect Transistors - Theory and Applications

describe J-V characteristics as:

3. Organic field-effect transistors

Figure 3. The structure of a SCLC-based device.

3.1. Basic principles of field-effect transistors

tion [28].

The FET J-V characteristics in different operating regimes can be analytically expressed by the gradual channel approximation assumption which means that the electric field parallel to the current flow generated by the drain voltage is much smaller compared with the field perpendicular to the current flow created by the gate voltage [30, 31].

In the linear regime, the drain current is directly proportional to VG, and the field-effect mobility in the linear regime (μlin) can be extracted from the gradient of ID versus VG at constant VD.

$$I\_D = \frac{W}{L} C\_l \mu \left(V\_G - V\_T - \frac{V\_D}{2}\right) V\_{D\prime} V\_D < V\_G - V\_T \tag{8}$$

In the saturation regime, the channel is pinched off when VD = VG � VT. The current cannot increase anymore and saturates. The square root of the saturation current is directly proportional to the gate voltage.

$$I\_{\rm Dsat} = \frac{W}{2L} \mathbf{C}\_i \mu (V\_G - V\_T)^2,\\ V\_D > V\_G - V\_T \tag{9}$$

$$
\sqrt{I\_{D\text{sat}}} = \sqrt{\frac{W}{2L}} \mathbf{C}\_i \mu (V\_G - V\_T) \tag{10}
$$

Eq. (10) predicts that plotting the square root of the saturation current against gate voltage would result in a straight line. The mobility is obtained from the slope of the line, while the threshold voltage corresponds to the extrapolation of the line at zero current. However, in the saturation regime, the density of charge varies largely along the conducting channel, from a maximum near the source electrode to practically zero at the drain electrode. Hence, the mobility in organic semiconductors largely depends on various parameters, including the density of charge carriers. Meanwhile, in the saturation regime, the mobility is not constant along the channel and the extracted value only represents a mean value. Therefore, it is often more rational to extract the mobility in the linear regime, in which the density of charge is more uniform. This is usually done through the transconductance gm, which follows from the first derivative of Eq. (3) with respect to the gate voltage [30].

$$\mathcal{g}\_m = \frac{\partial I\_D}{\partial V\_G} = \frac{W}{L} \mathcal{C}\_i \mu V\_D \tag{11}$$

This equation assumes that the mobility is gate voltage independent. However, the mobility is actually gate voltage dependent. In this case, an extra term ∂μ/∂VG should be involved in Eq. (5), so that this method is only applicable when the mobility varies slowly with the gate voltage [30]. Moreover, this method is very sensitive to the charge injection limitation and retrieval at source and drain electrodes.

#### 3.2.2. Current on/off ratio

The current on/off ratio is another important FET parameter that can be extracted from the transfer characteristics. It is the ratio of the drain current in the on-state (at a particular gate voltage) and the drain current in the off-state (Ion/Ioff). For best performing behavior of the transistor, this value should be as large as possible. When neglected the contact resistance effects at the source-drain electrodes, the on-current mainly depends on the mobility of the semiconductor and the capacitance of the gate dielectric. The off-current is mainly determined by gate leakage current. It can be increased for unpatterned gate electrodes and semiconductor layers due to the conduction pathways at the substrate interface and the bulk conductivity of the semiconductor. Moreover, the unintentional doping could also increase the off-current [31].

#### 3.2.3. Threshold voltage

Threshold voltage originates from several effects and strongly depends on the organic semiconductor and dielectric used. Generally speaking, the threshold voltage could be caused by interface states, charge traps, built-in dipoles, impurities, and so on [31, 32]. And it can be reduced by increasing the gate capacitance, which induces more charges at lower applied voltages. In many cases, the threshold voltage is not always constant for a given device. The Vth tends to increase when organic transistors are operated under an extended time scale. This is called bias stress behavior, and it has a significant effect on the applicability of organic transistors in electric circuits and real applications. And thus is presently under intense investigation [33, 34]. A current hysteresis could be caused by the shift of the threshold voltage on the time scale of current-voltage measurements. Large stable threshold shifts, for example, induced by polarization of a ferroelectric gate dielectric, can be used in organic memory devices.
