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ion implantation have been studied combining IPE and ac conductance spectroscopy methods on nitrogen implanted SiC/SiO2interfaces [132]. IPE reveals that nitrogen incorporates in carbon clusters at the SiC/SiO2 interface that causes a shift of the electron levels to higher binding energies. Inferring the Schottky barrier height from the IPE spectra, it has been shown that ion implantation of sulfur in the NiSi/Si barrier does not induce changes in the barrier height, but increases doping in silicon [133]. The silicide/Si barrier modification by intentional dopant

Defects generated by ionizing radiation and/or electric field, as well as the defects in undamaged devices, are considered to be spatially distributed across the SI interface and can be classified accordingly to the spatial location as the oxide-related traps and the interface traps. In respect to the latter, it is generally accepted that the interface traps are rapidly communicating with the silicon conduction or valence bands. The defects within the oxide interlayer also can exchange charge with silicon as has been revealed by the noise measurements [135]. Combining ac admittance spectroscopy and the noise measurements, it has been established that the fast interface states at the Si/SiO2 interface, likely associated with the dangling bond defects, contribute to the loss peak in conductance measurements [136]. The defect states residing in an oxide layer are responsible for 1/f noise and random telegraph noise. These trapping centers in the oxide contribute to the conductance plateau at low frequency in ac conductance spectra (cf. Figure 2 of Ref. [137]). A separable contribution of the oxide-related traps has been revealed employing measurements of subthreshold current [138] and the charge-pumping technique [139] to MOSFETs and CV measurements taken on the gate-controlled diode [140]. The latter technique is applicable for characterization of the interface traps in MOS devices composed on wide band gap semiconductors, because it allows supplying minority carriers in an amount sufficient to compensate for the low thermal generation rates of the minority carriers. An alternative method of providing minority carriers to invert a semiconductor surface is a controlled deposition of surface charges onto an insulator surface from corona discharging in air as it has been proposed in Ref. [141]. In this work, a surface charge has been deposited on SiO2 and high-k dielectrics to overcompensate the carrier leakage current in silicon MOS capacitors and enable extraction of Dit(E) profiles following the Berglund formalism. There are several advantages of the inverting semiconductor surfaces by employing noninvasive electrostatic charging of an insulator surface in a MOS structure: (i) The method does not involve fabrication of a transistor or a gate-controlled diode. (ii) The Berglund analysis can be used to reliably estimate Dit(E) over the major part of a semiconductor band gap (for Si, from 0.2 to 0.9 eV above the valence band edge) using just MOS capacitors of one type of semiconductor conductivity. (iii) The method may employ CV measurements at mid-kHz frequency range allowing investigation of samples, which experience relatively high

The sub-division of the interface trap responses into slow and fast on the basis of their characteristic time constants is important in research on the irradiation-induced damage in MOS devices. The interface state generation under irradiation or high electric field stress can involve electron-

segregation has been verified in work [134].

86 Ion Implantation - Research and Application

leakage current.

4.5. Slow interface states as a special case of study

Yanina G. Fedorenko

Address all correspondence to: janina.fedorenko@gmail.com

Stephenson Institute for Renewable Energy and Department of Physics, School of Physical Sciences, Chadwick Building, University of Liverpool, Liverpool, UK
