**4. Conclusion**

Double Patterning has become an important technique for advanced microelectronics devices. Cost-competitive memory chips have structure dimensions which are well below the diffraction limit of any available productive lithography tool. The generation EUV lithography is still on its way towards production maturity.

We have shown a classification of double patterning and have discussed possible implementations. Their specific challenges and advantages have been considered. For a 36nm NAND flash as an example, process flows have been presented.
