**3. Experimental procedure, results and discussions**

#### **3.1. The preparation of the triple junction GaInP/GaInAs/Ge epitaxial wafers**

The Ga0.49In0.51P/Ga0.99In0.01As/Ge multi-junction solar cells were grown by the Veeco E475 MOCVD system on 6o off cut Germanium substrate. Standard growth conditions used were with growth pressure of 40 Torr, and rotation rate of 500 rpm. The precursors include trimethy‐ lindium (TMIn), trimethylgallium (TMGa), trimethylaluminium (TMAl), arsine, phosphine and diethyl-tellurium (DETe), diethyl-zink (DEZn). Top and middle sub-cells include the fol‐ lowing layers: back-surface field (BSF) layer, base, emitter and window. The Ge-sub-cell con‐ sists of a base (substrate), a diffused emitter and a window. Sub-cells are connected in series by tunnel diodes, which in turn include highly doped thin (10–20 nm) layers. The growth temper‐ ature of 650 °C was applied to the layers consisting of the Ga0.99In0.01As buffer, middle cell lay‐ ers, top cell layers and GaAs cap. AlGaAs was used as to the middle and top cell BSF, and AlInP as the window layer of InGaAs middle cell and GaInP top cell.

The Ge sub-cell is an important part of the structure of this cell, contributing 10% or more of the total cell efficiency [13]. The Ge junction is formed during III - V /Ge interface epitaxy. Group V elements such as P and As are n-type dopants in Ge, so the emitter of Ge junction was formed by diffusion of V elements during the deposition of III - V epilayers. In addition, the structure of Ge is different from the III - V materials such as GaAs and GaInP, the con‐ nection between Ge substrate and buffer layer or initial layer is important to the growth quality on buffer layer and the performance of Ge sub-cell. In this chapter, based on plenty of experiments, GaInP is selected as a suitable buffer material to be grown between the sub‐ strate and the active region of the device. Several researches on III - V materials grown on pdoped Ge substrate have indicated that the bottom Ge cell efficiency decreases as the thickness of the emitter increases, mainly owing to the lowering of the short circuit current. For this reason, GaInP is an optimized option with smaller diffusion length than GaAs. In addition, GaInP is also an appropriate material for the window layer of Ge junction.

The electrochemical capacitance-voltage results of GaInP initial layer grown on Ge indicate that the diffusion length of P is about 200 nm, when a thin Ge emitter for excellent perform‐ ance of Ge sub-cell is fabricated. In the past, GaAs was employed as the middle cell material, and the 0.08% lattice-mismatch between GaAs and Ge was thought to be negligibly. To ob‐ tain enough current matched to the top cell, the middle cell was often designed to be 3~4 micrometers thick, but misfit-dislocations were generated in thick GaAs layers and deterio‐ rated cell performance [5]. By adding about 1% indium into the GaAs cell layers, all cell lay‐ ers are lattice-matched precisely to the Ge substrate. Application of InGaAs middle cell to lattice-match Ge substrates has demonstrated to be able to increase open-circuit voltage (Voc) due to lattice-matching and short-circuit current density (Jsc) due to the decrease of the energy gap in the middle cell.

**Figure 7.** The external quantum efficiency of the top cell for various top cell emitter thickness (a), and top cell emitter

ND -emitter =3х1017 2.6673 0.01816 89.30% 31.66% ND -emitter =5х1017 2.6674 0.01816 88.37% 31.51% N D-emitter =1х1018 2.6667 0.01812 88.40% 31.27% ND -emitter =2х1018 2.6652 0.01786 88.74% 30.90%

**Table 5.** Figure-of-merits of the tandem cell for various top cell emitters doping concentration.

**3.1. The preparation of the triple junction GaInP/GaInAs/Ge epitaxial wafers**

The Ga0.49In0.51P/Ga0.99In0.01As/Ge multi-junction solar cells were grown by the Veeco E475 MOCVD system on 6o off cut Germanium substrate. Standard growth conditions used were with growth pressure of 40 Torr, and rotation rate of 500 rpm. The precursors include trimethy‐ lindium (TMIn), trimethylgallium (TMGa), trimethylaluminium (TMAl), arsine, phosphine and diethyl-tellurium (DETe), diethyl-zink (DEZn). Top and middle sub-cells include the fol‐ lowing layers: back-surface field (BSF) layer, base, emitter and window. The Ge-sub-cell con‐ sists of a base (substrate), a diffused emitter and a window. Sub-cells are connected in series by tunnel diodes, which in turn include highly doped thin (10–20 nm) layers. The growth temper‐ ature of 650 °C was applied to the layers consisting of the Ga0.99In0.01As buffer, middle cell lay‐ ers, top cell layers and GaAs cap. AlGaAs was used as to the middle and top cell BSF, and AlInP

**3. Experimental procedure, results and discussions**

as the window layer of InGaAs middle cell and GaInP top cell.

**short-circuit current Jsc (A/cm2)** **fill factor** **tandem cell efficiency**

**open-circuit voltage Voc (V)**

doping concentration (b).

454 Optoelectronics - Advanced Materials and Devices

**top cell emitter doping concentration**

**(1/cm3)**

The Ga0.49In0.51P/Ga0.99In0.01As/Ge multi-junction solar cells for terrestrial concentrator appli‐ cation operate at high current densities higher than 10A/cm2 . This brings specific challenges to the tunnel diode structures that are used for the series connection of the sub-cells. So the tunnel junction (TJ) growth is one of the most important issues affecting multi-junction solar cell performance. The problems of TJ growth are related to obtaining transparent and uni‐ formly highly doped layer without any degradation of surface morphology [14]. The thick‐ ness of each side of the TJ junction has to be in the order of tens of nanometres, while the required doping has to be around 1019~1020 cm-3. The reaching of the high doping level re‐ quires very different growth temperatures, in order to obtain an abrupt doping profile. In this experiment, the growth of tunnel junction was carried out at temperature of 600 °C which is about 50 °C lower than the growth temperature of other layers. DETe and CCl4 were used as N-type dopant and P-type dopant respectively to fabricate small thickness, high doping AlGaAs/GaAs tunnel junctions.

GaInP lattice-matched to GaAs exhibits anomalous changes in the energy gap, depending on the growth conditions and the substrate misorientation [15]. These changes are the results of the spontaneous ordering during the growth of the cation-site elements (Ga and In) in planes parallel to the (111). One of changes is a lowering of the energy gap of the material, whose exact value depends on the degree of ordering. It appears to be the 100 meV reductions. The Ga0.49In0.51P/Ga0.99In0.01As/Ge multi-junction solar cells' performance depends on the energy gap of the GaInP top cell. The theoretical calculations for this combination of materials indicate that, to achieve maximum efficiencies, the energy gap of the GaInP top cell should be about 1.89 eV. The GaInP should be completely disordered. However, the MOCVD growth condi‐ tions that produce such a material have deleterious effects on the growth quality of GaInP, which determines the performance of the solar cell. To sum up, the growth of high quality GaInP with a maximizing degree of disorder is important for super high efficiency multi-junc‐ tion solar cells. To fulfil this purpose, precise controls of the growth conditions including the growth temperature, growth rate and V/III ratio were carried out in our experiments. Based on the experimental results and theoretical calculations, the growth of GaInP was carried out at 640 °C,V/III ratio about 40,and growth rates of 0.6 nm/s.

Ge substrate. The graphical front electrode (negative electrode) and the non-graphical back electrode (positive electrode) will then be deposited on the both surfaces of the epitaxial wa‐ fers with a series steps of lithography, electrode deposition, metal alloy, cap layer etching,

III-V Multi-Junction Solar Cells http://dx.doi.org/10.5772/50965 457

AR coating and so on.

**Figure 9.** GaInP/ GaInAs/Ge epitaxial wafers (a), chips on wafers (b).

**Figure 10.** The principal chip process flow.

**Figure 11.** The detail of the graphical front electrode.

**Figure 8.** The SIMS spectrum of the Ga0.49In0.51P/Ga0.99In0.01As/Ge multi-junction solar cells.

The SIMS spectrum of the Ga0.49In0.51P/Ga0.99In0.01As/Ge multi-junction solar cells is calibrated and shown in Figure 8. With the elemental depth profile, we can clearly identify the cell structure and the doping level and the thickness of different functional layers.

#### **3.2. The chip processing procedure and optimization**

#### *3.2.1. The process procedure of the multi-junction solar cell*

The process designed for the concentrator multi-junction solar cells is as follows: the differ‐ ent electrode patterns on the front and back surfaces of the GaInP/ GaInAs/Ge epitaxial wa‐ fer are formed first, and then the wafer will be separated into independent cell chips by the methods of chemical etch and/or physical wheel-cutting. Figure 9 shows photos of the GaInP/ GaInAs/Ge epitaxial wafers and chips on wafer process stage. Figure 10 shows the principal process flow. The monolithic device structures of three sub-cells are grown on the Ge substrate. The graphical front electrode (negative electrode) and the non-graphical back electrode (positive electrode) will then be deposited on the both surfaces of the epitaxial wa‐ fers with a series steps of lithography, electrode deposition, metal alloy, cap layer etching, AR coating and so on.

**Figure 9.** GaInP/ GaInAs/Ge epitaxial wafers (a), chips on wafers (b).

**Figure 10.** The principal chip process flow.

Ga0.49In0.51P/Ga0.99In0.01As/Ge multi-junction solar cells' performance depends on the energy gap of the GaInP top cell. The theoretical calculations for this combination of materials indicate that, to achieve maximum efficiencies, the energy gap of the GaInP top cell should be about 1.89 eV. The GaInP should be completely disordered. However, the MOCVD growth condi‐ tions that produce such a material have deleterious effects on the growth quality of GaInP, which determines the performance of the solar cell. To sum up, the growth of high quality GaInP with a maximizing degree of disorder is important for super high efficiency multi-junc‐ tion solar cells. To fulfil this purpose, precise controls of the growth conditions including the growth temperature, growth rate and V/III ratio were carried out in our experiments. Based on the experimental results and theoretical calculations, the growth of GaInP was carried out at

640 °C,V/III ratio about 40,and growth rates of 0.6 nm/s.

456 Optoelectronics - Advanced Materials and Devices

**Figure 8.** The SIMS spectrum of the Ga0.49In0.51P/Ga0.99In0.01As/Ge multi-junction solar cells.

**3.2. The chip processing procedure and optimization**

*3.2.1. The process procedure of the multi-junction solar cell*

The SIMS spectrum of the Ga0.49In0.51P/Ga0.99In0.01As/Ge multi-junction solar cells is calibrated and shown in Figure 8. With the elemental depth profile, we can clearly identify the cell structure and the doping level and the thickness of different functional layers.

The process designed for the concentrator multi-junction solar cells is as follows: the differ‐ ent electrode patterns on the front and back surfaces of the GaInP/ GaInAs/Ge epitaxial wa‐ fer are formed first, and then the wafer will be separated into independent cell chips by the methods of chemical etch and/or physical wheel-cutting. Figure 9 shows photos of the GaInP/ GaInAs/Ge epitaxial wafers and chips on wafer process stage. Figure 10 shows the principal process flow. The monolithic device structures of three sub-cells are grown on the

**Figure 11.** The detail of the graphical front electrode.

Figure11 shows the isolated solar cell and details of the front electrode. Two busbars locate at the edge of the solar cell chip with some parallel gridlines between them. The multi-layer metal structure mainly includes ohmic contact layer, adhesion or barrier layer, conductive layer, and protective layer. The ohmic contact layer will faintly diffuse to the cap layer of the epitaxial wafer after an anneal process, which can decrease the contact resistance between the electrodes and the cap layer. When the photocurrents are generated in the cells, the grid‐ lines will collect and then transfer the currents to the busbars. Finally the golden wires bonded on the busbars will export the currents to the external circuitry.

#### *3.2.2. Research on the process technology optimization*

#### *3.2.2.1. Grid line design*

Series resistance ( *rS* ) is the main limiting factor to achieve a high performance for a multijunction solar cell working under hundreds of suns concentration. Due to the complex con‐ stituent elements of series resistance, several aspects of the design and manufacture of the solar cells must be considered carefully. The gridline geometries and the metal structure of the triple junction solar cell are the most important factors to reduce the *rS* . The main con‐ cerns are as follows: What is the best *rS* value? Which steps during the whole manufacture process will affect the *rS* value mostly?

It is known that there are many constituent elements contributed to the series resistance,

$$r\_S = r\_L + r\_V + r\_G + r\_{FC} + r\_{BC} \tag{22}$$

$$\frac{1}{\frac{1}{r}\,^{1}L} = \frac{1}{\frac{1}{r}\,^{1}E} + \frac{1}{\frac{1}{r}\,^{1}W} \tag{23}$$

neighbour gridlines, which can be described as the shadowing factor, Fs: a ratio of Area cov‐ ered by metal to total area. As the shadowing factor increases, the area of the front contact will increase and the series resistance components related to the front contact, *rFC* , decreas‐ es. The lateral current can be easier to collect through a shorter distance. Unfortunately, the shadow of the front grid line increases as the shadowing factor increasing, resulting in a re‐ duction of the Isc of the solar cell. Therefore, the balance between the lower lateral resistance

Experimental verification is carried out to obtain the optimum front grid design for 1000 suns concentration GaInP/GaInAs/Ge multi-junction solar cells. Typical values of the front

crometers, respectively. The front contact metal sheet resistance, *rMsheet* , ranges from 3 to

meters, respectively. All the Fs and WL values are referred to fingers of 7 micrometers thick in a 10×10 mm2 sized solar cell. It must be pointed that there is no antireflection coating on

Figure12 (a) shows the short-circuit current (Isc), fill factor (FF) and efficiency (Eff) as a func‐ tion of the shadowing factor. It is evident that with the wider space, the higher Isc can be obtained, because more light can be absorbed by the solar cell. The FF increases obviously as the space increases. Therefore, we can draw a conclusion that the optimal front gridline de‐ sign should result in higher Isc and FF. As shown in Figure 12 (b), the highest Isc×FF is found with an Fs of 5%, and the corresponding efficiency of 29.8% is also the highest one.

**Figure 12.** The short-circuit current (Isc), fill factor (FF) and efficiency (Eff) as a function of the shadowing factor.

Due to the high refractive indices of semiconductors, high reflection losses must be mini‐ mized by antireflection coatings (ARC) for GaInP/GaInAs/Ge multi-junction solar cells. This presents several challenges for the ARC design. Firstly, the wide wavelength range of sun‐ light requires an optimization of extreme broadband design and limits the material choice to

. The space between the neighbour gridlines are in the range of 45 ~167 micro‐

and 7 mi‐

III-V Multi-Junction Solar Cells http://dx.doi.org/10.5772/50965 459

and higher Isc related to the shadowing factor should be considered carefully.

contact resistance ( *rFC* ) and the thickness of the grid line metal are 5×10-5 Ω.cm<sup>2</sup>

5×10-6 Ω.cm<sup>2</sup>

the surface of all the solar cells discussed here.

*3.2.2.2. Antireflection Coating*

$$r\_V = r\_B + r\_{Su} \tag{24}$$

where *rL* is the resistance of the lateral current in the semiconductor structure, *rV* is the re‐ sistance of the vertical current, *rG* is the contribution of gridline, *rBC* is the resistance of other symbols, and *rFC* is resistance of the front contact. *rE* and *rW* are the contribution of emitter layer and window layer to the *rEl* espectively. *rB* and *rSu* are the contribution of base layer and substrate to the *rV* respectively.

Traditionally the front metal grid of concentrator solar cells has been thickened up to 5~7 micrometers by electroplating. The higher ratio of the thickness to the width of the grid lines results in larger profile area. On the other hand, the resistance of the gridline metal ( *rG* ) affects the series resistance of the solar cells greatly.

Due to the low thickness (100~150 nm) of the contact semiconductor layer, the lateral resist‐ ance in the semiconductor ( *rL* ) also plays an important role in the constituent elements of series resistance. An effective method to reduce the *rL* , is to decrease the space between the neighbour gridlines, which can be described as the shadowing factor, Fs: a ratio of Area cov‐ ered by metal to total area. As the shadowing factor increases, the area of the front contact will increase and the series resistance components related to the front contact, *rFC* , decreas‐ es. The lateral current can be easier to collect through a shorter distance. Unfortunately, the shadow of the front grid line increases as the shadowing factor increasing, resulting in a re‐ duction of the Isc of the solar cell. Therefore, the balance between the lower lateral resistance and higher Isc related to the shadowing factor should be considered carefully.

Experimental verification is carried out to obtain the optimum front grid design for 1000 suns concentration GaInP/GaInAs/Ge multi-junction solar cells. Typical values of the front contact resistance ( *rFC* ) and the thickness of the grid line metal are 5×10-5 Ω.cm<sup>2</sup> and 7 mi‐ crometers, respectively. The front contact metal sheet resistance, *rMsheet* , ranges from 3 to 5×10-6 Ω.cm<sup>2</sup> . The space between the neighbour gridlines are in the range of 45 ~167 micro‐ meters, respectively. All the Fs and WL values are referred to fingers of 7 micrometers thick in a 10×10 mm2 sized solar cell. It must be pointed that there is no antireflection coating on the surface of all the solar cells discussed here.

Figure12 (a) shows the short-circuit current (Isc), fill factor (FF) and efficiency (Eff) as a func‐ tion of the shadowing factor. It is evident that with the wider space, the higher Isc can be obtained, because more light can be absorbed by the solar cell. The FF increases obviously as the space increases. Therefore, we can draw a conclusion that the optimal front gridline de‐ sign should result in higher Isc and FF. As shown in Figure 12 (b), the highest Isc×FF is found with an Fs of 5%, and the corresponding efficiency of 29.8% is also the highest one.

**Figure 12.** The short-circuit current (Isc), fill factor (FF) and efficiency (Eff) as a function of the shadowing factor.

#### *3.2.2.2. Antireflection Coating*

Figure11 shows the isolated solar cell and details of the front electrode. Two busbars locate at the edge of the solar cell chip with some parallel gridlines between them. The multi-layer metal structure mainly includes ohmic contact layer, adhesion or barrier layer, conductive layer, and protective layer. The ohmic contact layer will faintly diffuse to the cap layer of the epitaxial wafer after an anneal process, which can decrease the contact resistance between the electrodes and the cap layer. When the photocurrents are generated in the cells, the grid‐ lines will collect and then transfer the currents to the busbars. Finally the golden wires

Series resistance ( *rS* ) is the main limiting factor to achieve a high performance for a multijunction solar cell working under hundreds of suns concentration. Due to the complex con‐ stituent elements of series resistance, several aspects of the design and manufacture of the solar cells must be considered carefully. The gridline geometries and the metal structure of the triple junction solar cell are the most important factors to reduce the *rS* . The main con‐ cerns are as follows: What is the best *rS* value? Which steps during the whole manufacture

It is known that there are many constituent elements contributed to the series resistance,

where *rL* is the resistance of the lateral current in the semiconductor structure, *rV* is the re‐ sistance of the vertical current, *rG* is the contribution of gridline, *rBC* is the resistance of other symbols, and *rFC* is resistance of the front contact. *rE* and *rW* are the contribution of emitter layer and window layer to the *rEl* espectively. *rB* and *rSu* are the contribution of base layer

Traditionally the front metal grid of concentrator solar cells has been thickened up to 5~7 micrometers by electroplating. The higher ratio of the thickness to the width of the grid lines results in larger profile area. On the other hand, the resistance of the gridline metal ( *rG* )

Due to the low thickness (100~150 nm) of the contact semiconductor layer, the lateral resist‐ ance in the semiconductor ( *rL* ) also plays an important role in the constituent elements of series resistance. An effective method to reduce the *rL* , is to decrease the space between the

1 *<sup>r</sup> <sup>L</sup>* <sup>=</sup> <sup>1</sup> *<sup>r</sup> <sup>E</sup>* + 1

*rS* =*rL* + *rV* + *rG* + *rFC* + *rBC* (22)

*<sup>r</sup> <sup>W</sup>* (23)

*rV* =*rB* + *rSu* (24)

bonded on the busbars will export the currents to the external circuitry.

*3.2.2. Research on the process technology optimization*

process will affect the *rS* value mostly?

and substrate to the *rV* respectively.

affects the series resistance of the solar cells greatly.

*3.2.2.1. Grid line design*

458 Optoelectronics - Advanced Materials and Devices

Due to the high refractive indices of semiconductors, high reflection losses must be mini‐ mized by antireflection coatings (ARC) for GaInP/GaInAs/Ge multi-junction solar cells. This presents several challenges for the ARC design. Firstly, the wide wavelength range of sun‐ light requires an optimization of extreme broadband design and limits the material choice to those with little or no absorption over the required wavelength range. For high concentrator multi-junction solar cells,the direct terrestrial sunlight spectrum (AM1.5D), defined for a zenith angle of 48.2° representing the average conditions of the United States, is split be‐ tween each sub-cell in this triple junction design as shown in Figure13. The bandwidth of absorption and internal quantum efficiency extends in both the UV and IR directions, rang‐ ing from 300~1800 nm. Secondly, for the concentrator multi-junction solar cells, light is inci‐ dent upon the cell over a wide angular range, introducing an additional dimension for optimization. Thirdly, solar cells are required to operate for 20~30 years. Materials must not be modified or damaged by long-term exposure to UV light or large periodic changes in temperature and humidity. Furthermore, variations in the temperature-dependence of the refractive index of each layer will lead to a temperature-dependent transmission spectrum which may affect the performance of multi-junction solar cells. Finally, these ARC layers should be deposited inexpensively over large areas, together in a single coating chamber, and at low temperatures to minimize impact on the solar cell performance.

cal properties of the samples above. It can be seen that the Isc under 1000 suns is improved from 10.27 to 13.79 A, and the improvement in the Isc is 34.3%; the Voc also has a small in‐ crease of 0.03V. The FF shows an obvious decrease of 1.9% because of more ohmic loss with higher Isc. The efficiency of the samples with Al2O3/TiO2 coatings combination increases

III-V Multi-Junction Solar Cells http://dx.doi.org/10.5772/50965 461

from 29.33% to 39.30%, a 34.0% improvement.

**Figure 14.** The reflection spectra of the solar cells with ARC.

**Figure 15.** The EQE of the cells with and without ARC.

**Figure 13.** The wavelength versus irradiance spectrum.

In the triple junction solar cells, the window layer of the top cell, AlInP, was considered for the ARC designs, using a structure (air, ARC layer(s), AlInP) with direct normal incidence AM1.5D sunlight. Figure14 shows the reflection spectra for two-layer material combinations commonly used for antireflection coatings. Both Al2O3/TiO2 and SiO2/TiO2 offer coating solu‐ tions using practical deposition equipment. Commercially deposited Al2O3/TiO2 coatings have shown a 30-35% improvement in the Isc and a corresponding smaller increase to Voc when compared with uncoated devices.

Figs.15 shows the improvement in the external quantum efficiency (EQE) of the cells with Al2O3/TiO2 coatings. It can be seen that an improvement in the EQE (AM1.5D) of the top and middle cells is from 65% to 88%. Figure16 shows the improvement in the optical and electri‐ cal properties of the samples above. It can be seen that the Isc under 1000 suns is improved from 10.27 to 13.79 A, and the improvement in the Isc is 34.3%; the Voc also has a small in‐ crease of 0.03V. The FF shows an obvious decrease of 1.9% because of more ohmic loss with higher Isc. The efficiency of the samples with Al2O3/TiO2 coatings combination increases from 29.33% to 39.30%, a 34.0% improvement.

**Figure 14.** The reflection spectra of the solar cells with ARC.

those with little or no absorption over the required wavelength range. For high concentrator multi-junction solar cells,the direct terrestrial sunlight spectrum (AM1.5D), defined for a zenith angle of 48.2° representing the average conditions of the United States, is split be‐ tween each sub-cell in this triple junction design as shown in Figure13. The bandwidth of absorption and internal quantum efficiency extends in both the UV and IR directions, rang‐ ing from 300~1800 nm. Secondly, for the concentrator multi-junction solar cells, light is inci‐ dent upon the cell over a wide angular range, introducing an additional dimension for optimization. Thirdly, solar cells are required to operate for 20~30 years. Materials must not be modified or damaged by long-term exposure to UV light or large periodic changes in temperature and humidity. Furthermore, variations in the temperature-dependence of the refractive index of each layer will lead to a temperature-dependent transmission spectrum which may affect the performance of multi-junction solar cells. Finally, these ARC layers should be deposited inexpensively over large areas, together in a single coating chamber,

In the triple junction solar cells, the window layer of the top cell, AlInP, was considered for the ARC designs, using a structure (air, ARC layer(s), AlInP) with direct normal incidence AM1.5D sunlight. Figure14 shows the reflection spectra for two-layer material combinations commonly used for antireflection coatings. Both Al2O3/TiO2 and SiO2/TiO2 offer coating solu‐ tions using practical deposition equipment. Commercially deposited Al2O3/TiO2 coatings have shown a 30-35% improvement in the Isc and a corresponding smaller increase to Voc

Figs.15 shows the improvement in the external quantum efficiency (EQE) of the cells with Al2O3/TiO2 coatings. It can be seen that an improvement in the EQE (AM1.5D) of the top and middle cells is from 65% to 88%. Figure16 shows the improvement in the optical and electri‐

and at low temperatures to minimize impact on the solar cell performance.

**Figure 13.** The wavelength versus irradiance spectrum.

460 Optoelectronics - Advanced Materials and Devices

when compared with uncoated devices.

**Figure 15.** The EQE of the cells with and without ARC.

In order to simulate the real operating conditions, IEC 62108 requires that during the proc‐ ess of thermal cycling test for concentrator solar cells carried out in the oven, a current should be flowing through the chips. Table 6 shows the three optional conditions. In princi‐ ple, the temperature and the current injection time of cells are required to be accurately monitored during thermal cycling test. However, it is very difficult to monitor the real tem‐ perature of cells in real operating conditions, because a high electric current passing through the cells can lead to differences in temperature among the cells, the heat sink and the oven.

**temperature Total cycles Applied current**

TCA-1 85 °C <sup>1000</sup> Apply 1.25×Isc when T "/ 25°C , cycle speed is

TCA-2 110 °C <sup>500</sup> Apply 1.25×Isc when T "/ 25°C , cycle speed is

TCA-3 65 °C <sup>2000</sup> Apply 1.25×Isc when T "/ 25°C , cycle speed is

Using the thermal cycling test condition of TCA-1 from table 6, the cell temperature is con‐ trolled between -40 °C and 85 °C. A dwell time of 10 min of the high and low temperatures is required. The cycling period and frequency are 120 minutes and 12 cycles per day, respec‐ tively. In one thermal cycle, a specific current level of 7A is periodically on and off for 10 cycles, when the cell temperature is above 25 °C. In order to illustrate the changes of electri‐ cal performance of test samples, control samples are chosen and measured under the similar test condition. By this method, test condition variables are self-corrected, and the complex translation procedures are eliminated. Finally, the relative power Pr and relative power deg‐

> *Pr* <sup>=</sup> *Pm Pmc*

> > *Pri* − *Prf Pri*

where Pm is the test sample's maximum power, Pmc is the control sample's maximum pow‐ er measured at the similar condition as Pm, and Prf and Pri are the relative powers meas‐

For comparison, eight San'an company's cells and eight B-company's cells were tested to‐ gether. Tables 7 and 8 show the relative power degradation of San'an Company's and Bcompany's receiver samples after different numbers of thermal cycles, respectively. The

*Prd* =

10 electrical/thermal

III-V Multi-Junction Solar Cells http://dx.doi.org/10.5772/50965 463

10 electrical/thermal

10 electrical/thermal

×100*%* (25)

×100*%* (26)

**Option**

**Maximum cell**

**Table 6.** The options of thermal cycling test from IEC 62108.

radation Prd are defined as follows:

ured after and before the given test, respectively.

**Figure 16.** The optical and electrical properties of the cells with and without ARC.
