**4. Conclusion**

We have proposed an autonomous first-in-first-out buffer with capability of storing a single packet in each of FDLs. Characteristics of PLR and average delay have been investigated by numerical simulation. As a result, the PLR and the average delay have a trade-off relation at such parameters as number of FDL *M* and length of each FDL *L*. Therefore they should be determined by system demand. Smaller *M* and larger *L* can be options for implementing the system from viewpoints of footprint, power consumption, and avoid complicated control. Our future works include detailed investigation of buffering performance considering re‐ sponse time in switching and other constituent devices, and experimental verification.
