1. Introduction

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Prevention of the global warming is one of the most important and urgent subjects in the world. Technologies to reduce energy consumption should be the key for overcoming this problem, and one of which is the improvement in the efficiency of power devices.

Silicon carbide (SiC) semiconductor is one of the wideband gap semiconductors and the use of it is considered as the solution to achieve these performances because it has superior physical properties such as 3 times wider bandgap, 10 times larger electrical break-down field, and 3 times higher thermal conductivity, compared with Si semiconductor [1]. Taking 2\*0#!/z+"z0\$!/!z,.+,!.0%!/\_z+\*w.!/%/0\*!z"+.z1\*%,+(.z !2%!/z/1\$z/z)!0(w+4% !w/!)%¥ conductor field-effect-transistors (MOSFETs) can, for example, be reduced by a factor of a few hundreds when replacing Si with SiC semiconductor. In addition, SiO2 film, utilized as an insulator in MOSFETs, can be grown on the SiC substrate surface by thermal oxidation, which is well compatible with the Si MOS device technologies [2]. Moreover, the power and frequency ranges of SiC MOSFETs are around 1 kV break-down voltage and around 20 kHz switching frequency, respectively, which covers the wide power device application field.

For these reasons, the developments of SiC power MOSFETs have been very popular for a few decades. However, the on-resistances for MOSFETs fabricated practically are beyond the (+3!.z(%)%0z"+.z%\_z\$+3!2!.\_z\$%#\$!.z0\$\*z0\$!z%z(%)%0z5zz"!3z+. !./zeFf^z/zz.!/1(0\_z+\*2!\*¥

tional Si insulated gate bipolar transistors (IGBTs) still have most of the share in the application fields of power transistors. In the case of 1 kV break-down voltage device, the channel resistance is dominant to the total on-resistance. Therefore, controlling the channel layer, i.e. the SiC-SiO2 interface structure, should be the key technology to realize a SiC -MOSFET with desired performances. Besides, although the long-term reliability of oxide is very important for the practical uses of MOSFETs, that of SiC MOS device are still lower than that of Si by a factor of 1 order. As the creation of interface layers and the characteristics of oxide layers are closely related to the growth mechanism of the oxide, it is safely said that the observation of SiO2 growing process is very significant work for overcoming these problems.

In previous work, we have, for the first time, performed real-time observation of SiC thermal oxidation using an in-situ ellipsometer [4, 5]. The results show that the oxidation-time dependence of oxide thickness can essentially be represented by the Deal-Grove (D-G) model [6], which has been originally proposed for the explanation of Si oxidation. Song et al. [7] have modified the D-G model for applying it to SiC oxidation, taking the process of carbon oxidation into account. They have concluded that a linear-parabolic formula can also be applicable to SiC oxidation, although the parabolic term includes the contribution from the diffusion of CO or CO2 molecules from the SiC-oxide interface to the surface as well as that of oxygen from the surface to the interface. However, our further studies have found that the oxide growth rates in the thin oxide region are higher than those predicted from the D-G model [4, 8, 9, 10, 11]. By the way, it is well known that also the oxidation behavior of Si cannot be explained using the D-G model, i.e., particularly at the initial oxidation stage. Accordingly, several models that describe Si oxidation have been proposed [12, 13, 14, 15, 16].

At the beginning of this chapter, we review the thermal oxidation models for SiC as well as those for Si that have been previously proposed, to elucidate the oxidation mechanism of SiC and then we verify each of these SiC oxidation models by making comparison with the oxide growth rate data with various oxidation conditions and discuss the structure and nature of the SiC-oxide intertace layer based on the oxidation model that we have proposed.
