4.1. Silicon dioxide (SiO2)

A high quality thin SiO2 is most popular gate dielectric from the SiC based microelectronics industries to make the fabrication process cost effective. Various oxidation processes has been implemented such as dry oxidation, wet oxidation, chemical vapour deposition (CVD), and pyrogenic oxidation in order to achieve the most suitable process to realize the SiCbased MOS structures (Gupta S.K, 2011a d^z\$%/z+\* %0%+\*z,.+ 1! zz(+0z+"z!""+.0z%\*0+z0\$!z%)¥ plementation of SiO2/SiC interface, in the fabrication of MOS transistor. The intricacy of SiO2/SiC interface, in comparison to the Si based structure, causes severe problems even 0\$+1#\$z0\$!z)+%(%05z%/z.! 1! z5zHMz+"z0\$!z0\$!+.!0%(z2(1!^z\$!z!/0z+4% !z-1(%05z%/z+¥ tained by the means of dry oxidation process performed at temperatures more than 1100 °C. The growth mechanism of oxide on Si substrate is limited by the diffusion of oxygen at SiO2u%z%\*0!."!^z+3!2!.\_z%\*z/!z+"z%z/5/0!)z 0\$%/z %""1/%+\*z,.+!//z+1\*0!\*\*!/z %""%¥ 1(0%!/z!1/!z+"z 0\$!z,.!/!\*!z+"zz0+)/\_z3\$%\$z.!z,.!/!\*0z(+\*#z3%0\$z%z0+)/^z\$!z¥ tual growth mechanism of SiO2 on SiC surface is not well understood yet. Hypotheses ,.+,+/!z)%#.0%+\*z+"z".!!zz0+)/z%\*z()+/0z!2!.5z %.!0%+\*^z\$!z)+/0z,.+(!z%/z+10w %""1¥ sion of CO2 or CO through the grown silicon oxide but also formation of carbon clusters at the SiO2/SiC interface and even diffusion of C into bulk SiC are possible. (Song Y., 2004) and his team have proposed a model of the thermal oxide growth on hexagonal SiC in the frame of deal and grove model. The work assumes two competitive processes influencing SiO2z"+.¥ mation, one is the in-diffusion of oxygen towards the interface and the other one is the outdiffusion of CO. However, by experimental data one cannot prove that some of the carbon atoms do not stay at the interface and form very stable carbon cluster (Kobayashi H. 2003 and Wang S., 2001). Further investigation was also carried out by of thermal oxidation and re-oxidation with different by using different oxygen isotopes, which seems to confirm that unknown carbon structures exist at the interface (Cantin, J.L.2004). Atomic layer deposition (ALD) has proved a potential method for materials deposition (Leskela M., 2002). Using this technique very well controlled growth is possible, almost atomic layer by atomic layer, of 0\$!z !/%.! z /,!%!/z ".+)z #/!+1/z ,.!1./+./^z \*(1'%(5\_z 2!.5z "!3z ,1(%0%+\*/z .!,+.0z !""%¥ cient SiO2 deposition using ALD technique on 4H-SiC substrate (Perez I., 2000). (Amy F., 1999dz\* z\$%/z+z3+.'!.z\$/z !,+/%0! z0\$%\*z%z(5!.z+\*z%z/1."!z\* z(0!.z0\$!.)(z+4% ¥ 0%+\*z+"z0\$!z%z(5!.z3/z,!."+.)! ^zw.5z,\$+0+!(!0.+\*z/,!0.+/+,5zcdz3/z"1.0\$!.z!)¥ ployed to study of such an attempt on 6H-SiC and the material formed by overplayed +4% 0%+\*z/\$+3/z(!//z%z\* zz.!(0! z/,!%!/z%\*z+),.%/+\*z3%0\$z 0\$!.)((5z+4% %6! z/)¥ ples. This method shows a less complex oxidation mechanism by comparing the case. (2¥ nas'ev V.V., 1997) and his team has performed verity of experiment to characterize the interface properties of SiO2/SiC. Finally, this research group was investigated the basic mechanism of interface states distribution for SiC system. In such a system the interface traps density may arise from three main sources i.e. graphite-like carbon, carbon clusters and oxide traps. However, a similar type of paper was again presented by the same author in 2005 (Avanas'ev V.V., 1997). He concluded that that during 8 years of intensive studies this complex problem of oxidation and interface properties is still unsolved. At present time also Si and SiO2 are very useful system, but electric field strength in SiC can reach the values 10 times higher than those observed in case of Si. In case of SiC as base material the potential barrier height between SiO2 and SiC is even smaller, indicates toward a serious problem. Moreover, SiC based structures can operate at much more higher temperature than that of Si

application of high-k/SiC-base stacks for high temperature applications (Weng M-H, 2006). Another issue of interest is surface preparation techniques prior to dielectric deposition. There are standard process in Si technology is wet chemical etching in hydrofluridic acid (HF) to remove the native oxide and initial impurities. Unfortunately, this procedure does not provide much satisfactory outcome in the case of SiC as a base material. Many methods are incorporated to clean the SiC surface. The most common method is UV light cleaning, which has a sufficient energy to break carbon clusters that are present on the SiC surface.

+)!z/%z"!01.!/z+"z#0!z %!(!0.%\_z3\$%\$z\*z!z%),(!)!\*0! z+\*z%z/1."!\_z.!z/z"+(¥

1. The value of dielectric constant (k) must have enough high that may be used for long

3. It must have a sufficient barrier height and band offset with SiC surface so carrier chare

A capability to sustain a high electric field without any failure is known a dielectric strength. The dielectric breakdown (EBRdz%/z0\$!z)4%)1)z(%)%0z+"z!(!0.%z"%!( z0\$0z %!(!0.%z\*z0+(!.¥ ate under the influence of high supply voltage. In general dielectric field can be defined as

*BR*

Where VBR is the breakdown voltage and d is the dielectric thickness. Dielectric strength is 0\$!z%\*\$!.!\*0z,\$!\*+)!\*+\*z+"z %!(!0.%z)0!.%(z\* z%0z)%\*(5z !,!\* /z+\*z/0.101.(z,.+,!.¥ ties. In the development of dielectric material, growth condition (material thickness, voltage .),z /,!! \_z .%0%(z 211)\_z #.+30\$u !,+/%0%+\*z .0!dz \* z !\*2%.+\*)!\*0(z +\* %0%+\*z c!)¥

A high quality thin SiO2 is most popular gate dielectric from the SiC based microelectronics industries to make the fabrication process cost effective. Various oxidation processes has

*<sup>d</sup>* <sup>=</sup> (1)

*BR <sup>V</sup> <sup>E</sup>*

2. The interface of dielectric layer with SiC surface should thermally stable.

lows

time of year of scaling.

210 Physics and Technology of Silicon Carbide Devices

3. Dielectric breakdown field

perature, humidity) are very important.

4.1. Silicon dioxide (SiO2)

4. Materials chemistry of high K oxides

injection into its band can be minimize.

4. It should be compatible with processing technology.

5. It must for good and stable electrical interface with SiC surface.

based structures. Additionally, due to poorer interface properties and low value of dielectric constant of SiO2 is not seems to be implement in future MOS structures on SiC substrate.

4.4. Aluminium oxide (Al2O3)

3% !z\*1)!./z+"z.!/!.\$!./zc2%!z
^zECCJaz\$!z

4.5. Aluminium nitride (AlN)

(!'#!z1..!\*0/z+"z0\$!z+. !.z+"zDCwLzu)<sup>2</sup>

Aluminium oxide (Al2O3) is another gate dielectric, which has proven the demanded gate material SiC MOS structures. This material has a broad scope in semiconductor industry and the single crystal wafer of Al2O3 is commercially available. Crystalline form of Al2O3 %/z'\*+3\*z/z((! z/,,\$%.!\_z+.zw(2O3,z3\$%\$z\$/z0\$!z.\$+)+\$! .(z/5))!0.5^z\$!z,¥ ,(%0%+\*z+"z/,,\$%.!z/z,//%20%+\*z)0!.%(z "+.z%z%/z2!.5z\$. z 1!z 0+z.5/0((%\*!z)%/¥ match and polycrystalline Al2O3 may cause large leakage trough grain boundaries of material. This material belongs to the family of wide bandgap (8.8 eV) and having the ,+0!\*0%(z..%!.z+"zE^Kz!z3%0\$z%z+\* 10%+\*z\* ^z\$!z(1(0! z+\* 10%+\*z\* z+""¥ /!0z "+.z Gw%z /5/0!)z%/z +10z Dz!\_z3\$%\$z%/z /)((!.z 0\$\*z 0\$0z+"z 0\$!z)!/1.! z+\*z % system. But this value is high enough to effectively prevent carrier injection at interface. However, amorphous form of Al2O3 z/!!)/z0+z!z\*z00.0%2!z\* % 0!z/zz#0!z %!(!¥ 0.%z "+.z %z/! z /0.101.!/^z\$%/z)0!.%(z)5z!z !,+/%0! z5z)\*5z %""!.!\*0z 0!\$\*%¥ ques such as sputtering (Jin p., 2002), plasma deposition (Werbowy A., 2000), Atomic layer deposition LD (Gao, K.Y. 2005) and so on with the suitable gaseous inlet of the precursors. ALD is seems to have the largest interest for fabrication of devices. K.Y. Gao et al has demonstrated a very good result and explained very nicely (Gao, K.Y. 2005). Post deposition annealing of Al2O3 in presence of H2 environment at 500°C demonstrates z!""!0%2!z.! 10%+\*z%\*z%\*0!."!z/00!/z !\*/%05z%\*z0\$!z)% z\* #,z+"z0\$!zIw%^z+.( ¥

Materials and Processing for Gate Dielectrics on Silicon Carbide (SiC) Surface

http://dx.doi.org/10.5772/52553

213

,(+.! z 0\$! z (EFu% z %\*0!."! z ,.+,!.0%!/^ z / z 0\$! z .!/1(0 z 0\$! z "%./0 z Gw% z
 z 3%0\$

Aluminium nitride (AlN) is also one of the very promising gate dielectric materials, which can be associated with SiC system. Its lower bandgap of 6 eV in comparison with Al2O3 or SiO2 )%#\$0z!z %/,,+%\*0%\*#\_z10zz(00%!z)%/)0\$z0+z%z+"z+\*(5zDM\_z()+/0z0\$!z/)!z0\$!.¥ )(z!4,\*/%+\*z1,z0+zDCCCz[z\* zz\$%#\$z %!(!0.%z+\*/0\*0z.!z)+.!z!\*+1.#%\*#^z!\*!.((5\_ (z%/z1/! z/zz1""!.z(5!.z,.%+.z0+z#.+3zz/0.101.!/z+\*z%z/1/0.0!/^z\$%/z%/z0\$!z¥ sic cause for largest number of research associated with the epitaxial growth at very high temperatures. Low temperature deposition is also possible over verity of substrate like other techniques that are of interest for low temperature deposition of passivation layers like 0+)%z(5!.z !,+/%0%+\*\_zwz/,100!.%\*#z,1(/! z(/!.z !,+/%0%+\*^z\$!.!z.!z\*+0z/+z)\*5z/01 ¥ ies were focused on electrical characterization of AlN layers on SiC surface. Some results, \$+3!2!.\_z/\$+3/z/0%/"0+.5z%\*/1(0%\*#z,.+,!.0%!/z"+.z)+\*+w.5/0((%\*!z(z3%0\$z!,0(!

jima N., 2002). AlN/SiC interface do not shows the promising characteristics because of \$.#!z0.,,%\*#z0z%\*0!."!^z+3!2!.z+6+\*!z(!\*%\*#z\* z(z,.!w0.!0)!\*0z+"z%z/1."! /\$+3/z z 0.!)!\* +1/z%),.+2!)!\*0z +"z 0\$!z,.+,!.0%!/z +"z %!(!0.%z(5!.z \* z,.+2% !/z%\*0!.¥ face quality sufficient for the fabrication of MOS structures. Introduction of thin SiO2 as a buffer layer between SiC and AlN is an additional barrier to prevent electron injection from semiconductor to dielectric, which may further decrease leakage current. This type of stack

Al2O3 as a gate dielectric was successfully demonstrated (Hino S., 2007).

^\_zECCCdz.!z%\*0!\*/%2!(5z3+.'%\*#z0+z!4¥

z\* zz.!' +3\*z"%!( z+"z.+1\* zGz
u)zc\*+¥
