1. Introduction

Silicon carbide (SiC), which exhibits a wider band gap as well as a superior breakdown field and thermal conductivity over conventional Si, has gained considerable attention for future power electronics [1]. Among the various types of power devices, metal-oxide-semiconductor field-effect transistors (MOSFETs), which provide a normally-off characteristic, should become a key component for next-generation green electronics. As stated, with the exception of Si, SiC is the only compound semiconductor that yields SiO2 insulators with thermal oxidation. This makes the device fabrication process easier compared with those for other wide band gap semiconductors. It is commonly believed that carbon impurities within the oxides diffuse out in the form of carbon oxides during high temperature oxidation, but a small amount of carbon impurities remains within the oxide and at the SiO2/SiC interface. Consequently, the electrical degradation of SiC-MOS devices causing both deteriorated device performance and reliability is the most crucial obstacle to the implementation of SiCbased power electronics.

Unlike mature Si-MOS technology [2-5], a plausible oxidation model of a SiC surface and physical origin explaining electrical degradation of SiC-MOS devices have yet to be established. High-resolution transmission electron microscopy (TEM) observation reported several nm-thick transition layers with an extremely high excess carbon concentration around 20% beneath the SiO2/SiC interface [6-8]. Although the non-stoichiometric bulk region seems to account for the mobility degradation of SiC-MOSFETs [8], a recent report based on an ion scattering technique pointed out a near-perfect stoichometric SiC region [9].

In addition, there still remain controversial issues of the energy band structure of SiO%SiC interfaces, despite the fact that a small conduction band offset significantly increases the gate leakage current, especially under a high electric field and high operation temperatures [10]. For example, while alternative channels, such as a 4H-SiC(000-1) C-face substrate, have

© 2013 Watanabe and Hosoi; licensee InTech. This is a paper distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

proven to provide higher electron mobility than conventional devices on Si-face substrates [11], a further reduction in conduction band offset has been pointed out for the C-face channels [12]. However, details on the physical origins have not been clarified yet.

Furthermore, another important problem of SiC-MOS devices is poor gate oxide reliability, such as low dielectric breakdown field and threshold voltage instability. It has been reported that the location of dielectric breakdown is not correlated with any dislocations in SiC-MOS capacitors with gate oxides formed on 4º-off-angled 4H-SiC(0001) substrates by successive oxidation in N2O and NO ambient [13]. Our conductive atomic force microscopy (AFM) study on a thermally grown SiO /4H-SiC(0001) structure has clearly demonstrated that dielectric breakdowns are preferentially induced at the step bunching [14]. It is generally accepted that the gate oxide breakdown is triggered when electrical defects generated in the oxide by a stress field are connected between the electrode and substrate (percolation model) [15]. Thus, we speculated that a local electric field concentration occurred around the step bunching, resulting in the preferential breakdown due to the acceleration of the defect generation. This suggests that oxidation behavior of step-bunched SiC surface induced by epitaxial growth and high-temperature activation annealing needs to be clarified from the macroscopic point of view, together with the atomic bonding features at SiO%SiC interface mentioned above.

This article provides an overview of our recent studies on the thermal oxidation of 4H-SiC substrates and the energy band structure of SiO%H-SiC fabricated on (0001) Si-face and (000-1) C-face surfaces by means of high-resolution synchrotron x-ray photoelectron spectroscopy (XPS). We investigated the correlation between atomic structure and the electrical properties of corresponding SiC-MOS capacitors and discuss the intrinsic and extrinsic effects of the interface structure and the electrical defects on the band offset modulation. In addition, the surface and interface morphology of a thermally grown SiO%H-SiC(0001) structure were systematically investigated using AFM and TEM to clarify the relation between step bunching and oxidation kinetics.
