**2. CMOS active pixel sensor (APS) fundamentals**

#### **2.1. APS operation in voltage domain**

Figure 1 shows a typical architecture of a conventional 3T CMOS active pixel. This pixel comprising a reset transistor M1, a source follower M2 and a line select transistor M3. When the line select is activated the select transistor is on and the source follower transmits the signal to the column bus keeping the photodiode isolated. After, the column signal at active load is amplified and converted to digital.

**Figure 1.** Diagram showing the conventional 3T APS architecture.

The conventional APS pixel of Figure 1 presents two operation stages: a reset period and a integration period (Figure 2). During reset period the reset transistor is on and the select transistor is off. In this period the photodiode is reversely charged to Vdd. After, the reset transistor is turned off initiating the integration period. In this period the photocurrent dis‐ charge the photodiode during an interval time called integration time. At the end of integra‐ tion time the signal is readout externally by activation of select transistor.

The fixed-pattern noise (FPN) is the non-uniformity introduced in image due to parameters variation from pixel to pixel. It is one of main disadvantage of APS when compared to CCDs. In general, the FPN can be reduced by applying double sampled correlated (CDS). Figure 3 shows a simple circuit that can be used to implement CDS. The CDS operation is comprised by three steps; (1) sample and hold the reset signal, (2) sample and hold the sig‐ nal after the integration time and (3) subtraction of signals of steps (1) and (2).

**Figure 2.** APS operation in voltage domain.

the voltage domain approach, the integration time is approximately constant at time domain approach. In this chapter the conventional frequency domain noise is not used. Instead, a

Figure 1 shows a typical architecture of a conventional 3T CMOS active pixel. This pixel comprising a reset transistor M1, a source follower M2 and a line select transistor M3. When the line select is activated the select transistor is on and the source follower transmits the signal to the column bus keeping the photodiode isolated. After, the column signal at active

The conventional APS pixel of Figure 1 presents two operation stages: a reset period and a integration period (Figure 2). During reset period the reset transistor is on and the select transistor is off. In this period the photodiode is reversely charged to Vdd. After, the reset transistor is turned off initiating the integration period. In this period the photocurrent dis‐ charge the photodiode during an interval time called integration time. At the end of integra‐

tion time the signal is readout externally by activation of select transistor.

temporal analysis is presented as proposed by (Tian, 2001).

**2. CMOS active pixel sensor (APS) fundamentals**

**2.1. APS operation in voltage domain**

316 Photodiodes - From Fundamentals to Applications

load is amplified and converted to digital.

**Figure 1.** Diagram showing the conventional 3T APS architecture.

**Figure 3.** Simple CDS circuit.

The photogate is another type of CMOS photodetector widely used (Fujimori, 2002; Sccher‐ back, 2003; Mendis, 1997). The photogate is composed by a MOS capacitance, a pass transis‐ tor and a floating diffusion as shown in Figure 4 (Fossum, 1997). The photogeneration occurs in the depletion region of the MOS capacitor. The photogate operation can be separated in‐ to four stages (i) integration, (ii) the floating diffusion reset, (iii) transfer the load to the MOS capacitor floating diffusion and (iv) reading of the floating node voltage signal. During the integration period, the terminal port (PG) of the MOS capacitance is set at Vdd and the carri‐ ers generated in the depletion region below the gate terminal (PG), are separated by the elec‐ tric field junction metal-oxide-semiconductor. The polarization of the transfer terminal TX at low level isolates the load MOS capacitor node holding the floating charge under the gate re‐ gion. The reset operation of the floating node consists on drive the transistor reset loading the floating node voltage Vdd. After resetting the floating node, the voltage of the transfer ter‐ minal TX is increased and the port terminal PG voltage MOS capacitor is reduced.

nous flux caused by absorption of photons in the upper layer of polysilicon. In general, the circuitry for reading the signal APS systems with phototogate or photodiodes are the same

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or similar and in both cases are needed to readout the voltage of the photodetector.

**Figure 5.** Photogate Operation Stages (potential diagram) (a) integration (b) *reset* (c) transfer (d) readout.

The logarithmic is another important type of CMOS Active Pixel (Figure 6). The logarithmic pixel is particularly attractive in applications that require image capture with high dynamic range (Kavadias, 2000; Joseph, 2002; Choubey, 2006). The logarithmic photoresponse allows you to capture light intensities in ranges of 6 orders of magnitude. However, the logarith‐ mic pixel presents as disadvantages, high fixed pattern noise (FPN), low signal to noise ra‐ tio and a small swing of the output voltage. Furthermore, the logarithmic pixel requires long time to reach steady state at low light intensities. The pixel logarithmic is composed by a pho‐ todiode connected in series with a MOSFET (Figure 6). The output voltage reaches steady state when the MOSFET current becomes equal to the photocurrent (ID = Iph). The MOSFET oper‐ ates in series and the gate and drain terminals connected directly (VDS = VGS) such that the giv‐ en output voltage is given by Vout = Vdd-VGS. Due to low values of photocurrent, the MOSFET operates in the weak inversion region in which the voltage is a logarithmic function of cur‐ rent. Therefore, the output voltage varies logarithmically with the luminous intensity.

**Figure 4.** Active Pixel Photogate (PG-APS).

The charge transfer occurs with the polarization inversion of the TX and PG. The inversion of the potential resulting from PG and TX polarization cause displacement of charges stored in the region below the gate terminal (highest potential) toward the floating diffusion region (lower potential). After transfer, the transfer terminal voltage TX is reduced again isolating the MOS capacitor of the floating node FD and the loads are stored in the floating node. The new charge balance in FD leads to the floating node voltage variation that was initially charged with Vdd. The variation in voltage at node floating proportional to light intensity can be read externally. The main disadvantage of this photodetector is the lowest quantum efficiency, particularly in the blue region of the spectrum due to the reduction of the lumi‐ nous flux caused by absorption of photons in the upper layer of polysilicon. In general, the circuitry for reading the signal APS systems with phototogate or photodiodes are the same or similar and in both cases are needed to readout the voltage of the photodetector.

capacitor floating diffusion and (iv) reading of the floating node voltage signal. During the integration period, the terminal port (PG) of the MOS capacitance is set at Vdd and the carri‐ ers generated in the depletion region below the gate terminal (PG), are separated by the elec‐ tric field junction metal-oxide-semiconductor. The polarization of the transfer terminal TX at low level isolates the load MOS capacitor node holding the floating charge under the gate re‐ gion. The reset operation of the floating node consists on drive the transistor reset loading the floating node voltage Vdd. After resetting the floating node, the voltage of the transfer ter‐

The charge transfer occurs with the polarization inversion of the TX and PG. The inversion of the potential resulting from PG and TX polarization cause displacement of charges stored in the region below the gate terminal (highest potential) toward the floating diffusion region (lower potential). After transfer, the transfer terminal voltage TX is reduced again isolating the MOS capacitor of the floating node FD and the loads are stored in the floating node. The new charge balance in FD leads to the floating node voltage variation that was initially charged with Vdd. The variation in voltage at node floating proportional to light intensity can be read externally. The main disadvantage of this photodetector is the lowest quantum efficiency, particularly in the blue region of the spectrum due to the reduction of the lumi‐

minal TX is increased and the port terminal PG voltage MOS capacitor is reduced.

**Figure 4.** Active Pixel Photogate (PG-APS).

318 Photodiodes - From Fundamentals to Applications

**Figure 5.** Photogate Operation Stages (potential diagram) (a) integration (b) *reset* (c) transfer (d) readout.

The logarithmic is another important type of CMOS Active Pixel (Figure 6). The logarithmic pixel is particularly attractive in applications that require image capture with high dynamic range (Kavadias, 2000; Joseph, 2002; Choubey, 2006). The logarithmic photoresponse allows you to capture light intensities in ranges of 6 orders of magnitude. However, the logarith‐ mic pixel presents as disadvantages, high fixed pattern noise (FPN), low signal to noise ra‐ tio and a small swing of the output voltage. Furthermore, the logarithmic pixel requires long time to reach steady state at low light intensities. The pixel logarithmic is composed by a pho‐ todiode connected in series with a MOSFET (Figure 6). The output voltage reaches steady state when the MOSFET current becomes equal to the photocurrent (ID = Iph). The MOSFET oper‐ ates in series and the gate and drain terminals connected directly (VDS = VGS) such that the giv‐ en output voltage is given by Vout = Vdd-VGS. Due to low values of photocurrent, the MOSFET operates in the weak inversion region in which the voltage is a logarithmic function of cur‐ rent. Therefore, the output voltage varies logarithmically with the luminous intensity.

**Figure 8.** Main waveforms of APS operating in time domain.

**Figure 9.** Typical APS multi-sampled in time-domain architecture.

factor significantly.

The disadvantage of the APS operating in the time domain is the low fill factor. The fill fac‐ tor is low due to the integration of the voltage comparator of the 8 bits counter per pixel. Alternatively to the low fill factor APS operating in the time domain in Figure 7, Fields et. al. proposed the method of reading multisampling in the time domain (Campos, 2008). Figure 9 shows a typical architecture of an APS multisampling operating in the time domain. The reading method consists in sampling the comparison result at time intervals. This method makes it possible to integrate the comparatorand the counter by column and therefore out‐ side the pixel, reducing the number of integrated transistors per pixel and increasing the fill

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**Figure 6.** Logarithmic Active Pixel (LOG-APS).

#### **2.2. APS Operation in time domain**

Figure 4 shows the architecture of a typical CMOS APS which operates in the time domain. The pixel comprises a photodiode, a reset transistor, a voltage comparator and an 8-bit coun‐ ter. The operation of the photodiode two basic steps, and integration reset as shown in Fig‐ ure 5. In the time domain the incident light intensity is related to the time of discharge of the photodiode. The voltage of the photodiode during the integration period is compared with a reference voltage for measuring the time of discharge voltage of the photodiode. At the time the photodiode voltage falls below the reference voltage the counter count for storing the time the voltage of the photodiode lead to vary from the *Vdd* to the reference voltage *Vref*

**Figure 7.** Typical APS architecture operating in time domain.

**Figure 8.** Main waveforms of APS operating in time domain.

**Figure 6.** Logarithmic Active Pixel (LOG-APS).

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**2.2. APS Operation in time domain**

**Figure 7.** Typical APS architecture operating in time domain.

Figure 4 shows the architecture of a typical CMOS APS which operates in the time domain. The pixel comprises a photodiode, a reset transistor, a voltage comparator and an 8-bit coun‐ ter. The operation of the photodiode two basic steps, and integration reset as shown in Fig‐ ure 5. In the time domain the incident light intensity is related to the time of discharge of the photodiode. The voltage of the photodiode during the integration period is compared with a reference voltage for measuring the time of discharge voltage of the photodiode. At the time the photodiode voltage falls below the reference voltage the counter count for storing the time

the voltage of the photodiode lead to vary from the *Vdd* to the reference voltage *Vref*

The disadvantage of the APS operating in the time domain is the low fill factor. The fill fac‐ tor is low due to the integration of the voltage comparator of the 8 bits counter per pixel. Alternatively to the low fill factor APS operating in the time domain in Figure 7, Fields et. al. proposed the method of reading multisampling in the time domain (Campos, 2008). Figure 9 shows a typical architecture of an APS multisampling operating in the time domain. The reading method consists in sampling the comparison result at time intervals. This method makes it possible to integrate the comparatorand the counter by column and therefore out‐ side the pixel, reducing the number of integrated transistors per pixel and increasing the fill factor significantly.

**Figure 9.** Typical APS multi-sampled in time-domain architecture.

#### **3. Temporal noise**

In this section we present the temporal noise analysis proposed by (Tian, 2001). Only the noise sources presented in time-domain APS are showed: the reset noise, and integration noise. During the reset period the charge time of photodiode is usually greater than the peri‐ od. Also, the charge time in the reset period is a function of light intensity incident. There‐ fore, the voltage at end of reset period and beginning of integration time varies generating a random variation of voltage measured. This variation is known as reset noise. According Tian et al, the quadratic mean voltage of reset noise is given by

$$
\stackrel{\smile}{\cdot}\_{n} \cong \frac{\stackrel{\smile}{\cdot}\_{2\overline{\rm C}\_{ph}}}{\stackrel{kT}{\cdot}\_{ph}} \tag{1}
$$

During the integration period the integration noise is composed by the shot noise related to the photocurrent and dark current. The quadratic mean voltage of the integration noise is

> (1<sup>−</sup> <sup>1</sup> 2(*vph* (0) + *ϕ*)

where *q* is the elementary charge, *iph* is the photocurrent, *idark* is the dark current, *vph* is the photodiode voltage at integration time beginning, *Cph* is the photodiode capacitance and *tint* is the integration time (Tian, 2001). Figure 11 shows the RMS integration noise voltage con‐ sidering *Cph*=30pF, *idark*=2fF, *vph*(0)=3V and *tint*=30ms. The RMS voltage integration noise is

For APS operating in voltage domain, the follower transistor and select transistor of conven‐ tional APS also contributes to the total noise in APS, however, they are not presented in APS

operating in time-domain and will be ignored in this analysis.

(*i ph* + *i dark* ) *Cph* (*vph* (0)) *<sup>t</sup>*int)

2

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given by

*Vn* 2 (*tint*

**Figure 11.** RMS integration voltage noise.

¯

) <sup>=</sup> *<sup>q</sup>*(*<sup>i</sup> ph* <sup>+</sup> *<sup>i</sup>*

*Cph*

*dark* )

<sup>2</sup> (*vph* (0)) *tint*

about a few milivolts for photocurrents in the range of 0.1pA to 1pA.

where *k* is the Boltzmann constant, *T* is the temperature in Kelvin and *C ph* is the photodiode capacitance. Figure 10 shows the RMS reset noise voltage as a function of the photodiode capacitance at *T*=300K. For capacitances from 20fF to 100fF the RMS reset noise voltage is about a few hundred of milivolts.

**Figure 10.** RMS reset noise voltage.

During the integration period the integration noise is composed by the shot noise related to the photocurrent and dark current. The quadratic mean voltage of the integration noise is given by ¯

$$\overline{V\_{in}^{2}(t\_{int})} = \frac{q(i\_{ph} + i\_{dark})}{\mathcal{C}\_{ph}^{2}\left(v\_{ph}\left(0\right)\right)} t\_{int} \left(1 - \frac{1}{2\{v\_{ph}\left(0\right) + \phi\}} \frac{\left(i\_{ph} + i\_{dark}\right)}{\mathcal{C}\_{ph}\left(v\_{ph}\left(0\right)\right)} t\_{int}\right)^{2}}\tag{2}$$

where *q* is the elementary charge, *iph* is the photocurrent, *idark* is the dark current, *vph* is the photodiode voltage at integration time beginning, *Cph* is the photodiode capacitance and *tint* is the integration time (Tian, 2001). Figure 11 shows the RMS integration noise voltage con‐ sidering *Cph*=30pF, *idark*=2fF, *vph*(0)=3V and *tint*=30ms. The RMS voltage integration noise is about a few milivolts for photocurrents in the range of 0.1pA to 1pA.

**Figure 11.** RMS integration voltage noise.

**3. Temporal noise**

322 Photodiodes - From Fundamentals to Applications

about a few hundred of milivolts.

**Figure 10.** RMS reset noise voltage.

In this section we present the temporal noise analysis proposed by (Tian, 2001). Only the noise sources presented in time-domain APS are showed: the reset noise, and integration noise. During the reset period the charge time of photodiode is usually greater than the peri‐ od. Also, the charge time in the reset period is a function of light intensity incident. There‐ fore, the voltage at end of reset period and beginning of integration time varies generating a random variation of voltage measured. This variation is known as reset noise. According

> *kT* 2*Cph*

where *k* is the Boltzmann constant, *T* is the temperature in Kelvin and *C ph* is the photodiode capacitance. Figure 10 shows the RMS reset noise voltage as a function of the photodiode capacitance at *T*=300K. For capacitances from 20fF to 100fF the RMS reset noise voltage is

(1)

Tian et al, the quadratic mean voltage of reset noise is given by

*Vn* ¯2≅

> For APS operating in voltage domain, the follower transistor and select transistor of conven‐ tional APS also contributes to the total noise in APS, however, they are not presented in APS operating in time-domain and will be ignored in this analysis.

#### **4. Temporal noise in time domain**

As the APS in time domain pixel architecture is composed by a transistor reset, a voltage comparator and the photodiode, the main sources of noise are the reset noise and the inte‐ gration noise as described in the last subsection. The reset operation of APS time domain is the same that the reset operation of APS voltage domain and, thus, the reset noise in time is the same given by equation (3). However, the integration time is different in time domain since the integration time is different for different values of photocurrent (see eq. (2) and (4)). Substituting eq. (2) in eq. (4), the integration noise in time domain is given by

$$\sqrt{V\_n}^2 = \frac{q(i\_{ph} + i\_{dark})}{\mathcal{C}\_{ph}\left\{\upsilon\_{ph}(0)\right\}} \left(\frac{\left(\upsilon\_{ph}(0) - \upsilon\_{mf}\right)}{i\_{ph}}\right) \left(1 - \frac{1(i\_{ph} + i\_{dark})}{\frac{2\left(\upsilon\_{ph}(0) + \upsilon\right)}{2\left(\upsilon\_{ph}(0) + \upsilon\right)}} \left(\frac{\left(\upsilon\_{ph}(0) - \upsilon\_{mf}\right)}{i\_{ph}}\right)\right) 2 \tag{3}$$

The voltage noise must reflect in a time noise on the comparison time given by equation (2). Assuming the equivalent circuit of Figure 10, the comparison time given by eq. (2) can be

*Cph* (*vph* (0)) (4)

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*<sup>i</sup> ph Cph* (*vph* (0)) (5)

*Vn* ¯ (6)

(*Vreset* <sup>−</sup>*Vref* <sup>+</sup> *Vn* ¯)

*iph*

Manipulating equation (6) the discharge time with noise can be written as

*SN Rtime* <sup>=</sup> *Td*

*<sup>i</sup> ph Cph* (*vph* (0)) <sup>+</sup>

where *Td* is the discharge time without noise and *tdn* is the noise in time. However the signal-

*tdn* ¯ <sup>=</sup> (*Vreset* <sup>−</sup> *Vref* )

Figure 14 shows the *SNRtime* assuming *Vreset*=3Vfor the three cases of Figure 12. The SNR drops at lower photocurrents values while it keeps constant at higher photocurrent values. Also, it is possible to note that the SNR values increase slightly as the reference voltage in‐ creases. However, one can note that for low reference value as at *Vref*= 1.0V, the SNR is ap‐

*Vn* ¯

*td* <sup>≅</sup>*Td* <sup>+</sup> *tdn* ¯= (*Vreset* <sup>−</sup> *Vref* )

to-noise (SNR) ratio in time domain can be defined as

proximately constant for over the photocurrent range.

*td* ≅

written as

**Figure 13.** Noise in time-domain.

Figure 12 shows the integration noise voltage given by eq. 5 assuming *Vref*=1.5V the same values of Fig. 11. As one can see the integration noise is approximately constant for *iph*>>*idark* and it is a *Vref* function where the RMS integration voltage noise decreases as the reference voltage increases.

**Figure 12.** RMS integration voltage noise for APS operating in time-domain.

The voltage noise must reflect in a time noise on the comparison time given by equation (2). Assuming the equivalent circuit of Figure 10, the comparison time given by eq. (2) can be written as

$$t\_d \equiv \frac{\left(V\_{reset} - V\_{ref} + \overline{V\_n}\right)}{i\_{ph}} \mathcal{C}\_{ph} \left\{v\_{ph} \left(0\right)\right\} \tag{4}$$

**Figure 13.** Noise in time-domain.

**4. Temporal noise in time domain**

324 Photodiodes - From Fundamentals to Applications

*Vn*

voltage increases.

¯2 <sup>=</sup> *<sup>q</sup>*(*<sup>i</sup> ph* <sup>+</sup> *<sup>i</sup>*

*dark* ) *Cph* (*vph* (0)) ( (*vph* (0) <sup>−</sup> *vref* )

**Figure 12.** RMS integration voltage noise for APS operating in time-domain.

As the APS in time domain pixel architecture is composed by a transistor reset, a voltage comparator and the photodiode, the main sources of noise are the reset noise and the inte‐ gration noise as described in the last subsection. The reset operation of APS time domain is the same that the reset operation of APS voltage domain and, thus, the reset noise in time is the same given by equation (3). However, the integration time is different in time domain since the integration time is different for different values of photocurrent (see eq. (2) and

)(1<sup>−</sup> 1(*<sup>i</sup> ph* <sup>+</sup> *<sup>i</sup>*

Figure 12 shows the integration noise voltage given by eq. 5 assuming *Vref*=1.5V the same values of Fig. 11. As one can see the integration noise is approximately constant for *iph*>>*idark* and it is a *Vref* function where the RMS integration voltage noise decreases as the reference

*dark* ) 2(*vph* (0) <sup>+</sup> *<sup>ϕ</sup>*) ( (*vph* (0) <sup>−</sup> *vref* )

*i ph*

))

<sup>2</sup> (3)

(4)). Substituting eq. (2) in eq. (4), the integration noise in time domain is given by

*i ph*

Manipulating equation (6) the discharge time with noise can be written as

$$\mathbf{t}\_d \equiv \mathbf{T}\_d + \overline{\mathbf{t}\_{dn}} = \frac{\left(V\_{\text{rest}} - V\_{\text{ref}}\right)}{i\_{ph}} \mathbf{C}\_{ph} \left\{\mathbf{v}\_{ph} \left\{\mathbf{0}\right\}\right\} + \frac{\overline{\mathbf{V}\_n}}{i\_{ph}} \mathbf{C}\_{ph} \left\{\mathbf{v}\_{ph} \left\{\mathbf{0}\right\}\right\} \tag{5}$$

where *Td* is the discharge time without noise and *tdn* is the noise in time. However the signalto-noise (SNR) ratio in time domain can be defined as

$$\text{SNN } \mathbf{R}\_{time} = \frac{T\_d}{t\_{du}} = \frac{\left(V\_{root} - V\_{ref}\right)}{V\_u} \tag{6}$$

Figure 14 shows the *SNRtime* assuming *Vreset*=3Vfor the three cases of Figure 12. The SNR drops at lower photocurrents values while it keeps constant at higher photocurrent values. Also, it is possible to note that the SNR values increase slightly as the reference voltage in‐ creases. However, one can note that for low reference value as at *Vref*= 1.0V, the SNR is ap‐ proximately constant for over the photocurrent range.

#### **5. Experimental Results**

In this section the results of experiments show the behavior of noise in a multi-sampled time-domain APS proposed by (Campos, 2008). A pixel as shown in Figure 9 was imple‐ mented in 0.35μm AMS technology. The measurements were performed using an illumina‐ tor (Spectra Physics, with 100W Xenon lamp), optical filters and an integration sphere in a dark room. Figure 15 shows the measurement result for the characteristic discharge time versus illumination intensity, using a constant voltage of *V ref*=1.5V. The analysis of slope in Figure 15 showed that the pixel sensitivity is about 3.4V-cm2 /s-W.

**Figure 15.** Discharge time.

noise contribuition.

**Figure 16.** SNR in a time domain APS

observed at high light intensities (>10+4W/cm2

Figure 16 shows the SNR as a function of light intensity obtained from the standard devia‐ tion and the medium comparison time obtained from the measurements at *V ref*=1.5V. As ex‐ pected from theoretical results, the SNR is approximately constant during 3 decades. It presents a SNR average of 54dB while the theoretical results is about 56dB. The SNR drops

that limits its performance at higher frequency operation. However, a better measurement procedure must be developed to caracterize the reference voltage effects and the comparator

) may be related to the slew-rate of comparator

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**Figure 14.** SNR for APS operating in time-domain.

**Figure 15.** Discharge time.

**5. Experimental Results**

326 Photodiodes - From Fundamentals to Applications

**Figure 14.** SNR for APS operating in time-domain.

In this section the results of experiments show the behavior of noise in a multi-sampled time-domain APS proposed by (Campos, 2008). A pixel as shown in Figure 9 was imple‐ mented in 0.35μm AMS technology. The measurements were performed using an illumina‐ tor (Spectra Physics, with 100W Xenon lamp), optical filters and an integration sphere in a dark room. Figure 15 shows the measurement result for the characteristic discharge time versus illumination intensity, using a constant voltage of *V ref*=1.5V. The analysis of slope in

/s-W.

Figure 15 showed that the pixel sensitivity is about 3.4V-cm2

Figure 16 shows the SNR as a function of light intensity obtained from the standard devia‐ tion and the medium comparison time obtained from the measurements at *V ref*=1.5V. As ex‐ pected from theoretical results, the SNR is approximately constant during 3 decades. It presents a SNR average of 54dB while the theoretical results is about 56dB. The SNR drops observed at high light intensities (>10+4W/cm2 ) may be related to the slew-rate of comparator that limits its performance at higher frequency operation. However, a better measurement procedure must be developed to caracterize the reference voltage effects and the comparator noise contribuition.

**Figure 16.** SNR in a time domain APS

#### **6. Conclusions**

The temporal noise analysis of APS in time domain was presented. Theoretical noise analy‐ sis indicated that the noise is constant when APS operates in time domain. The SNR is ap‐ proximately constant when APS operates in time domain while the literature indicates that the SNR of APS operating in voltage domain drops at lower light intensities. Therefore, the results indicate that the operation in time domain is more suitable for low noise applica‐ tions. Experimental results are in agreement with theoretical analysis.

[8] Kavadias, S., Diericks, B., Scheffer, D., Alaerts, A., Uwaerts, D., & Bogaerts, J. (2000). A Logarithmic Response CMOS Image Sensor with On-Chip Calibration. *IEEE Jour‐*

[9] Kawai, N., & Kawahito, S. (2004). Noise analysis of high-gain low-noise column read‐ out circuits for CMOS image sensors. *IEEE Transactions on Electron Devices*, 51(2),

[10] Mendis, S. K., Kemeny, S. E., Gee, R. C., Pain, B., Staller, C. O., Kim, Q., & Fossum, E. R. (1997). CMOS Active Pixel Image Sensors for Highly Integrated Imaging Systems.

[11] Joseph, D., & Collins, S. (2002). Modeling, Calibration, and Correction of Nonlinear Illumination-Dependent Fixed Pattern Noise in Logarithmic CMOS Image Sensor.

[12] Jung, C., Izadi, M. H., La Haye, M. L., Chapman, G. H., & Karim, K. S. (2005). Noise analysis of fault tolerant active pixel sensors. *In proceedings of the 20th IEEE Internation‐*

[13] Lim, Y., Koh, K., Kim, K., Yang, H., Kim, J., Jeong, Y., Lee, S., Lee, H., Lim, S-H., Han,

*national Solid-State Circuits Conference*, (San Francisco, CA, February), 396-397.

[14] Sakakibara, M., Kawahito, S., Handoko, D., Nakamura, N., Satoh, H., Higashi, M., Mabuchi, K., & Sumi, H. (2005). A high-sensitivity CMOS image sensor with gainadaptive column amplifiers. *IEEE Journal of Solid State Circuits*, 50(5), 1147-1156.

[15] Sccherback, I., & Yadid-Pecht, O. (2003). Photoresponse Analysis and Pixel Shape Optimization for CMOS active pixel Sensors. *IEEE Transactions on Electron Devices*,

[16] Suh, S., Itoh, S., Aoyama, S., & Kawahito, S. (2010). Column-parallel correlated multi‐ ple sampling circuits for CMOS image sensors and their noise reduction effects. *Sen‐*

[17] Tian, H., Fowler, B., & El Gammal, A. (2001). Analysis of temporal noise in CMOS photodiode active pixel sensor. *IEEE Journal of Solid-State Circuits*, 36(1), 92-101.

[18] Yadid-Pecht, O., Mansoorian, B., Fossum, E., & Pain, B. (1997). Optimization of noise and responsivity in CMOS active pixel sensors for detection of ultra low light levels.

[19] Yoshihara, S., et al. (2006). A 1/1.8-inch 6.4 Mpixel 60 frames/s CMOS image sensor with seamless mode change. *IEEE Journal of Solid-State Circuits*, 41(12), 2998-3006.

[20] Zheng, R., Wei, T., Gao, D., Zheng, Y., Li, F., & Zeng, H. (2011). Temporal noise anal‐ ysis and optimizing techniques for 4T pinned photodiode active pixel. *In proceedings of IEEE International Conference on Signal Processing, Communications and Computing*

*In Proceedings of SPIE*, (San Jose, CA, February 25), 3019, 125-136.

Mpixel CMOS image sensor using pseudo-multiple sampling. *In proceedings of Inter‐*

temporal noise 1/3.2 inch 8

Noise Performance of Time-Domain CMOS Image Sensors

http://dx.doi.org/10.5772/51584

329

*IEEE Transactions on Instrumentation and Measurements*, 51(5), 996-1001.

*al Symposium on Defect and Fault Tolerance in VLSI Systems*, 140-148.

Y., Kim, J., Yung, J., Ham, S., & Lee, Y-T. (2010). A 1.1e-

*nal of Solid-State Circuits*, 35(8), 1146-1152.

*IEEE Journal of Solid-State Circuits*, 32(2), 187-197.

185-194.

50(1), 12-18.

*sors*, 10, 9139-9154.

*(ICSPCC)*, 1-5.

#### **Author details**

Fernando de S. Campos\* , José Alfredo C. Ulson, José Eduardo C. Castanho and Paulo R. Aguiar

\*Address all correspondence to: fcampos@feb.unesp.br

Univ. Estadual Paulista "Júlio de Mesquita Filho" (UNESP) – Bauru campus, Brazil

#### **References**


[8] Kavadias, S., Diericks, B., Scheffer, D., Alaerts, A., Uwaerts, D., & Bogaerts, J. (2000). A Logarithmic Response CMOS Image Sensor with On-Chip Calibration. *IEEE Jour‐ nal of Solid-State Circuits*, 35(8), 1146-1152.

**6. Conclusions**

328 Photodiodes - From Fundamentals to Applications

**Author details**

Paulo R. Aguiar

**References**

Fernando de S. Campos\*

The temporal noise analysis of APS in time domain was presented. Theoretical noise analy‐ sis indicated that the noise is constant when APS operates in time domain. The SNR is ap‐ proximately constant when APS operates in time domain while the literature indicates that the SNR of APS operating in voltage domain drops at lower light intensities. Therefore, the results indicate that the operation in time domain is more suitable for low noise applica‐

, José Alfredo C. Ulson, José Eduardo C. Castanho and

Univ. Estadual Paulista "Júlio de Mesquita Filho" (UNESP) – Bauru campus, Brazil

[1] Brouk, I., Nemirovisky, A., Alameh, K., & Nemirovsky, Y. (2010). Analysis of noise in CMOS image sensor based on a unified time-dependent approach. *Journal Solid-State*

[2] Campos, F. S., Marinov, O., Faramarzpour, N., Saffih, F., Deen, M. J., & Swart, J. W. (2008). A multisampling time-domain CMOS imager with synchronous readout cir‐

[3] Choubey, B., Aoyama, S., Otim, S., Joseph, D., & Collins, S. (2006). An Electronic-Cal‐ ibration Scheme for Logarithmic CMOS Pixels. *IEEE Sensors Journal*, 6(4), 950-956. [4] Chen, Y., Xu, Y., Mierop, A. J., & Theuwissen, A. J. P. (2012). Column-Parallel digital correlated multiple sampling for low-noise CMOS image sensors. *IEEE Sensors Jour‐*

[5] Derli, Y., Lavernhe, F., Magnan, P., & Farre, J. A. (2000). Analysis and reduction of signal readout circuitry temporal noise in CMOS image sensors for low-light levels.

[6] Fossum, E. R. (1997). CMOS Image Sensors: Electronic Camera-On-a-Chip. *IEEE*

[7] Fujimori, I. L., Ching-Chun, W., & Sodini, C. G. (2002). A 256x256 CMOS Differential Passive Pixel Imager with FPN Reduction Techniques. *IEEE Journal of Solid-State Cir‐*

cuit. *Analog Integrated Circuits and Signal Processing Journal*, 57, 151-159.

*IEEE Transactions on Electron Devices*, 47(5), 949-962.

*Transactions on Electron Devices*, 44(10), 1689-1698.

tions. Experimental results are in agreement with theoretical analysis.

\*Address all correspondence to: fcampos@feb.unesp.br

*Electronics*, Elsevier, 54(1), 28-36.

*nal*, 12(4), 793-799.

*cuits*, 35(12), 2031-2037.


**Chapter 11**

**Design of Multi Gb/s Monolithically**

**SOI CMOS Technology**

Aryan Afzalian and Denis Flandre

http://dx.doi.org/ 10.5772/50531

**1. Introduction**

Additional information is available at the end of the chapter

tor and transimpedance amplifier (TIA), is required.

**Integrated Photodiodes and Multi-Stage**

**Transimpedance Amplifiers in Thin-Film**

The development of new integrated high-speed Si receivers is requested for short distance optical data link and emerging optical storage (OS) systems, notably for the Gb/s Ethernet standard [1] - [8] and Blue DVD (Blu-Ray, HDDVD) [3], [4], [9]. As requirements on band‐ width, gain, power consumption as well as low read-out noise and cost are quite severe, an optimal design strategy of a monolithically integrated solution, i.e. with on-chip photodetec‐

In optical communication, however, non integrated detectors are usually employed [2] - [8] since the particular indirect energy band properties of Silicon make this semiconductor not very efficient for optical reception at 850nm wavelength. As Si is the most widely used and low cost semiconductor material in electronics and due to the availability of low-cost 850nm transmitters, there is yet a great interest and challenge to integrate such receivers. 1 to 10 Gb/s, high sensitivity and low complexity, low-cost silicon photodetectors for the monolith‐ ic integration of optical receivers for short distance applications at 850nm are really an is‐ sue as the Si absorption thickness required for high-speed (low transit time and low capacitance) favors thin-film technologies for which the responsivity is low. Some solu‐ tions exist but at the price of more costly and complex fabrication processes [10-16]. At the system level, owing to its low dark current (pA range) [17], low capacitor (10fF) for the pho‐ todetector [1] and possibility to integrate this detector with high-performance low-capaci‐ tance transistors, global thin-film SOI monolithically integrated photoreceivers have

> © 2012 Afzalian and Flandre; licensee InTech. This is an open access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

© 2012 Afzalian and Flandre; licensee InTech. This is a paper distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use,

distribution, and reproduction in any medium, provided the original work is properly cited.

**Chapter 11**
