**Noise Performance of Time-Domain CMOS Image Sensors**

Fernando de S. Campos, José Alfredo C. Ulson, José Eduardo C. Castanho and Paulo R. Aguiar

Additional information is available at the end of the chapter

http://dx.doi.org/10.5772/51584

#### **1. Introduction**

Temporal noise is the main disadvantage of CMOS image sensors when compared to charg‐ ed couple devices (CCDs) sensor. The typical 3T active pixel sensor (APS) architecture presents as main noise sources the photodiode shot noise, the reset transistor and follower thermal and shot noise, the amplifier thermal and 1/f noise, the column amplifier thermal and reset noise (Zheng, 2011; Brouk, 2010; Jung, 2005; Tian, 2001; Derli, 2000; Yadid-Pecht, 1997). In order to reduce the APS noise several approaches have been proposed in the litera‐ ture. Some of these approaches are the use of high gain preamplifiers, correlated multiple sampling (CMS) and low bandwidth column-parallel single slope A/D converters (Sakaki‐ bara, 2005; Kawai, 2004; Suh, 2010; Lim, 2010; Yoshihara, 2006; Chen, 2012). However, APS in time domain has as advantage to show lower source of noise since it is composed only by a photodiode, a reset transistor and a voltage comparator. It shows as noise source only the reset transistor and the photodiode. Therefore, in principle, APS in time domain may presents lower overall noise.

The only two main noise source of APS in time domain are the reset noise and the integra‐ tion noise. The source of reset noise is the incomplete reset operation. Tian et al. 2001, show that APS operates usually with incomplete reset operation. The incomplete reset operation originates a random reset voltage that varies from frame to frame as a source noise. It have been found that the reset noise is *kT/2C ph*. During the integration period, the photodiode shot noise predominates generating a integration noise that is a function of the integration time, the photocurrent and the dark current. Altought the reset noise is the same to APS in voltage domain and in time domain, the integration noise must present different behavior in both approach. We show that while the integration time increases at higher photocurrents in

© 2012 de S. Campos et al.; licensee InTech. This is an open access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. © 2012 de S. Campos et al.; licensee InTech. This is a paper distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

the voltage domain approach, the integration time is approximately constant at time domain approach. In this chapter the conventional frequency domain noise is not used. Instead, a temporal analysis is presented as proposed by (Tian, 2001).

The fixed-pattern noise (FPN) is the non-uniformity introduced in image due to parameters variation from pixel to pixel. It is one of main disadvantage of APS when compared to CCDs. In general, the FPN can be reduced by applying double sampled correlated (CDS). Figure 3 shows a simple circuit that can be used to implement CDS. The CDS operation is comprised by three steps; (1) sample and hold the reset signal, (2) sample and hold the sig‐

Noise Performance of Time-Domain CMOS Image Sensors

http://dx.doi.org/10.5772/51584

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The photogate is another type of CMOS photodetector widely used (Fujimori, 2002; Sccher‐ back, 2003; Mendis, 1997). The photogate is composed by a MOS capacitance, a pass transis‐ tor and a floating diffusion as shown in Figure 4 (Fossum, 1997). The photogeneration occurs in the depletion region of the MOS capacitor. The photogate operation can be separated in‐ to four stages (i) integration, (ii) the floating diffusion reset, (iii) transfer the load to the MOS

nal after the integration time and (3) subtraction of signals of steps (1) and (2).

**Figure 2.** APS operation in voltage domain.

**Figure 3.** Simple CDS circuit.
