**1. Introduction**

The development of new integrated high-speed Si receivers is requested for short distance optical data link and emerging optical storage (OS) systems, notably for the Gb/s Ethernet standard [1] - [8] and Blue DVD (Blu-Ray, HDDVD) [3], [4], [9]. As requirements on band‐ width, gain, power consumption as well as low read-out noise and cost are quite severe, an optimal design strategy of a monolithically integrated solution, i.e. with on-chip photodetec‐ tor and transimpedance amplifier (TIA), is required.

In optical communication, however, non integrated detectors are usually employed [2] - [8] since the particular indirect energy band properties of Silicon make this semiconductor not very efficient for optical reception at 850nm wavelength. As Si is the most widely used and low cost semiconductor material in electronics and due to the availability of low-cost 850nm transmitters, there is yet a great interest and challenge to integrate such receivers. 1 to 10 Gb/s, high sensitivity and low complexity, low-cost silicon photodetectors for the monolith‐ ic integration of optical receivers for short distance applications at 850nm are really an is‐ sue as the Si absorption thickness required for high-speed (low transit time and low capacitance) favors thin-film technologies for which the responsivity is low. Some solu‐ tions exist but at the price of more costly and complex fabrication processes [10-16]. At the system level, owing to its low dark current (pA range) [17], low capacitor (10fF) for the pho‐ todetector [1] and possibility to integrate this detector with high-performance low-capaci‐ tance transistors, global thin-film SOI monolithically integrated photoreceivers have

© 2012 Afzalian and Flandre; licensee InTech. This is an open access article distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. © 2012 Afzalian and Flandre; licensee InTech. This is a paper distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

potentially higher gain and lower noise performances which in turn, as we will show here, can increase the IC-sensitivity and alleviate this requirement on the photodetector itself. Fur‐ thermore only SOI photodiodes have so far achieved bandwidth compatible with the 10Gb/ s specification and even higher data rate among the "easy to integrate" Si photodetectors [1], [15], [16] and [18].

**2. Optical Receivers Basics**

**2.1 The simple Resistor Optical Receiver**

The optical receiver is a key element in the optical link. It performs the optical to elec‐ trical conversion. The receiver consists of a photodetector followed by a preamplifier and eventually one or more post-amplifiers. The performance of an optical receiver is mainly determined by the preamplifier - photodiode combination. In high-speed commu‐ nication links, the two most important specifications are speed and sensitivity. In many cases, the speed is fixed by the application, while the sensitivity has to be maxi‐ mized. The ultimate limitation is noise. The main noise sources are the photodiode and the preamplifier. In a good design, the latter contribution is minimal. Little noise is add‐ ed when no active components are used in the preamplifier. This is the case for the sim‐ plest preamplifier possible presented in fig. 1a: a simple resistor *RL* that performs both the current - voltage conversion and the preamplification. In this figure, the simple re‐ ceiver is followed by a buffering amplifier with gain A. Its major drawback is the lim‐ ited maximal achievable bandwidth when low noise is important. For an input current

Design of Multi Gb/s Monolithically Integrated Photodiodes and Multi-Stage Transimpedance Amplifiers in Thin-Film

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*iph*, the output voltage of the simple optical receiver of fig. 1 a) is given by:

**Figure 1.** a) Simple photodiode-resistor receiver, followed by a voltage amplifier. b) Transimpedance Amplifier.

in which *Cph* is the total photodiode capacitance and *CinA* is the input capacitance of the volt‐

The bandwidth is limited by *Cph* which is often much bigger than *CinA* and the transimpe‐ dance-gain *RL* of the very first stage. As a result, the required bandwidth constrains the max‐

1 + *<sup>s</sup>*.*RL* .(*Cph* <sup>+</sup> *CinA*) ).*<sup>A</sup>* (1)

*RL* .(*Cph* <sup>+</sup> *CinA*) (2)

*vout* <sup>=</sup>*RL* .*iph* .( <sup>1</sup>

age amplifier. The bandwidth of this simple receiver is thus given by:

*BWRdiode* <sup>=</sup> <sup>1</sup>

In the blue and UV wavelengths, these diodes achieve a high responsivity [17] and then com‐ bine all the advantages of high speed, low dark current and finally high sensitivity [1]. This makes SOI receivers the best candidate for blue DVD applications and future optical storage generation. This also suggests that blue wavelength for multi Gb/s short reach optical commu‐ nication could be used in a near future under the condition that the recent progresses in blue emitting sources make them available [17, 19].

We present here a top-down design methodology, fully validated by Eldo circuit simulations [20] and experimental measurements, which allows to predict and optimize, starting from the speed requirements and the technological parameters, the architecture and performances of the receiver. Our approach generalizes the one proposed in [21] to all inversion regimes. In ad‐

dition our design strategy is based on the *gm id* methodology [22] and allows one to optimize the diode and the transimpedance in a simultaneous way. Thanks to this modeling and the low ca‐ pacitance of thin-film integrated SOI photodiodes, we have optimized various monolithic op‐ tical front-end suitable for 1 to 10 Gb/s short distance communication or Blue DVD applications that show the potentials of 0.13*μm* Partially-Depleted (PD) SOI CMOS implemen‐ tation in terms of gain, sensitivity, power consumption, area and noise.

In section 2 (Optical Receivers Basics), the simple resistor system is first presented as well as its limitations. The transimpedance amplifier is then introduced and its basic theory and concepts such as transimpedance gain, bandwidth and stability are derived. Important parameters to compare transimpedance amplifiers are also discussed as well as architectures most often used in the high speed communication area. Then in section "Design of Multistage Transimpedance Amplifiers", we present our top-down methodology to design transimpedance amplifiers in the case where the voltage gain of the voltage amplifier used in the TIA is independent of the feedback resistor *Rf* . This is usually the case when the TIA bandwidth is not too close to the transistors frequency limit *ft* of a given technology and leads to a multi-stage approach. Our de‐ sign procedure is then applied to the design of a 3 stages 1GHz bandwidth transimpedance amplifier in a 0.13 *μm* PD-SOI CMOS technology. Finally, in section "Single stage Transimpe‐ dance Amplifier Modeling", we present a top-down methodology to design transimpedance amplifiers when the voltage gain depends on *Rf* . This is the case for very high-speed singlestage transimpedance amplifiers. Our design procedure is then applied to the design of a sin‐ gle stage 10GHz bandwidth transimpedance amplifier in a 0.13 *μm* PD-SOI CMOS technology and to the design of a 1GHz bandwidth single stage TIA in a 0.5 *μm* FD-SOI CMOS technology.
