**7. References**

	- URL: *http://dx.doi.org/10.1155/2009/382983*

18 Will-be-set-by-IN-TECH

computers. When that time comes it will be expected that the FPGAs will be technological

At the end, we believe that the HPC future is going to be built of heterogeneous cluster, composed by these three technologies (CPUs, GPUs and FPGAs). These clusters will have an special operating system (O.S.) that will take advantage of each of these technologies, reducing

The authors wish to thank the Universidad Industrial de Santander (UIS), in particular the research group in Connectivity and Processing of Signals (CPS), head by Professor Jorge H. Ramon S. who has unconditionally been supporting our research work. Additionally we thank also to the Instituto Colombiano del Petroleo (ICP) for their constant support in recent years, especially thanks to Messrs William Mauricio Agudelo Zambrano and Andres Eduardo

[1] Abreo, S. & Ramirez, A. [2010]. Viabilidad de acelerar la migración sísmica 2D usando un procesador específico implementado sobre un FPGA The feasibility of speeding up 2D seismic migration using a specific processor on an FPGA, *Ingeniería e investigación*

[3] Andraka, R. [1998]. A survey of cordic algorithms for fpga based computers, *Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays*,

[4] Araya-polo, M., Cabezas, J., Hanzich, M., Pericas, M., Gelado, I., Shafiq, M., Morancho, E., Navarro, N., Valero, M. & Ayguade, E. [2011]. Assessing Accelerator-Based HPC

[5] Asanovic, K., Bodik, R., Catanzaro, B. C., Gebis, J. J., Husbands, P., Keutzer, K., Patterson, D. A., Plishker, W. L., Shalf, J., Williams, S. W. & Yelick, K. A. [2006]. The landscape of parallel computing research: A view from berkeley, *Technical Report UCB/EECS-2006-183*,

[6] Bednar, J. B. [2005]. A brief history of seismic migration, *Geophysics* 70(3): 3MJ–20MJ. [7] Bier, J. & Eyre, J. [Second Quarter 2010]. BDTI Study Certifies High-Level Synthesis

[8] Bit-tech staff. [n.d.]. Intel sandy bridge review., http://www.bit-tech.net/.

[9] Brodtkorb, A. R., Dyken, C., Hagen, T. R. & Hjelmervik, J. M. [2010]. State-of-the-art in

URL: *http://www.eecs.berkeley.edu/Pubs/TechRpts/2006/EECS-2006-183.html*

Flows for DSP-Centric FPGA Designs, *Xcell Journal Second* pp. 12–17.

the three barriers effect and getting the best performance in each application.

Sergio Abreo, Carlos Fajardo, William Salamanca and Ana Ramirez

[2] *Altera* [n.d.]. http://www.altera.com/. Reviewed: April 2012.

FPGA '98, ACM, New York, NY, USA, pp. 191–200. URL: *http://doi.acm.org/10.1145/275107.275139*

Reverse Time Migration, *Electronic Design* 22(1): 147–162.

EECS Department, University of California, Berkeley.

heterogeneous computing, *Scientific Programming* 18: 1–33.

*Universidad Industrial de Santander, Colombia*

mature and can take the HPC baton during the next years.

**Acknowledgments**

Calle Ochoa.

**Author details**

**7. References**

30(1): 64–70.

Reviewed: April 2012.


102 New Technologies in the Oil and Gas Industry **Chapter 0 Chapter 5**
