**Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration**

Ji Fan and Chuan Seng Tan

Additional information is available at the end of the chapter

http://dx.doi.org/10.5772/48216

### **1. Introduction**

70 Metallurgy – Advances in Materials and Processes

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### **1.1. Background of 3D integration**

The past few decades have seen the rapid development in computing power and wireless communication achieved through invention of new technologies, discovery of new semiconductor materials and application of new fabrication processes. These innovations have enabled the placement of large number of high performance transistors which are commensurate with scaling on an integrated circuit and the transistor count doubles approximately every 18 months, which is famously known as Moore's law as described by Gorden Moore (Moore, 1998) and modified by Davide House (Kanellos, 2003). Since small and efficient system is always the ultimate objective for semiconductor industry development, 3D integration emerges as a suitable candidate for mainstream packaging and interconnection technology in the future as geometrical scaling is faced with unprecedented scaling barriers from the fundamental and economics fronts.

The development of vertically integrated devices could date back to the early1980s (Pavlidis&Friedman, 2009). One of the first successful 3D structure just includes a positivechannel metal oxide semiconductor (PMOS) and a negative-channel metal oxide semiconductor (NMOS) transistors which share the same gate electrode to reduce the total area of the inverter (Gibbons&Lee, 1980; Goeloe et al., 1981). After 30 years of continuous development, 3D integration technology has infiltrated into all the domains of semiconductor, such as combination of logic and memory circuit (Beyne, 2006), sensor packaging (Yun et al., 2005), heterogeneous integration of MEMS and CMOS (Lau et al., 2009), etc. More importantly, 3D integration technology is not only used for form-factor miniaturization, but also for achieving excellent performance, low power consumption, high integration capability, and low cost (Tan et al., 2011).

© 2012 Fan and Tan, licensee InTech. This is an open access chapter distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. © 2012 Fan and Tan, licensee InTech. This is a paper distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

### **1.2. Motivation for research in 3D integration**

In order to keep up with the needs of the astonishing development in the functionality of portable devices and of computational systems, integration technology has been investigated over the past three decades. 3D integration technology is widely defined as the technology which can integrate the disparate device layers in a multi-strata vertical stacking way (Young&Koester, 2010) with electrical interconnects by vertical inter-layer vias. Fig. 1 schematically presents the concept of 2D and 3D integration circuit. Further requirements on form factor reduction, performance improvement, and heterogeneous integration will make 3D integration a plausible choice as the next generation of microsystem manufacturing technology, as it can provide an excellent connection density higher than 104/mm2 (Beyne, 2006) for developing "More than Moore" scaling.

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 73

stacking technology, more functional devices can be integrated in one synchronous region,

The third, and maybe the most attractive, advantage of 3D integration technology is heterogeneous integration (Beyne, 2006). Although system-on-a-chip (SoC) is an attractive solution to integrate multiple functionalities on a single chip, specific optimization for each functional blocks on the same substrate may make SoC devices with large numbers of functional blocks very difficult to achieve. Furthermore, compatibility between different substrates might cause potential contamination or signal corruption. If high density 3D integration technology is available, it is a very attractive method for a "3D-SoC" device manufacturing. With this method, each functional block can be optimized separately and assembled in a vertical fashion. Since there is no common substrate, the problems caused by compatibility between different substrates are expected to be less severe. Fig. 2 shows an example for heterogeneous TSV-less integration method of CMOS and MEMS whereby the CMOS layer can be used as an 'active capping' layer for the sensitive MEMS layer. In order to provide a hermetic ambient for proper operation, the seal ring is formed in the trench of SOI MEMS wafer during the device layer DRIE etching. The electrode pad of MEMS is bonded to a connection pad on the CMOS die and will be routed to external by using lower metal layers in the CMOS chip. Metallization process can be realized during the SOI MEMS fabrication.

**Figure 2.** TSV-less 3D integration heterogeneous of MEMS and CMOS (Nadipalli et al., 2012).

Bonding technologies have been reported as an imperative packaging and integration method for 3D IC stacking. It can be split into three schemes according to the fabrication approach: wafer to wafer, chip to wafer and chip to chip, as shown in Fig. 3. The ability of wafer to wafer bonding technology can effectively increase the throughput, making it a cost-effective manufacturing approach, but the unstable number of known-good-die (KGD) which is determined by the device layer might be the a drawback for this stacking method. Therefore, chip to wafer bonding and chip to chip bonding can assure that the vertical stacking will be only executed with the good dies. Since mass production is the primary commercial and

**2. Overview on bonding technologies in 3D integration** 

thus increasing the computational speed.

The original purpose of 3D structure is system-size reduction. Traditional 2D integration technologies individually assemble different functional dies on a planar substrate or in a printed circuit broad. The packaging area of individual die is generally needed and an additional spacing between disparate functional blocks is typically required, thus reducing the integration density to a very low level. By stacking the device layers in a vertical way, a highly integrated circuit can be achieved. Since the substrate area is the first consideration, high integration density can increase the number of devices or functional blocks per chip area, which in turn miniaturizes the form-factor.

High performance requirement is another important reason for research in 3D integration. As the dimension of functional blocks continues to shrink and the emergence of large scale integration (LSI) technology, or even very large scale integration (VLSI) technology in recent years, the interconnects in an integrated circuit has begun to dominate the overall circuit performance. As a result of long interconnect length, interconnect latency and power consumption will increase. Therefore, the number of long wires is identified as the bottleneck in the planar (2D) integration. In comparison with 2D design, 3D integration technology based on flip-chip, micro-bump connection and through silicon via (TSV) technologies can ease this interconnect bottle-neck and thus results in a lower propagation delay and power consumption. More importantly, in one synchronous operation mode, onchip signal can only propagate in a limited distance. In other words, large chip size usually requires more clock cycles for on-chip signal to travel across the entire circuit. Using 3D

**Figure 1.** Different approaches of integration technology.

stacking technology, more functional devices can be integrated in one synchronous region, thus increasing the computational speed.

72 Metallurgy – Advances in Materials and Processes

**1.2. Motivation for research in 3D integration** 

2006) for developing "More than Moore" scaling.

**Figure 1.** Different approaches of integration technology.

(a) 2D integration circuit (b) 3D integration circuit

area, which in turn miniaturizes the form-factor.

In order to keep up with the needs of the astonishing development in the functionality of portable devices and of computational systems, integration technology has been investigated over the past three decades. 3D integration technology is widely defined as the technology which can integrate the disparate device layers in a multi-strata vertical stacking way (Young&Koester, 2010) with electrical interconnects by vertical inter-layer vias. Fig. 1 schematically presents the concept of 2D and 3D integration circuit. Further requirements on form factor reduction, performance improvement, and heterogeneous integration will make 3D integration a plausible choice as the next generation of microsystem manufacturing technology, as it can provide an excellent connection density higher than 104/mm2 (Beyne,

The original purpose of 3D structure is system-size reduction. Traditional 2D integration technologies individually assemble different functional dies on a planar substrate or in a printed circuit broad. The packaging area of individual die is generally needed and an additional spacing between disparate functional blocks is typically required, thus reducing the integration density to a very low level. By stacking the device layers in a vertical way, a highly integrated circuit can be achieved. Since the substrate area is the first consideration, high integration density can increase the number of devices or functional blocks per chip

High performance requirement is another important reason for research in 3D integration. As the dimension of functional blocks continues to shrink and the emergence of large scale integration (LSI) technology, or even very large scale integration (VLSI) technology in recent years, the interconnects in an integrated circuit has begun to dominate the overall circuit performance. As a result of long interconnect length, interconnect latency and power consumption will increase. Therefore, the number of long wires is identified as the bottleneck in the planar (2D) integration. In comparison with 2D design, 3D integration technology based on flip-chip, micro-bump connection and through silicon via (TSV) technologies can ease this interconnect bottle-neck and thus results in a lower propagation delay and power consumption. More importantly, in one synchronous operation mode, onchip signal can only propagate in a limited distance. In other words, large chip size usually requires more clock cycles for on-chip signal to travel across the entire circuit. Using 3D The third, and maybe the most attractive, advantage of 3D integration technology is heterogeneous integration (Beyne, 2006). Although system-on-a-chip (SoC) is an attractive solution to integrate multiple functionalities on a single chip, specific optimization for each functional blocks on the same substrate may make SoC devices with large numbers of functional blocks very difficult to achieve. Furthermore, compatibility between different substrates might cause potential contamination or signal corruption. If high density 3D integration technology is available, it is a very attractive method for a "3D-SoC" device manufacturing. With this method, each functional block can be optimized separately and assembled in a vertical fashion. Since there is no common substrate, the problems caused by compatibility between different substrates are expected to be less severe. Fig. 2 shows an example for heterogeneous TSV-less integration method of CMOS and MEMS whereby the CMOS layer can be used as an 'active capping' layer for the sensitive MEMS layer. In order to provide a hermetic ambient for proper operation, the seal ring is formed in the trench of SOI MEMS wafer during the device layer DRIE etching. The electrode pad of MEMS is bonded to a connection pad on the CMOS die and will be routed to external by using lower metal layers in the CMOS chip. Metallization process can be realized during the SOI MEMS fabrication.

**Figure 2.** TSV-less 3D integration heterogeneous of MEMS and CMOS (Nadipalli et al., 2012).

### **2. Overview on bonding technologies in 3D integration**

Bonding technologies have been reported as an imperative packaging and integration method for 3D IC stacking. It can be split into three schemes according to the fabrication approach: wafer to wafer, chip to wafer and chip to chip, as shown in Fig. 3. The ability of wafer to wafer bonding technology can effectively increase the throughput, making it a cost-effective manufacturing approach, but the unstable number of known-good-die (KGD) which is determined by the device layer might be the a drawback for this stacking method. Therefore, chip to wafer bonding and chip to chip bonding can assure that the vertical stacking will be only executed with the good dies. Since mass production is the primary commercial and manufacturing consideration in future, both chip-to-wafer and wafer-to-wafer technologies will gradually become the mainstream for 3D stacking and packaging (Ko&Chen, 2010).

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 75

electrical contact and mechanical support to be formed between two wafers in one simultaneous step. Examples of such bonding technology include metal diffusion bonding

Dielectric bonding and metallic bonding can be combined to one emerging approach for 3D integration as well. The research work by McMahon *et al.* (Mcmahon et al., 2005) presents a wafer bonding of metal/adhesive damascene-patterned providing inter layer electrical interconnects via Cu-Cu bonding and mechanical support via adhesive bonding (BCB) of two wafers in one unit processing step. IMEC (Interuniversity Microelectronics Centre, Belgium) developed this technology and was formally named as "Hybrid Bonding"

**3. Low temperature wafer-level metal thermo-compression bonding for** 

Pure metal and alloy material are widely used in bonding technology for 3D integration. The description in this section is specific on two types of metal based low temperature thermo-compression bonding technologies: copper diffusion bonding and copper/tin eutectic bonding. The following description includes the comparison of different metal bonding materials, the principle of bonding process and performance of reported work. Oxide fusion bonding which is also widely investigated in 3D integration is included for

As the name implies, thermo-compression bonding contains two important elements: heat and pressure. Metal bonding surfaces are brought into contact with the application of force and heat simultaneously. Atomic motion (for metal diffusion bonding) or alloy formation (for eutectic bonding) will occur at the bonding interface during this process. Due to surface oxidation and some specific alloy formation, high temperature is usually required for achieving high bonding quality, but practical packaging and integration should be achieved at adequately low temperature (typically 300°C or below) for prefabricated devices which are sensitive to high temperature processing owing to thermal budget limitation, the postbonding thermo-mechanical stress control, and alignment accuracy improvement (Tan et al., 2009). Although it is commonly known that the quality of thermo-compression bonding can usually be ameliorated when the bonding temperature increases, the current mainstream research focuses on achieving high bonding quality at temperature as low as possible for the

Metal diffusion bonding is also referred as pressure joining, thermo-compression welding or solid-state welding. Bonding interfaces will fuse together due to atomic interaction under

considerations of cost reduction and high throughput manufacturing.

and eutectic bonding will be presented in details in next section.

(Jourdain et al., 2007; Jourdain et al., 2009).

comparison at the end of this section as well.

**3.1. Why low temperature?** 

**3.2. Metal diffusion bonding** 

heat and pressure.

**3D integration** 

**Figure 3.** Different bonding technologies for 3D Integration circuit according to fabrication approach.

Based on the bonding materials, bonding technology can fall into dielectric bonding and metallic bonding. Since the dielectric materials are used, the device layers are isolated from each other and a "via-last" process is followed. Devices layers are firstly bonded in a vertical stack, and then the vertical vias are etched through the devices layers for vertical interconnects between each layer. Therefore, high aspect ratio vias are usually needed. The most leading dielectric bonding methods used in 3D integration include adhesive bonding and oxide fusion bonding.

Adhesive bonding, also known as polymer bonding, usually uses polymers and inorganic adhesive as the intermediate bonding materials. Since a layer of polymer or inorganic adhesive is always spun before bonding, it is very suitable for non-uniform surfaces and for bonding at low temperature. Benzocyclobutene (BCB) and SU-8 are the most common materials used in 3D integration, since high bonding strength can be easily achieved with these two polymer materials (Niklaus et al., 2001; Pan et al., 2002).

Oxide fusion bonding requires a very low surface roughness (root mean square roughness < 1 nm) and the process is often followed by a post-bonding annealing. The bonding step for fusion bonding refers to spontaneous adhesion process of two wafers when they are placed in direct contact. The surface activation which enables the wafer pair to have a stronger spontaneous adhesion is usually applied before bonding. This bonding technology is not only limited between Si-to-Si and SiO2-to-SiO2, but some high-*k* dielectric materials, such as Al2O3, HfO2, and TiO2 (Chong&Tan, 2009) are also employed to achieve a higher bonding strength for a given anneal temperature and duration.

Device layers bonded with a conductive metallic layers is a very attractive choice, as it allows "via-first" and "via-middle" approaches for 3D IC integration. Therefore, the requirement for high aspect ratio via can be relaxed. On the other hand, metal is a good heat conductor which will help to circumvent the heat dissipation problem encountered in 3D ICs. At the same time, the use of metal as bonding material in 3D applications allows the electrical contact and mechanical support to be formed between two wafers in one simultaneous step. Examples of such bonding technology include metal diffusion bonding and eutectic bonding will be presented in details in next section.

Dielectric bonding and metallic bonding can be combined to one emerging approach for 3D integration as well. The research work by McMahon *et al.* (Mcmahon et al., 2005) presents a wafer bonding of metal/adhesive damascene-patterned providing inter layer electrical interconnects via Cu-Cu bonding and mechanical support via adhesive bonding (BCB) of two wafers in one unit processing step. IMEC (Interuniversity Microelectronics Centre, Belgium) developed this technology and was formally named as "Hybrid Bonding" (Jourdain et al., 2007; Jourdain et al., 2009).

### **3. Low temperature wafer-level metal thermo-compression bonding for 3D integration**

Pure metal and alloy material are widely used in bonding technology for 3D integration. The description in this section is specific on two types of metal based low temperature thermo-compression bonding technologies: copper diffusion bonding and copper/tin eutectic bonding. The following description includes the comparison of different metal bonding materials, the principle of bonding process and performance of reported work. Oxide fusion bonding which is also widely investigated in 3D integration is included for comparison at the end of this section as well.

### **3.1. Why low temperature?**

74 Metallurgy – Advances in Materials and Processes

manufacturing consideration in future, both chip-to-wafer and wafer-to-wafer technologies will gradually become the mainstream for 3D stacking and packaging (Ko&Chen, 2010).

**Figure 3.** Different bonding technologies for 3D Integration circuit according to fabrication approach.

methods used in 3D integration include adhesive bonding and oxide fusion bonding.

these two polymer materials (Niklaus et al., 2001; Pan et al., 2002).

strength for a given anneal temperature and duration.

Based on the bonding materials, bonding technology can fall into dielectric bonding and metallic bonding. Since the dielectric materials are used, the device layers are isolated from each other and a "via-last" process is followed. Devices layers are firstly bonded in a vertical stack, and then the vertical vias are etched through the devices layers for vertical interconnects between each layer. Therefore, high aspect ratio vias are usually needed. The most leading dielectric bonding

Adhesive bonding, also known as polymer bonding, usually uses polymers and inorganic adhesive as the intermediate bonding materials. Since a layer of polymer or inorganic adhesive is always spun before bonding, it is very suitable for non-uniform surfaces and for bonding at low temperature. Benzocyclobutene (BCB) and SU-8 are the most common materials used in 3D integration, since high bonding strength can be easily achieved with

Oxide fusion bonding requires a very low surface roughness (root mean square roughness < 1 nm) and the process is often followed by a post-bonding annealing. The bonding step for fusion bonding refers to spontaneous adhesion process of two wafers when they are placed in direct contact. The surface activation which enables the wafer pair to have a stronger spontaneous adhesion is usually applied before bonding. This bonding technology is not only limited between Si-to-Si and SiO2-to-SiO2, but some high-*k* dielectric materials, such as Al2O3, HfO2, and TiO2 (Chong&Tan, 2009) are also employed to achieve a higher bonding

Device layers bonded with a conductive metallic layers is a very attractive choice, as it allows "via-first" and "via-middle" approaches for 3D IC integration. Therefore, the requirement for high aspect ratio via can be relaxed. On the other hand, metal is a good heat conductor which will help to circumvent the heat dissipation problem encountered in 3D ICs. At the same time, the use of metal as bonding material in 3D applications allows the As the name implies, thermo-compression bonding contains two important elements: heat and pressure. Metal bonding surfaces are brought into contact with the application of force and heat simultaneously. Atomic motion (for metal diffusion bonding) or alloy formation (for eutectic bonding) will occur at the bonding interface during this process. Due to surface oxidation and some specific alloy formation, high temperature is usually required for achieving high bonding quality, but practical packaging and integration should be achieved at adequately low temperature (typically 300°C or below) for prefabricated devices which are sensitive to high temperature processing owing to thermal budget limitation, the postbonding thermo-mechanical stress control, and alignment accuracy improvement (Tan et al., 2009). Although it is commonly known that the quality of thermo-compression bonding can usually be ameliorated when the bonding temperature increases, the current mainstream research focuses on achieving high bonding quality at temperature as low as possible for the considerations of cost reduction and high throughput manufacturing.

### **3.2. Metal diffusion bonding**

Metal diffusion bonding is also referred as pressure joining, thermo-compression welding or solid-state welding. Bonding interfaces will fuse together due to atomic interaction under heat and pressure.

### *3.2.1. Comparison of different diffusion bonding materials*

The common metal materials for metal diffusion bonding are aluminum (Al-Al), gold (Au-Au) and copper (Cu-Cu). Table 1 shows a comparison of physical properties of these metals in the context of metal diffusion bonding. Among these metals, Al-Al bonding is hard to achieve with low bonding temperature and low bonding force, most likely because it gets oxidized readily in ambient conditions. In addition, its relatively higher coefficient of thermal expansion (CTE) in comparison with that of silicon wafer will result in larger wafer bow during cooling. This poses difficulty in achieving high quality bonding for Al-Al especially across large area. On the other hand, even though the bonding temperature for Au-Au is generally about 300°C, its prohibitively high cost is the major roadblock for widespread use except for high end applications. Cu emerges as an attractive choice in terms of its lower cost and the ability to bond Cu at moderately low temperature. Furthermore, Cu presents a number of advantages in terms of its physical properties that suit the final application such as better electrical conductivity, mechanical strength and electro-migration resistance. Therefore, with these superior material properties, low temperature Cu bonding will be the candidate for mainstream 3D integration application.

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 77

acquire sufficient energy to diffuse rapidly and Cu grain begins to grow. In order to obtain a higher bonding strength, Cu diffusion must happen across the bonding interface and the grain growth also needs to progress across the interface. If the bonding duration is insufficient (e.g. 10 min or below), the inter-diffusion of Cu atoms across the bonding interface is limited. Thus Cu grain formation stops at bonding interface and bonding strength is reduced. More importantly, Cu gain across the bonding interface will reduce the number of grain boundaries, which will provide a high conductivity at the bonding interface. However, this difficulty can be overcome by an anneal step after bonding. Fig. 5 presents the comparison of bonding strength, measured by die shear strength testing, without and with anneal step after a short bonding duration. The samples are bonded and annealed at 250°C for 15 min and 1hr, respectively. The bonding strength presents a significant improvement when short bonding duration is followed by a anneal process.

**Figure 4.** Schematic showing the principal of formation of Cu diffusion bonding.

(c) Electroplating and CMP (d) Bonding

(a) Isolation layer deposition

(b) Seed layer deposition

without post-bonding anneal.

Cu diffusion bonding is based on Cu atom migration and grain growth. Therefore, the wafer pairs must be brought into an intimate contact at the atomic level by a uniform bonding force. Wafer bow and surface contamination are the critical factors that affect the bonding uniformity. The surface contamination can usually be reduced with tighter particle control or some surface treatment before bonding which will be presented in next section. As shown in Fig. 6, a Cu-coated wafer exhibits a wafer bow of ~15.9 μm based on wafer curvature measurement using a laser beam. This is a direct result of the huge difference in the CTE between Cu and Si (17 and 3 ×10-6 /K, respectively), and it might become bigger during the bonding process. Appropriate bonding force enables us to eliminate the drawback brought by the wafer bow and perform a highly uniform bonding. For the wafer pairs that exhibit wafer bow lower than 20 μm, high bonding uniformity can usually be achieved under a contact pressure of ~2000 mbar at 300°C for 1 hour


**Table 1.** Comparison of different metal diffusion bonding technologies (Fan et al., 2011).

### *3.2.2. Fundamentals of low temperature copper diffusion bonding*

Fig. 4 illustrates the formation principle of low-temperature Cu diffusion bonding. In order to isolate the substrate from the Cu bonding film, a thin film of dielectric, such as SiO2 is firstly deposited as the precursor (Fig. 4. a). Subsequently, the barrier layer, such as Ti or Ta which is used to thwart excessive Cu diffusion into Si and to ameliorate the adhesion between substrate and Cu film, and a thin Cu seed layer are deposited (Fig. 4. b). After that, Cu electroplating is applied to the required thickness of Cu layer depending on the applications (usually from several to a dozen of μm), followed by chemical mechanical planarization (CMP) (Fig. 4. c). Finally, the wafer pair is brought into contact in nitrogen (N2) or vacuum ambient under a contact force (e.g. 2500 mbar for a 6 inch wafer) and held typically at 300°C (or 250°C) for some time (e.g. 30 min and above) (Fig. 4. d).

Since the bonding temperature is fixed at low level, key parameters of low temperature Cu diffusion bonding are bonding duration and bonding force. During bonding, Cu atoms acquire sufficient energy to diffuse rapidly and Cu grain begins to grow. In order to obtain a higher bonding strength, Cu diffusion must happen across the bonding interface and the grain growth also needs to progress across the interface. If the bonding duration is insufficient (e.g. 10 min or below), the inter-diffusion of Cu atoms across the bonding interface is limited. Thus Cu grain formation stops at bonding interface and bonding strength is reduced. More importantly, Cu gain across the bonding interface will reduce the number of grain boundaries, which will provide a high conductivity at the bonding interface. However, this difficulty can be overcome by an anneal step after bonding. Fig. 5 presents the comparison of bonding strength, measured by die shear strength testing, without and with anneal step after a short bonding duration. The samples are bonded and annealed at 250°C for 15 min and 1hr, respectively. The bonding strength presents a significant improvement when short bonding duration is followed by a anneal process.

76 Metallurgy – Advances in Materials and Processes

*3.2.1. Comparison of different diffusion bonding materials* 

The common metal materials for metal diffusion bonding are aluminum (Al-Al), gold (Au-Au) and copper (Cu-Cu). Table 1 shows a comparison of physical properties of these metals in the context of metal diffusion bonding. Among these metals, Al-Al bonding is hard to achieve with low bonding temperature and low bonding force, most likely because it gets oxidized readily in ambient conditions. In addition, its relatively higher coefficient of thermal expansion (CTE) in comparison with that of silicon wafer will result in larger wafer bow during cooling. This poses difficulty in achieving high quality bonding for Al-Al especially across large area. On the other hand, even though the bonding temperature for Au-Au is generally about 300°C, its prohibitively high cost is the major roadblock for widespread use except for high end applications. Cu emerges as an attractive choice in terms of its lower cost and the ability to bond Cu at moderately low temperature. Furthermore, Cu presents a number of advantages in terms of its physical properties that suit the final application such as better electrical conductivity, mechanical strength and electro-migration resistance. Therefore, with these superior material properties, low temperature Cu bonding will be the candidate for mainstream 3D integration application.

Material Al-Al Au-Au Cu-Cu Temperature (°C) 450 ~300 250/300 Resistivity (μΩcm) 2.67 2.20 1.69 Melting Point (°C) 660.4 1064.4 1083 CTE (×10-6 /K) 23.5 14.1 17.0 Thermal Conductivity (W/ m K) 237 318 401 Cost (US\$/LB) 1.1798 25881.44 4.4198

**Table 1.** Comparison of different metal diffusion bonding technologies (Fan et al., 2011).

typically at 300°C (or 250°C) for some time (e.g. 30 min and above) (Fig. 4. d).

Fig. 4 illustrates the formation principle of low-temperature Cu diffusion bonding. In order to isolate the substrate from the Cu bonding film, a thin film of dielectric, such as SiO2 is firstly deposited as the precursor (Fig. 4. a). Subsequently, the barrier layer, such as Ti or Ta which is used to thwart excessive Cu diffusion into Si and to ameliorate the adhesion between substrate and Cu film, and a thin Cu seed layer are deposited (Fig. 4. b). After that, Cu electroplating is applied to the required thickness of Cu layer depending on the applications (usually from several to a dozen of μm), followed by chemical mechanical planarization (CMP) (Fig. 4. c). Finally, the wafer pair is brought into contact in nitrogen (N2) or vacuum ambient under a contact force (e.g. 2500 mbar for a 6 inch wafer) and held

Since the bonding temperature is fixed at low level, key parameters of low temperature Cu diffusion bonding are bonding duration and bonding force. During bonding, Cu atoms

*3.2.2. Fundamentals of low temperature copper diffusion bonding* 

**Figure 4.** Schematic showing the principal of formation of Cu diffusion bonding.

Cu diffusion bonding is based on Cu atom migration and grain growth. Therefore, the wafer pairs must be brought into an intimate contact at the atomic level by a uniform bonding force. Wafer bow and surface contamination are the critical factors that affect the bonding uniformity. The surface contamination can usually be reduced with tighter particle control or some surface treatment before bonding which will be presented in next section. As shown in Fig. 6, a Cu-coated wafer exhibits a wafer bow of ~15.9 μm based on wafer curvature measurement using a laser beam. This is a direct result of the huge difference in the CTE between Cu and Si (17 and 3 ×10-6 /K, respectively), and it might become bigger during the bonding process. Appropriate bonding force enables us to eliminate the drawback brought by the wafer bow and perform a highly uniform bonding. For the wafer pairs that exhibit wafer bow lower than 20 μm, high bonding uniformity can usually be achieved under a contact pressure of ~2000 mbar at 300°C for 1 hour without post-bonding anneal.

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 79

2H CuO Cu 2H O2 (1)

2H Cu O 2Cu 2H O 2 2 (2)

H CuO Cu 2H O 2 2 (3)

H Cu O 2Cu 2H O 2 2 2 (4)

In order to remove the surface oxide, surface treatments by soaking the wafers in acetic acid or dilute hydrochloric acid and followed by a forming gas purge in the bonding chamber are usually applied immediately before bonding (Tadepalli&Thompson, 2003). This removal

Since this reaction takes place very rapidly, the immersion is completed in a few minutes. The research work by Jang *et al.* (Jang et al., 2009) indicates that, for the consideration of bonding strength, the immersion time must less than 5 min for a thickness of bonding layer around 500 nm. If long time immersion is applied, the bonding strength will be reduced due to the decrease in plastic dissipation energy near the interfacial crack tips with thinner Cu

Oxygen content in the bonding layer can be reduced by pre-bonding forming gas anneal. Forming gas is a mixture of hydrogen and nitrogen (typically 5%H2:95%N2, by volume). The reactions with the Cu oxides are exothermic and can be principally represented as follows in

This pre-bonding anneal is an *in-situ* clean process, which presents no re-oxidation risk before bonding. Compared with anneal at high temperature, long anneal duration (e.g. 1 hour) at low temperature (typically at 250 or 300 °C) is preferred to eliminate the oxygen in the bonding layer, as high temperature takes the potential risk of unwanted damage in the

Even though the surface oxide removal by wet cleaning and oxide content reduction in the bonding layer by forming gas anneal have been widely investigated with some success, surface contamination of particles can still remain a challenge. Recently, a novel surface treatment using self-assembled monolayer (SAM) of alkane-thiol to passivate clean Cu surface immediately after metallization is applied. SAM application was first applied in wire bonding by IMEC in the area of microelectronic manufacturing (Whelan et al., 2003). Subsequently, this method is applied in the domain of fluxless solder, flip-chip bonding, and wafer-level Cu diffusion bonding. SAM of alkane-thiol formed by linear alkane-thiol molecules (CH3-(CH2)n-1-SH, n = number of carbon), and it can be dissolved in ethanol to a concentration of 1 mM for the passivation application in wafer-level Cu diffusion bonding.

process can be described by the following chemical equations (1) and (2):

*3.2.3.1. Wet etch method* 

film thickness caused by over etching.

*3.2.3.3. Self-assembled monolayer (SAM) passivation* 

*3.2.3.2. Forming gas anneal* 

(3) and (4):

device layer.

**Figure 5.** Comparison of bonding strength, without and with an anneal step after a short bonding duration.

**Figure 6.** Pre-bonding wafer bow based on wafer curvature measurement (Tan et al., 2011).

#### *3.2.3. Surface treatment before copper diffusion bonding*

The surface condition often refers to the oxidation at the Cu bonding surface. Since Cu surface oxidizes readily in ambient air to form cuprous oxide (red oxide) and cupric oxide (black oxide). These oxide layers impose a barrier to successful diffusion bonding at low temperature.

#### *3.2.3.1. Wet etch method*

78 Metallurgy – Advances in Materials and Processes

duration.

temperature.

**Figure 5.** Comparison of bonding strength, without and with an anneal step after a short bonding

**Figure 6.** Pre-bonding wafer bow based on wafer curvature measurement (Tan et al., 2011).

The surface condition often refers to the oxidation at the Cu bonding surface. Since Cu surface oxidizes readily in ambient air to form cuprous oxide (red oxide) and cupric oxide (black oxide). These oxide layers impose a barrier to successful diffusion bonding at low

*3.2.3. Surface treatment before copper diffusion bonding* 

In order to remove the surface oxide, surface treatments by soaking the wafers in acetic acid or dilute hydrochloric acid and followed by a forming gas purge in the bonding chamber are usually applied immediately before bonding (Tadepalli&Thompson, 2003). This removal process can be described by the following chemical equations (1) and (2):

$$2\text{H}^+ + \text{CuO} \rightarrow \text{ Cu} + 2\text{H}\natural\text{O} \tag{1}$$

$$\text{2H}^+ + \text{CuZnO} \rightarrow \text{2Cu} + \text{2H} \\ \text{2O} \tag{2}$$

Since this reaction takes place very rapidly, the immersion is completed in a few minutes. The research work by Jang *et al.* (Jang et al., 2009) indicates that, for the consideration of bonding strength, the immersion time must less than 5 min for a thickness of bonding layer around 500 nm. If long time immersion is applied, the bonding strength will be reduced due to the decrease in plastic dissipation energy near the interfacial crack tips with thinner Cu film thickness caused by over etching.

#### *3.2.3.2. Forming gas anneal*

Oxygen content in the bonding layer can be reduced by pre-bonding forming gas anneal. Forming gas is a mixture of hydrogen and nitrogen (typically 5%H2:95%N2, by volume). The reactions with the Cu oxides are exothermic and can be principally represented as follows in (3) and (4):

$$\text{H2} + \text{CuO} \rightarrow \text{Cu} + 2\text{H2O} \tag{3}$$

$$\text{Hz} + \text{CuzO} \rightarrow 2\text{Cu} + 2\text{HzO} \tag{4}$$

This pre-bonding anneal is an *in-situ* clean process, which presents no re-oxidation risk before bonding. Compared with anneal at high temperature, long anneal duration (e.g. 1 hour) at low temperature (typically at 250 or 300 °C) is preferred to eliminate the oxygen in the bonding layer, as high temperature takes the potential risk of unwanted damage in the device layer.

#### *3.2.3.3. Self-assembled monolayer (SAM) passivation*

Even though the surface oxide removal by wet cleaning and oxide content reduction in the bonding layer by forming gas anneal have been widely investigated with some success, surface contamination of particles can still remain a challenge. Recently, a novel surface treatment using self-assembled monolayer (SAM) of alkane-thiol to passivate clean Cu surface immediately after metallization is applied. SAM application was first applied in wire bonding by IMEC in the area of microelectronic manufacturing (Whelan et al., 2003). Subsequently, this method is applied in the domain of fluxless solder, flip-chip bonding, and wafer-level Cu diffusion bonding. SAM of alkane-thiol formed by linear alkane-thiol molecules (CH3-(CH2)n-1-SH, n = number of carbon), and it can be dissolved in ethanol to a concentration of 1 mM for the passivation application in wafer-level Cu diffusion bonding.

The process flow includes post-metallization adsorption and pre-bonding *in-situ* desorption to provide clean Cu surfaces for bonding.

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 81

**Figure 8.** TEM micrographs of bonded Cu layers (Tan et al., 2009).

Early study of contact resistance of bonded Cu interconnects is presented by Chen *et al.* (Chen et al., 2004) in MIT (Massachusetts Institute of Technology, USA). The measurement results using Kelvin structure indicate that a specific contact resistance of bonding interfaces of approximately 10-8Ω.cm2 is obtained. A resent research by Peng *et al.* (Peng et al., 2011) demonstrate an excellent specific contact resistances of bonding interface using SAM as the surface treatment of about 2.59×10-9Ω.cm2. This work has also demonstrated a daisy chain of at least 44,000 contacts at 15μm pitch connected successfully, and the misalignment of ~ 2

(a) Without SAM passivation (b) With SAM passivation and desorption

**Figure 9.** (a) Face-to-face daisy chain stacking architecture of two wafers using Cu-Cu bonding. (b)

No open failure is detected during measurement up to 44,000 nodes, as shown in Fig. 10. a. The sample with 10,000 bonding nodes is subjected to temperature cycling test (TCT) with temperature ranging from -40 °C to 125 °C. It is observed that the electrical continuity is

(a) (b)

Cross sectional FIB image of the 15 μm pitch Cu-Cu bonding (Peng et al., 2011).

*3.2.4.1. Electrical characterization* 

μm (Fig. 9).

Fig. 7 shows schematic of the process flow used in low temperature Cu diffusion bonding with SAM application. Wafers are immersed immediately into the solution of alkane-thiol after Cu metallization. Due to its specific high affinity functional head group (thiol, S-H) towards Cu surface, alkane-thiol can readily adsorb onto the Cu surface and rearranged into a uniform organic monolayer. This SAM layer provides temporary protection to the Cu surface. Subsequently, the SAM layer will be desorbed effectively with an annealing step in inert N2 ambient to recover the clean Cu surface for the final bonding at low temperature. Research work in Nanyang Technological University (NTU) indicates that anneal for 30 min at 250 °C can efficiently desorb the SAM layer formed after 3 hr of immersion time in the solution.

**Figure 7.** The application of self-assembled monolayer (SAM) as a passivation layer on Cu surface for bonding enhancement at lower temperature. (a) A pair of Si wafers with Cu metallization; (b) Immersion in alkane-thiol solution: SAM absorption; (c) Pre-bonding SAM desorption by thermal means and boding (Tan et al., 2012).

Fig. 8 shows the cross-section TEM images of the bonded Cu layers. The micrographs clearly confirm the success of Cu–Cu bonding in both samples. Fig. 8(a) is taken from bonded sample without SAM treatment. There is limited grain growth across the bonding interface and the original bonding interface is clearly seen (marked with arrows). In Fig. 8(b) which is taken from bonded sample with SAM treatment, the original bonding interface has disappeared. Cu grains extend across the bonding interface and a wiggling grain boundary is observed (marked with arrows).As can be seen, one Cu grain even extends the entire bonded Cu layer thickness sandwiched by the Ti capping layers (marked with white dotted line).

### *3.2.4. Performance of state-of-the-art copper diffusion bonding*

Low temperature Cu diffusion bonding is gradually becoming the mainstream bonding technology for 3D integration as it allows the formation of electrical contact, mechanical support, and hermetic seal in one simultaneous step. Therefore, these three parameters are usually presented as the key performance matrix for metal based bonding quality.

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 81

**Figure 8.** TEM micrographs of bonded Cu layers (Tan et al., 2009). (a) Without SAM passivation (b) With SAM passivation and desorption

### *3.2.4.1. Electrical characterization*

80 Metallurgy – Advances in Materials and Processes

means and boding (Tan et al., 2012).

solution.

line).

to provide clean Cu surfaces for bonding.

The process flow includes post-metallization adsorption and pre-bonding *in-situ* desorption

Fig. 7 shows schematic of the process flow used in low temperature Cu diffusion bonding with SAM application. Wafers are immersed immediately into the solution of alkane-thiol after Cu metallization. Due to its specific high affinity functional head group (thiol, S-H) towards Cu surface, alkane-thiol can readily adsorb onto the Cu surface and rearranged into a uniform organic monolayer. This SAM layer provides temporary protection to the Cu surface. Subsequently, the SAM layer will be desorbed effectively with an annealing step in inert N2 ambient to recover the clean Cu surface for the final bonding at low temperature. Research work in Nanyang Technological University (NTU) indicates that anneal for 30 min at 250 °C can efficiently desorb the SAM layer formed after 3 hr of immersion time in the

**Figure 7.** The application of self-assembled monolayer (SAM) as a passivation layer on Cu surface for bonding enhancement at lower temperature. (a) A pair of Si wafers with Cu metallization; (b) Immersion in alkane-thiol solution: SAM absorption; (c) Pre-bonding SAM desorption by thermal

(a) (b) (c)

Fig. 8 shows the cross-section TEM images of the bonded Cu layers. The micrographs clearly confirm the success of Cu–Cu bonding in both samples. Fig. 8(a) is taken from bonded sample without SAM treatment. There is limited grain growth across the bonding interface and the original bonding interface is clearly seen (marked with arrows). In Fig. 8(b) which is taken from bonded sample with SAM treatment, the original bonding interface has disappeared. Cu grains extend across the bonding interface and a wiggling grain boundary is observed (marked with arrows).As can be seen, one Cu grain even extends the entire bonded Cu layer thickness sandwiched by the Ti capping layers (marked with white dotted

Low temperature Cu diffusion bonding is gradually becoming the mainstream bonding technology for 3D integration as it allows the formation of electrical contact, mechanical support, and hermetic seal in one simultaneous step. Therefore, these three parameters are

usually presented as the key performance matrix for metal based bonding quality.

*3.2.4. Performance of state-of-the-art copper diffusion bonding* 

Early study of contact resistance of bonded Cu interconnects is presented by Chen *et al.* (Chen et al., 2004) in MIT (Massachusetts Institute of Technology, USA). The measurement results using Kelvin structure indicate that a specific contact resistance of bonding interfaces of approximately 10-8Ω.cm2 is obtained. A resent research by Peng *et al.* (Peng et al., 2011) demonstrate an excellent specific contact resistances of bonding interface using SAM as the surface treatment of about 2.59×10-9Ω.cm2. This work has also demonstrated a daisy chain of at least 44,000 contacts at 15μm pitch connected successfully, and the misalignment of ~ 2 μm (Fig. 9).

**Figure 9.** (a) Face-to-face daisy chain stacking architecture of two wafers using Cu-Cu bonding. (b) Cross sectional FIB image of the 15 μm pitch Cu-Cu bonding (Peng et al., 2011).

No open failure is detected during measurement up to 44,000 nodes, as shown in Fig. 10. a. The sample with 10,000 bonding nodes is subjected to temperature cycling test (TCT) with temperature ranging from -40 °C to 125 °C. It is observed that the electrical continuity is

maintained even after 1,000 thermal cycles (Fig. 10. b). In freshly bonded sample (before TCT test), the resistance of the daisy chain is estimated from *I-V* plot and each node (consists of Cu lines and contact) is estimated to have ~26.1 mΩ of resistance, and a slight increase of the node resistance up to ~29 mΩ at 1,000 temperature cycles. This slight increase is due to oxidation of the exposed Cu lines as a result of complete removal of the top wafer after bonding (since there is no TSV). The results suggest that the robustness of the Cu-Cu bond is maintained. This high connection density of up to 4.4 × 105/cm2 and its reliability provides a feasible platform of high IC-to-IC connection density suitable for future wafer level 3D integration of IC to augment Moore's Law scaling.

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 83

bonded Cu structures need to provide sufficiently mechanical strength to sustain the

In an integrated 3D microsystems, micro- and nano-scale devices such as micro-electromechanical system (MEMS), microelectronic devices and optoelectronic devices, a hermetic ambient is commonly needed for proper operation with very low or without oxygen and water vapor content. The objective of hermetic packaging is to protect these devices against harsh environmental corrosion and potential damage during processing, handling and operation. Hermetic encapsulation can be also achieved by metal diffusion bonding. Hermeticity test, which consists of over-pressure storage in a helium bomb chamber and leak rate measurement with a mass spectrometer, is based on specifications defined in the MIL-STD, a standard commonly applied for microelectronics packaging. Hermetic packaging by Au diffusion bonding at 400°C demonstrated by Xu *et al.* (Xu et al., 2010) achieve a helium leak rate on order of 10-9 atm.cm3/sec based on the MIL-STD-883E method 1014.9 specification. A research of Al diffusion bonding at 450°C by Yun *et al.* (Yun et al., 2008) presents a excellent result of helium leak rate of the order of 10-12 atm.cm3/sec based on

The research work focusing on hermetic encapsulation with Cu diffusion bonding at low temperature in NTU exhibits outstanding helium leak rate based on the MIL-STD-883E method 1014.9 specification. Fig. 12 shows an average helium leak rate and standard deviation for cavities with the seal ring size of 50 μm sealed by Cu diffusion bonding at 250 °C and 300 °C respectively with proper surface preparation and control. These values are at least one order of magnitude smaller than the reject limit (5×10-8 atm.cm3/sec) defined by the

shear force during wafer thinning.

*3.2.4.3. Hermeticity detection* 

**Figure 11.** Interfacial adhesion energy for samples bonded at 250 °C.

the MIL-STD-750E method 1071.8 specification.

**Figure 10.** (a) *I-V* characteristic of the Daisy chain measured from 2,000 to 44,000 contacts (each interval = 2,000 contacts). The contacts are connected continuously and ohmic behavior is exhibited; (b) *I-V* characteristics of daisy chain before and after temperature cycling test (Peng et al., 2011).

#### *3.2.4.2. Mechanical test*

Besides the die shear strength test, four-point bending method is also widely employed for strength of mechanical support analysis (Huang et al., 2005). The interfacial adhesion energy between two bonded thin films can be qualitatively analyzed by this method. The earlier work by Tadepalli *et al.* (Tadepalli&Thompson, 2003) presents a superior interfacial adhesion energy of 11 J/m2 at Cu diffusion bonding interface bonded at 300 °C and indicates that this value is superior than that of industry-standard SOI wafer. A recent work by Kim *et al.* (Kim et al., 2010) shows a short time bonding with post-anneal at 300 °C for 1 hour can also get a high interfacial adhesion energy around 12 J/m2 which is much higher than critical bonding strength required (>5 J/m2) by the subsequent processes such as grinding. A summary of interfacial adhesion energy achieved for wafer pairs with and without SAM passivation bonded at 250 °C for 1 hr is shown in Fig. 11. The average interfacial adhesion energy obtained with and without SAM passivation goes up to 18 J/m2 and 12 J/m2, respectively. Compared with the results from other literature, this interfacial adhesion energy obtained at low temperature is comparable or even better. The daisy chain bonding presented earlier exhibits high bonding strength as well, since bonded Cu structures need to provide sufficiently mechanical strength to sustain the shear force during wafer thinning.

**Figure 11.** Interfacial adhesion energy for samples bonded at 250 °C.

### *3.2.4.3. Hermeticity detection*

82 Metallurgy – Advances in Materials and Processes

*3.2.4.2. Mechanical test* 

integration of IC to augment Moore's Law scaling.

maintained even after 1,000 thermal cycles (Fig. 10. b). In freshly bonded sample (before TCT test), the resistance of the daisy chain is estimated from *I-V* plot and each node (consists of Cu lines and contact) is estimated to have ~26.1 mΩ of resistance, and a slight increase of the node resistance up to ~29 mΩ at 1,000 temperature cycles. This slight increase is due to oxidation of the exposed Cu lines as a result of complete removal of the top wafer after bonding (since there is no TSV). The results suggest that the robustness of the Cu-Cu bond is maintained. This high connection density of up to 4.4 × 105/cm2 and its reliability provides a feasible platform of high IC-to-IC connection density suitable for future wafer level 3D

**Figure 10.** (a) *I-V* characteristic of the Daisy chain measured from 2,000 to 44,000 contacts (each interval = 2,000 contacts). The contacts are connected continuously and ohmic behavior is exhibited; (b) *I-V*

(a) (b)

Besides the die shear strength test, four-point bending method is also widely employed for strength of mechanical support analysis (Huang et al., 2005). The interfacial adhesion energy between two bonded thin films can be qualitatively analyzed by this method. The earlier work by Tadepalli *et al.* (Tadepalli&Thompson, 2003) presents a superior interfacial adhesion energy of 11 J/m2 at Cu diffusion bonding interface bonded at 300 °C and indicates that this value is superior than that of industry-standard SOI wafer. A recent work by Kim *et al.* (Kim et al., 2010) shows a short time bonding with post-anneal at 300 °C for 1 hour can also get a high interfacial adhesion energy around 12 J/m2 which is much higher than critical bonding strength required (>5 J/m2) by the subsequent processes such as grinding. A summary of interfacial adhesion energy achieved for wafer pairs with and without SAM passivation bonded at 250 °C for 1 hr is shown in Fig. 11. The average interfacial adhesion energy obtained with and without SAM passivation goes up to 18 J/m2 and 12 J/m2, respectively. Compared with the results from other literature, this interfacial adhesion energy obtained at low temperature is comparable or even better. The daisy chain bonding presented earlier exhibits high bonding strength as well, since

characteristics of daisy chain before and after temperature cycling test (Peng et al., 2011).

In an integrated 3D microsystems, micro- and nano-scale devices such as micro-electromechanical system (MEMS), microelectronic devices and optoelectronic devices, a hermetic ambient is commonly needed for proper operation with very low or without oxygen and water vapor content. The objective of hermetic packaging is to protect these devices against harsh environmental corrosion and potential damage during processing, handling and operation. Hermetic encapsulation can be also achieved by metal diffusion bonding. Hermeticity test, which consists of over-pressure storage in a helium bomb chamber and leak rate measurement with a mass spectrometer, is based on specifications defined in the MIL-STD, a standard commonly applied for microelectronics packaging. Hermetic packaging by Au diffusion bonding at 400°C demonstrated by Xu *et al.* (Xu et al., 2010) achieve a helium leak rate on order of 10-9 atm.cm3/sec based on the MIL-STD-883E method 1014.9 specification. A research of Al diffusion bonding at 450°C by Yun *et al.* (Yun et al., 2008) presents a excellent result of helium leak rate of the order of 10-12 atm.cm3/sec based on the MIL-STD-750E method 1071.8 specification.

The research work focusing on hermetic encapsulation with Cu diffusion bonding at low temperature in NTU exhibits outstanding helium leak rate based on the MIL-STD-883E method 1014.9 specification. Fig. 12 shows an average helium leak rate and standard deviation for cavities with the seal ring size of 50 μm sealed by Cu diffusion bonding at 250 °C and 300 °C respectively with proper surface preparation and control. These values are at least one order of magnitude smaller than the reject limit (5×10-8 atm.cm3/sec) defined by the MIL-STD-883E standard and is very attractive for packaging of devices that require high level of hermeticity and for heterogeneous integration of different micro-devices.

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 85

Eutectic bonding is another metal based bonding technology for advanced MEMS packaging and for 3D integration. This technology, which is also referred as eutectic soldering and solid-liquid inter-diffusion bonding, stacks two wafers by intermediate eutectic compounds formation. The bonding interfaces will be fused together due to intermetallic phase formation. An important feature of eutectic bonding is the melting of intermediate eutectic metals and formation of the alloys that facilitate surface planarization

The intermediate eutectic bonding layer is usually composed of a binary (or more) metal system. One with high melting point noble metal (like gold, silver and copper) and the other one with low melting point metal (like tin and indium) are used as intermediate eutectic metals which form intermetallic compounds during bonding. At present, the commonly used materials include Cu/Sn, Au/Sn, Au/Si, and Sn/Pb (Ko&Chen, 2010). Table 3 shows some eutectic metal system bonding temperature and their melting point. Since the eutectic point of two metals is lower than their melting points, the eutectic bonding can be usually achieved at low temperature. For example, in Cu/Sn, the bonding temperature is 150-280 °C. However, the temperature needed is still too high for some applications (e.g. Au/Si: 380 °C). The bonding temperature for Sn/Pb is only 183 °C, but this approach is not suitable for all

Material Bonding temperature Material Melting Point Cu/Sn 150-280 °C Cu 660.4 °C Au/Sn 280 °C Au 1064.4 °C Au/Si 380 °C Sn 213.9 °C Sn/Pb 183 °C Pb 327.5 °C

**Table 3.** Commonly used eutectic alloys bonding temperature and melting point of each metal

In following sections, the basic principles of eutectic bonding based on the binary metal systems Cu/Sn which is one of the best-investigated and well-established metal systems will

The bonding process relies on intermetallic compounds formed by inter-diffusion of the intermediate eutectic metal layers when they are brought into intimate contact at the specific bonding temperature. The first intermetallic compound formed between Cu and Sn is the metastable η-phase Cu6Sn5, and then the Cu3Sn ε-phase starts to form at Cu to Cu6Sn5

and provide a tolerance of surface topography and particles.

electronic products due to the lead-free requirement.

*3.3.2. Fundamental of eutectic bonding* 

*3.3.2.1. Intermetallic compound formation* 

be presented in detail.

*3.3.1. Different alloy for eutectic bonding* 

**3.3. Eutectic bonding** 

**Figure 12.** Average helium leak rate and standard deviation for cavities sealed at low temperature.

The reliability of Cu frame for hermetic packaging is also investigated through a temperature cycling test (TCT) from -40 to 125 °C up to 1000 cycles and a humidity test based on IPC/JEDEC J-STD-020 standard: (1) Level 1: 85°C/85%RH, 168hr; (2) Level 2: 85°C/ 60%RH, 168hr; and (3) Level 3: 30°C/ 60%RH, 192hr. The humidity test is applied from level 3 to level 1 in an ascending order in terms of rigor. In addition, an immersion in acid/base solution is applied to verify the corrosion resistance of the Cu frame for hermetic application. Table 2 shows some detected helium leak rate of sealed cavities with the seal ring size of 50 μm. Excellent reliability results of Cu-to-Cu wafer-level diffusion bonding at low temperature are maintained after a long term temperature cycling test with extreme low/high temperature swing, prolonged storage in humid environment, and immersion in acid/base solution.



### **3.3. Eutectic bonding**

84 Metallurgy – Advances in Materials and Processes

acid/base solution.

TCT test

Humidity test

Corrosion test

MIL-STD-883E standard and is very attractive for packaging of devices that require high

**Figure 12.** Average helium leak rate and standard deviation for cavities sealed at low temperature.

**Table 2.** Detected helium leak rate after TCT test, humidity test, and corrosion test.

The reliability of Cu frame for hermetic packaging is also investigated through a temperature cycling test (TCT) from -40 to 125 °C up to 1000 cycles and a humidity test based on IPC/JEDEC J-STD-020 standard: (1) Level 1: 85°C/85%RH, 168hr; (2) Level 2: 85°C/ 60%RH, 168hr; and (3) Level 3: 30°C/ 60%RH, 192hr. The humidity test is applied from level 3 to level 1 in an ascending order in terms of rigor. In addition, an immersion in acid/base solution is applied to verify the corrosion resistance of the Cu frame for hermetic application. Table 2 shows some detected helium leak rate of sealed cavities with the seal ring size of 50 μm. Excellent reliability results of Cu-to-Cu wafer-level diffusion bonding at low temperature are maintained after a long term temperature cycling test with extreme low/high temperature swing, prolonged storage in humid environment, and immersion in

> Before test 7.7×10-10 atm.cm3/sec After 500 cycles 7.9×10-10 atm.cm3/sec After 1000 cycles 7.9×10-10 atm.cm3/sec

Before test 6.0×10-10 atm.cm3/sec Level 3 7.5×10-10 atm.cm3/sec Level 2 7.0×10-10 atm.cm3/sec Level 1 8.0×10-10 atm.cm3/sec

Before test 7.1×10-10 atm.cm3/sec Acid corrosion 5.9×10-10 atm.cm3/sec Base corrosion 5.4×10-10 atm.cm3/sec

level of hermeticity and for heterogeneous integration of different micro-devices.

Eutectic bonding is another metal based bonding technology for advanced MEMS packaging and for 3D integration. This technology, which is also referred as eutectic soldering and solid-liquid inter-diffusion bonding, stacks two wafers by intermediate eutectic compounds formation. The bonding interfaces will be fused together due to intermetallic phase formation. An important feature of eutectic bonding is the melting of intermediate eutectic metals and formation of the alloys that facilitate surface planarization and provide a tolerance of surface topography and particles.

### *3.3.1. Different alloy for eutectic bonding*

The intermediate eutectic bonding layer is usually composed of a binary (or more) metal system. One with high melting point noble metal (like gold, silver and copper) and the other one with low melting point metal (like tin and indium) are used as intermediate eutectic metals which form intermetallic compounds during bonding. At present, the commonly used materials include Cu/Sn, Au/Sn, Au/Si, and Sn/Pb (Ko&Chen, 2010). Table 3 shows some eutectic metal system bonding temperature and their melting point. Since the eutectic point of two metals is lower than their melting points, the eutectic bonding can be usually achieved at low temperature. For example, in Cu/Sn, the bonding temperature is 150-280 °C. However, the temperature needed is still too high for some applications (e.g. Au/Si: 380 °C). The bonding temperature for Sn/Pb is only 183 °C, but this approach is not suitable for all electronic products due to the lead-free requirement.


**Table 3.** Commonly used eutectic alloys bonding temperature and melting point of each metal

### *3.3.2. Fundamental of eutectic bonding*

In following sections, the basic principles of eutectic bonding based on the binary metal systems Cu/Sn which is one of the best-investigated and well-established metal systems will be presented in detail.

### *3.3.2.1. Intermetallic compound formation*

The bonding process relies on intermetallic compounds formed by inter-diffusion of the intermediate eutectic metal layers when they are brought into intimate contact at the specific bonding temperature. The first intermetallic compound formed between Cu and Sn is the metastable η-phase Cu6Sn5, and then the Cu3Sn ε-phase starts to form at Cu to Cu6Sn5

interface. Fig. 13 presents a typical intermetallic compound formation during bonding. This process is terminated when all Sn is consumed to form Cu3Sn, since the binary metal systems is thermodynamically stable while no non-reacted Sn remains (Munding et al., 2008). If the bonding time is insufficient, the transformation fails to complete. The joint presents a potential risk of resistance in high temperature environment, as the melting point of Cu6Sn5 is 415°C, while that of Cu3Sn is 676°C.

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 87

bonding, a thin buffer layer can be deposited between Cu and Sn. With a thin buffer layer, the bonding process begins with the slow reaction between buffer layer and the solder. Since the buffer layer is very thin, the Sn solder can diffuse into Cu in a short time. The research work by Yu *et al.* (Yu et al., 2009) reports a 50nm Ni can be used as buffer layer during Cu/Sn/In eutectic bonding. A thin layer of Au has also been used for wetting and for metal layer surface protection from oxidation. During bonding, Sn and In will first wet and react with Ni layer. Alloy of Ni3Sn4 or NiInSn ternary phase is formed initially. Then, InSn solder starts to diffuse into Cu to form Cu6(Sn,In)5 compounds. Finally, all Ni atoms diffuse into Cu6(Sn,In)5 to form (Cu,Ni)6(Sn,In)5 phase, and Au(In,Sn)2 is formed as a byproduct (Fig. 16). In addition, the TCT test is a very important examination for the reliability of eutectic bonding technology, since the compound has the potential risk of structural degradation caused by solder fatigue after a long term dramatic change in temperature or brittleness of

the inter-metallic compound at low temperature.

**Figure 14.** Schematic illustration of the temperature profile during eutectic bonding.

(a) Cu/Sn-Cu bonding (b) Cu/Sn-Sn/Cu bonding

**Figure 15.** Different methods used in Cu/Sn eutectic bonding.

**Figure 13.** (a) Cross sectional view of typical intermetallic compounds formation, from η-phase Cu6Sn5 to ε-phase Cu3Sn; (b) Cross sectional view of completely alloyed joint, only ε-phase Cu3Sn (Munding et al., 2008) [Copyright of Springer].

### *3.3.2.2. Temperature profile*

A typical temperature profile for Cu/Sn eutectic bonding is shown in Fig. 14. Two bonding systems are widely used: Cu/Sn-Cu bonding and Cu/Sn-Sn/Cu bonding (Fig. 15). For Cu/Sn-Cu bonding system, the temperature ramping rate higher than 6 °C/s (Munding et al., 2008) is preferred, since the fast ramping rate after contact is beneficial to preserve most of reactive Sn. If Sn would have reacted with Cu during this period in the Cu/Sn stack, the Sn may be insufficient at the bonding interface for subsequent Cu/Sn-Cu diffusion. In this case, the delay between Sn melting and molten Sn wetting Cu surface is the other key parameter for metal system design and determines the necessary amount of Sn in the bonding process. In general, the Cu and Sn thickness should be related as *d*Cu≥1.5*d*Sn. On the contrary, for Cu/Sn-Cu/Sn bonding, it is believed that a slow ramping rate is beneficial for reducing the flow of any excess Sn. More Sn would have reacted with Cu when temperature increases, and thus less pure liquid Sn is available at the bonding interface for combination (Lapadatu et al., 2010).

### *3.3.3. Performance of state-of-the-art eutectic bonding*

The intermetallic compound formation is diffusion controlled which is directly related to the temperature. Below the melting temperature of Sn, the reaction is slow, but when the Sn begins to melt the reaction speed can be accelerated to an extremely high level. In order to control the diffusion of soldering process and to prevent solder consumption before bonding, a thin buffer layer can be deposited between Cu and Sn. With a thin buffer layer, the bonding process begins with the slow reaction between buffer layer and the solder. Since the buffer layer is very thin, the Sn solder can diffuse into Cu in a short time. The research work by Yu *et al.* (Yu et al., 2009) reports a 50nm Ni can be used as buffer layer during Cu/Sn/In eutectic bonding. A thin layer of Au has also been used for wetting and for metal layer surface protection from oxidation. During bonding, Sn and In will first wet and react with Ni layer. Alloy of Ni3Sn4 or NiInSn ternary phase is formed initially. Then, InSn solder starts to diffuse into Cu to form Cu6(Sn,In)5 compounds. Finally, all Ni atoms diffuse into Cu6(Sn,In)5 to form (Cu,Ni)6(Sn,In)5 phase, and Au(In,Sn)2 is formed as a byproduct (Fig. 16). In addition, the TCT test is a very important examination for the reliability of eutectic bonding technology, since the compound has the potential risk of structural degradation caused by solder fatigue after a long term dramatic change in temperature or brittleness of the inter-metallic compound at low temperature.

86 Metallurgy – Advances in Materials and Processes

al., 2008) [Copyright of Springer].

*3.3.2.2. Temperature profile* 

of Cu6Sn5 is 415°C, while that of Cu3Sn is 676°C.

interface. Fig. 13 presents a typical intermetallic compound formation during bonding. This process is terminated when all Sn is consumed to form Cu3Sn, since the binary metal systems is thermodynamically stable while no non-reacted Sn remains (Munding et al., 2008). If the bonding time is insufficient, the transformation fails to complete. The joint presents a potential risk of resistance in high temperature environment, as the melting point

**Figure 13.** (a) Cross sectional view of typical intermetallic compounds formation, from η-phase Cu6Sn5 to ε-phase Cu3Sn; (b) Cross sectional view of completely alloyed joint, only ε-phase Cu3Sn (Munding et

(a) (b)

A typical temperature profile for Cu/Sn eutectic bonding is shown in Fig. 14. Two bonding systems are widely used: Cu/Sn-Cu bonding and Cu/Sn-Sn/Cu bonding (Fig. 15). For Cu/Sn-Cu bonding system, the temperature ramping rate higher than 6 °C/s (Munding et al., 2008) is preferred, since the fast ramping rate after contact is beneficial to preserve most of reactive Sn. If Sn would have reacted with Cu during this period in the Cu/Sn stack, the Sn may be insufficient at the bonding interface for subsequent Cu/Sn-Cu diffusion. In this case, the delay between Sn melting and molten Sn wetting Cu surface is the other key parameter for metal system design and determines the necessary amount of Sn in the bonding process. In general, the Cu and Sn thickness should be related as *d*Cu≥1.5*d*Sn. On the contrary, for Cu/Sn-Cu/Sn bonding, it is believed that a slow ramping rate is beneficial for reducing the flow of any excess Sn. More Sn would have reacted with Cu when temperature increases, and thus less pure

liquid Sn is available at the bonding interface for combination (Lapadatu et al., 2010).

The intermetallic compound formation is diffusion controlled which is directly related to the temperature. Below the melting temperature of Sn, the reaction is slow, but when the Sn begins to melt the reaction speed can be accelerated to an extremely high level. In order to control the diffusion of soldering process and to prevent solder consumption before

*3.3.3. Performance of state-of-the-art eutectic bonding* 

**Figure 14.** Schematic illustration of the temperature profile during eutectic bonding.

**Figure 15.** Different methods used in Cu/Sn eutectic bonding.

Good die shear strength and outstanding hermeticity have been obtained using Ni as the buffer layer. The average bonding strength can go up to 32 MPa and the helium leak rate with the seal ring size of 300 μm is smaller than 5×10-8 atm.cm3/sec which is defined as the reject limit for standard MIL-STD-883E method 1014.9. After temperature cycling test (from -40 °C to 125 °C up to 1,000 cycles) and high humidity storage (85 °C, 85% RH for 1000 hr), the bonding strength still remains above 15 MPa, and over 80% dies can still provide high hermeticity level. The research work by Liu *et al.* (Liu et al., 2011) has reported the resistance of bonded interconnects obtained by Cu/Sn bonding. The bonded interconnect shows the resistance of the order of 100 mΩ, and the excellent bonding strength of about 45 Mpa.

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 89

chemical solution, the bombardment of energetic particles or the corrosion of ions removes the surface contamination. At the same time, a very thin high hydrophilic amorphous oxide layer can be formed. Following that, clean and activated surfaces are ready for subsequent hydrophilic bonding. Finally, hydrogen bonds are formed when the two surfaces are

**Figure 17.** CA measurement for dielectric materials of PE-TEOS and low-*k* CDO under three different

Fig. 17 shows the water droplet contact angle (CA) value of both plasma-enhanced tetraethyl orthosilicate (PE-TEOS) and carbon-doped oxide (CDO) samples for three different conditions, i.e., as deposited, after CMP, and after O2 plasma activation with CMP. For hydrophilic wafer bonding, smaller contact angle corresponds to higher hydrophilicity of a surface, hence higher density of hydroxyl (OH) groups for hydrogen bond formation during bonding. With O2 plasma surface activation, both PE-TEOS and CDO show a convergence of CA values to ~2.5°,

For hydrophilic bonding, when two cleaned and activated wafers are brought into contact at room temperature, hydrogen bonds between hydroxyl (−OH) groups are established across the gap between the wafers. Anneal process must be applied after bonding in order to achieve a much higher bonding strength by converting the hydrogen bonds into a strong covalent bonds. The reaction of surface silanol (Si-OH) groups is enhanced during annealing

For some high-*k* dielectric materials bonding, such as Al2O3, HfO2, and TiO2 which are used to achieve a higher bonding strength for a given anneal temperature and duration, their

Si OH OH Si Si O Si H O 2 (5)

based on the following equation and therefore more covalent bonds are formed:

conditions, i.e., as deposited, polished, and O2 plasma activated (Tan&Chong, 2010).

resulting in a highly hydrophilic surface for fusion bonding.

reaction during anneal can be presented as follows:

*3.4.2. Post-bonding anneal* 

brought into contact.

**Figure 16.** Interfacial microstructure of intermetallic compound joint (Yu et al., 2009) [Copyright of Elsevier].

### **3.4. Low temperature oxide fusion bonding**

Oxide fusion bonding describes the direct bonding between wafers with or without dielectric layers. This bonding method has a stringent surface quality requirement, e.g. wafer surface needs to be smooth with small total thickness variation (TTV) and low roughness is also strictly required. Surface activation is usually performed before bonding. Subsequently, a spontaneous adhesion is firstly applied between the two wafers. Post-bond annealing allows the bonding interface to convert from hydrogen bonds to strong covalent bonds. Surface treatment method and post-bonding annealing process will be presented in detail in the following sections.

### *3.4.1. Surface activation before bonding*

A number of surface activation methods have been investigated, include oxygen plasma bombardment, argon sputter-cleaning, and wet chemical methods with various reagent combinations such as RCA1 (H2O+H2O2+NH4OH), RCA2 (H2O+H2O2+HCl), piranha (H2SO4+H2O2), etc. The original bonding surface is usually covered with a thin layer of native oxide and contaminant. When the surface is exposed to plasma or immersed in chemical solution, the bombardment of energetic particles or the corrosion of ions removes the surface contamination. At the same time, a very thin high hydrophilic amorphous oxide layer can be formed. Following that, clean and activated surfaces are ready for subsequent hydrophilic bonding. Finally, hydrogen bonds are formed when the two surfaces are brought into contact.

**Figure 17.** CA measurement for dielectric materials of PE-TEOS and low-*k* CDO under three different conditions, i.e., as deposited, polished, and O2 plasma activated (Tan&Chong, 2010).

Fig. 17 shows the water droplet contact angle (CA) value of both plasma-enhanced tetraethyl orthosilicate (PE-TEOS) and carbon-doped oxide (CDO) samples for three different conditions, i.e., as deposited, after CMP, and after O2 plasma activation with CMP. For hydrophilic wafer bonding, smaller contact angle corresponds to higher hydrophilicity of a surface, hence higher density of hydroxyl (OH) groups for hydrogen bond formation during bonding. With O2 plasma surface activation, both PE-TEOS and CDO show a convergence of CA values to ~2.5°, resulting in a highly hydrophilic surface for fusion bonding.

#### *3.4.2. Post-bonding anneal*

88 Metallurgy – Advances in Materials and Processes

Elsevier].

Good die shear strength and outstanding hermeticity have been obtained using Ni as the buffer layer. The average bonding strength can go up to 32 MPa and the helium leak rate with the seal ring size of 300 μm is smaller than 5×10-8 atm.cm3/sec which is defined as the reject limit for standard MIL-STD-883E method 1014.9. After temperature cycling test (from -40 °C to 125 °C up to 1,000 cycles) and high humidity storage (85 °C, 85% RH for 1000 hr), the bonding strength still remains above 15 MPa, and over 80% dies can still provide high hermeticity level. The research work by Liu *et al.* (Liu et al., 2011) has reported the resistance of bonded interconnects obtained by Cu/Sn bonding. The bonded interconnect shows the resistance of the order of 100 mΩ, and the excellent bonding strength of about 45 Mpa.

**Figure 16.** Interfacial microstructure of intermetallic compound joint (Yu et al., 2009) [Copyright of

Oxide fusion bonding describes the direct bonding between wafers with or without dielectric layers. This bonding method has a stringent surface quality requirement, e.g. wafer surface needs to be smooth with small total thickness variation (TTV) and low roughness is also strictly required. Surface activation is usually performed before bonding. Subsequently, a spontaneous adhesion is firstly applied between the two wafers. Post-bond annealing allows the bonding interface to convert from hydrogen bonds to strong covalent bonds. Surface treatment method and post-bonding annealing process will be presented in

A number of surface activation methods have been investigated, include oxygen plasma bombardment, argon sputter-cleaning, and wet chemical methods with various reagent combinations such as RCA1 (H2O+H2O2+NH4OH), RCA2 (H2O+H2O2+HCl), piranha (H2SO4+H2O2), etc. The original bonding surface is usually covered with a thin layer of native oxide and contaminant. When the surface is exposed to plasma or immersed in

**3.4. Low temperature oxide fusion bonding** 

detail in the following sections.

*3.4.1. Surface activation before bonding* 

For hydrophilic bonding, when two cleaned and activated wafers are brought into contact at room temperature, hydrogen bonds between hydroxyl (−OH) groups are established across the gap between the wafers. Anneal process must be applied after bonding in order to achieve a much higher bonding strength by converting the hydrogen bonds into a strong covalent bonds. The reaction of surface silanol (Si-OH) groups is enhanced during annealing based on the following equation and therefore more covalent bonds are formed:

$$\text{Si}-\text{OH} + \text{OH}-\text{Si} \rightarrow \text{Si}-\text{O}-\text{Si} + \text{HzO} \tag{5}$$

For some high-*k* dielectric materials bonding, such as Al2O3, HfO2, and TiO2 which are used to achieve a higher bonding strength for a given anneal temperature and duration, their reaction during anneal can be presented as follows:

$$\text{M }-\text{OH }+\text{HO }-\text{M }\rightarrow\text{M }-\text{O }-\text{M }+\text{H2O}\tag{6}$$

Low Temperature Wafer-Level Metal Thermo-Compression Bonding Technology for 3D Integration 91

number of research work on Cu/Sn eutectic bonding using chip-level stacking method have been demonstrated and provided high vertical interconnect density in 3D stacking. However, formation of inter-metallic compound weakens the quality and reliability of the bonds. As the metal based bonding technology can provide electrical contact, mechanical support and hermetic seal in one simultaneous step, low temperature wafer-level Cu diffusion bonding and Cu/Sn eutectic bonding technologies with inter-layer connection

Technology development in the areas of 3D integration has resulted in a number of attractive stacking methods. In this chapter, fundamental of low temperature metal diffusion bonding and eutectic bonding technology are introduced. Cu diffusion bonding and Cu/Sn eutectic bonding are presented in details. Another bonding technology using oxide fusion between wafer pair is also exhibited, as it is widely use in the semiconductor industry. Excellent performances of these bonding technologies are shown in the chapter. Some details of processes and methodology used in the research work are included as well.

The authors wish to thank the contributions and support for the work presented in this chapter from group members PENG Lan, LIM Dau Fatt, CHONG Gang Yih, and MADE

Beyne, E. (2006). 3D system integration technologies. *Proceeding of 2006 International Symposium on VLSI Technology, Systems, and Applications*, Hsinchu, IEEE, pp.19-27. Chen, K. N., Fan, A., Tan, C. S.&Reif, R. (2004). Contact Resistance Measurement of Bonded Copper Interconnects for Three-dimensional Integration Technology, *IEEE Electr. Device* 

Chong, G. Y.&Tan, C. S. (2009). Low Temperature PE-TEOS Oxide Bonding Assisted by a Thin Layer of High-kappa Dielectric, *Electrochem. Solid-State Lett.* 12(11): H408-H411. Chong, G. Y.&Tan, C. S. (2011). PE-TEOS Wafer Bonding Enhancement at Low Temperature with a High-kappa Dielectric Capping Layer of Al(2)O(3), *J. Electrochem. Soc.* 158(2):

Fan, J., Lim, D. F., Peng, L., Li, K. H.&Tan, C. S. (2011). Low Temperature Cu-to-Cu Bonding for Wafer-Level Hermetic Encapsulation of 3D Microsystems, *Electrochem. Solid-State* 

technology, such as TSV, present a very attractive prospect for 3D integration.

**Author details** 

Ji Fan and Chuan Seng Tan

**Acknowledgement** 

Riko I in NTU.

**5. References** 

*L.* 25(1): 10-12.

H137-H141.

*Lett.* 14(11): H470-H474.

*Nanyang Technological University, Singapore* 

Where, M is the symbol for metal atom in high-*k* materials.

**Figure 18.** Variation in bond strength of PE-TEOS and Al2O3/PE-TEOS samples at various annealing temperatures (Chong&Tan, 2011).

Fig. 18 shows the variation in the bond strength of bonded wafers at various bonding temperatures as measured using the Maszara's crack opening method. The annealing duration is 3 hr. As expected, a higher bonding strength is achieved at a higher annealing temperature. Bonding strength is marginally improved for anneal temperature below 100°C. As the anneal temperature is increased to 200°C, significant improvements in the bonding strength are obtained. When the bonding temperature reaches 300°C, all samples present a bonding strength superior to 1 J/m2 which is the minimum strength required to sustain post-bonding processes such as mechanical grinding and tetramethylammonium hydroxide (TMAH) etching (Tan&Reif, 2005). The enhancement in the bond strength value using a thin Al2O3 layer is most likely related to the different bond dissociation energy between Al-O-Al and Si-O-Si. Since the Si-O bond has lower bond dissociation energy (316 kJ/mol) compared with that of the Al-O bond (511 kJ/mol) at 298 K, a higher energy is required to debond wafers that are bonded with Al2O3.

### **4. Summary and conclusion**

Over the past decades bonding technology has been used as the mainstream 3D integration method by various key players in America, Asia and Europe. Metal diffusion bonding and eutectic bonding are widely chosen for stacking of multiple chip layers in 3D integration as these methods allow simultaneous formation of mechanical, electrical and hermetic bonds. Although wafer-level stacking using via-first and face-to-face or face-to-back stacking method by Cu diffusion bonding technology has already been investigated with some success, high temperature (>300 °C) processing still remains a challenge. Meanwhile, a number of research work on Cu/Sn eutectic bonding using chip-level stacking method have been demonstrated and provided high vertical interconnect density in 3D stacking. However, formation of inter-metallic compound weakens the quality and reliability of the bonds. As the metal based bonding technology can provide electrical contact, mechanical support and hermetic seal in one simultaneous step, low temperature wafer-level Cu diffusion bonding and Cu/Sn eutectic bonding technologies with inter-layer connection technology, such as TSV, present a very attractive prospect for 3D integration.

Technology development in the areas of 3D integration has resulted in a number of attractive stacking methods. In this chapter, fundamental of low temperature metal diffusion bonding and eutectic bonding technology are introduced. Cu diffusion bonding and Cu/Sn eutectic bonding are presented in details. Another bonding technology using oxide fusion between wafer pair is also exhibited, as it is widely use in the semiconductor industry. Excellent performances of these bonding technologies are shown in the chapter. Some details of processes and methodology used in the research work are included as well.

### **Author details**

90 Metallurgy – Advances in Materials and Processes

temperatures (Chong&Tan, 2011).

wafers that are bonded with Al2O3.

**4. Summary and conclusion** 

Where, M is the symbol for metal atom in high-*k* materials.

M OH HO M M O M H2O (6)

**Figure 18.** Variation in bond strength of PE-TEOS and Al2O3/PE-TEOS samples at various annealing

Fig. 18 shows the variation in the bond strength of bonded wafers at various bonding temperatures as measured using the Maszara's crack opening method. The annealing duration is 3 hr. As expected, a higher bonding strength is achieved at a higher annealing temperature. Bonding strength is marginally improved for anneal temperature below 100°C. As the anneal temperature is increased to 200°C, significant improvements in the bonding strength are obtained. When the bonding temperature reaches 300°C, all samples present a bonding strength superior to 1 J/m2 which is the minimum strength required to sustain post-bonding processes such as mechanical grinding and tetramethylammonium hydroxide (TMAH) etching (Tan&Reif, 2005). The enhancement in the bond strength value using a thin Al2O3 layer is most likely related to the different bond dissociation energy between Al-O-Al and Si-O-Si. Since the Si-O bond has lower bond dissociation energy (316 kJ/mol) compared with that of the Al-O bond (511 kJ/mol) at 298 K, a higher energy is required to debond

Over the past decades bonding technology has been used as the mainstream 3D integration method by various key players in America, Asia and Europe. Metal diffusion bonding and eutectic bonding are widely chosen for stacking of multiple chip layers in 3D integration as these methods allow simultaneous formation of mechanical, electrical and hermetic bonds. Although wafer-level stacking using via-first and face-to-face or face-to-back stacking method by Cu diffusion bonding technology has already been investigated with some success, high temperature (>300 °C) processing still remains a challenge. Meanwhile, a Ji Fan and Chuan Seng Tan *Nanyang Technological University, Singapore* 

### **Acknowledgement**

The authors wish to thank the contributions and support for the work presented in this chapter from group members PENG Lan, LIM Dau Fatt, CHONG Gang Yih, and MADE Riko I in NTU.

### **5. References**


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Munding, A., Hubner, H., Kaiser, A., Penka, S., Benkart, P.&Kohn, E. (2008). Cu/Sn Solidliquid Interdiffusion Bonding, *Wafer Level 3-D ICs Process Technology*, Springer. Nadipalli, R., Fan, J., Li, K. H., Wee, K. W., Yu, H.&Tan, C. S. (2012). 3D Integration of MEMS and CMOS via Cu-Cu Bonding with Simultaneous Formation of Electrical, Mechanical and Hermetic Bonds.*Proceeding of IEEE International 3D System Integration* 

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Pavlidis, V. F.&Friedman, E. G. (2009). *Three-dimensional Integrated Circuit Design*, Elsevier. Peng, L., Li, H. Y., Lim, D. F., Gao, S.&Tan, C. S. (2011). High-Density 3-D Interconnect of Cu-Cu Contacts With Enhanced Contact Resistance by Self-Assembled Monolayer

Tadepalli, R.&Thompson, C. V. (2003). Quantitative Characterization and Process Optimization of Low-Temperature Bonded Copper Interconnects for 3-D Integrated Circuits.*Proceeding of IEEE International Interconnect Technology Conference*, Burlingame,

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Tan, C. S., Lim, D. F., Ang, X. F., Wei, J.&Leong, K. C. (2012). Low Temperature Cu-Cu Thermo-compression Bonding with Temporary Passivation of Self-assembled Monolayer and Its Bond Strength Enhancement, *Microelectron. Reliab.* 52(2): 321-324. Tan, C. S., Lim, D. F., Singh, S. G., Goulet, S. K.&Bergkvist, M. (2009). Cu-Cu Diffusion Bonding Enhancement at Low Temperature by Surface Passivation Using Self-

Whelan, C. M., Kinsella, M., Carbonell, L., Ho, H. M.&Maex, K. (2003). Corrosion Inhibition by Self-assembled Monolayers for Enhanced Wire Bonding on Cu Surfaces,

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	- Yu, D. Q., Lee, C., Yan, L. L., Thew, M. L.&Lau, J. H. (2009). Characterization and Reliability Study of Low Temperature Hermetic Wafer Level Bonding Using In/Sn Interlayer and Cu/Ni/Au Metallization, *J. Alloy. Compd.* 485(1-2): 444-450.

**Chapter 5** 

© 2012 Bina, licensee InTech. This is an open access chapter distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use,

distribution, and reproduction in any medium, provided the original work is properly cited.

© 2012 Bina, licensee InTech. This is a paper distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

**Homogenization Heat Treatment to Reduce** 

**the Failure of Heat Resistant Steel Castings** 

In this chapter, influence of the homogenization heat treatment on the failure of heat resistant steel castings is studied. First, the cast stainless steels and effective factors on the failure of these steels are described. One of the most important factors is sigma phase embrittlement which is studied, in detail. Finally, the effect of homogenization heat treatment on dissolution of carbides and reduction of sigma-phase and failure is discussed. The present chapter is a compilation of my experience in industry and other studies about fracture of continuous annealing furnace rollers, prepared for use by practitioners and researchers. The chapter may also be useful for graduate students, researching failure.

Cast stainless steels are usually classified as either corrosion resistant steel castings (which are used in aqueous environments below 650°C) or heat resistant steel castings (which are suitable for service temperatures above 650 °C). Cast stainless steels are most often specified on the basis of chemical composition using the designation system of the High Alloy

The corrosion resistant steel castings are widely used in chemical processes and electricity equipment that need corrosion resistant in aqueous or liquid-vapor environments at the temperatures less than 315°C. The serviceability of cast corrosion-resistant steels depends greatly on the absence of carbon, and especially precipitated carbides, in the alloy microstructure. Therefore, cast corrosion-resistant alloys are generally low in carbon (usually lower than 0.20% and sometimes lower than 0.03%). All cast corrosion-resistant

**2. Classification and designation of cast stainless steels** 

Product Group of the Steel Founders Society of America [1].

**2.1. Corrosion resistant steel castings** 

steels contain more than 11% chromium [1].

Mohammad Hosein Bina

http://dx.doi.org/10.5772/50312

**1. Introduction** 

Additional information is available at the end of the chapter


Mohammad Hosein Bina

94 Metallurgy – Advances in Materials and Processes

Yu, D. Q., Lee, C., Yan, L. L., Thew, M. L.&Lau, J. H. (2009). Characterization and Reliability Study of Low Temperature Hermetic Wafer Level Bonding Using In/Sn Interlayer and

Yun, C. H., Brosnihan, T. J., Webster, W. A.&Villarreal, J. (2005). Wafer-level packaging of MEMS accelerometers with through-wafer interconnects.*Proceeding of 55th Electronic Components & Technology Conference*, Lake Buena Vista, FL, USA, IEEE, pp.320-323. Yun, C. H., Martin, J. R., Tarvin, E. B.&Winbigler, J. T. (2008). Al to Al Wafer Bonding for MEMS Encapsulation and 3-D Interconnect.*Proceeding of IEEE International Conference on Microelectromechanical Systems (MEMS 2008)*, Tucson, AZ, USA, IEEE, pp.810-813.

Cu/Ni/Au Metallization, *J. Alloy. Compd.* 485(1-2): 444-450.

Additional information is available at the end of the chapter

http://dx.doi.org/10.5772/50312

### **1. Introduction**

In this chapter, influence of the homogenization heat treatment on the failure of heat resistant steel castings is studied. First, the cast stainless steels and effective factors on the failure of these steels are described. One of the most important factors is sigma phase embrittlement which is studied, in detail. Finally, the effect of homogenization heat treatment on dissolution of carbides and reduction of sigma-phase and failure is discussed. The present chapter is a compilation of my experience in industry and other studies about fracture of continuous annealing furnace rollers, prepared for use by practitioners and researchers. The chapter may also be useful for graduate students, researching failure.

### **2. Classification and designation of cast stainless steels**

Cast stainless steels are usually classified as either corrosion resistant steel castings (which are used in aqueous environments below 650°C) or heat resistant steel castings (which are suitable for service temperatures above 650 °C). Cast stainless steels are most often specified on the basis of chemical composition using the designation system of the High Alloy Product Group of the Steel Founders Society of America [1].

### **2.1. Corrosion resistant steel castings**

The corrosion resistant steel castings are widely used in chemical processes and electricity equipment that need corrosion resistant in aqueous or liquid-vapor environments at the temperatures less than 315°C. The serviceability of cast corrosion-resistant steels depends greatly on the absence of carbon, and especially precipitated carbides, in the alloy microstructure. Therefore, cast corrosion-resistant alloys are generally low in carbon (usually lower than 0.20% and sometimes lower than 0.03%). All cast corrosion-resistant steels contain more than 11% chromium [1].

as nickel content is increased, and in carburizing and nitriding atmospheres casting life increases with nickel content [1]. Austenitic iron-nickel-chromium alloys are used extensively under conditions of severe temperature fluctuations such as those encountered by fixtures used in quenching and by parts that are not heated uniformly or that are heated and cooled intermittently. In addition, these alloys have

characteristics that make them suitable for electrical resistance heating elements.

The microstructure of a particular grade is primarily determined by composition. Chromium, molybdenum, and silicon promote the formation of ferrite (magnetic), while carbon, nickel, nitrogen, and manganese favor the formation of austenite (nonmagnetic). Chromium (a ferrite and martensite promoter), nickel, and carbon (austenite promoters) are particularly important in determining microstructure [1]. The heat resistant casting alloys (except HA-type) are contain high proportions of chromium and nickel that are generally austenitic and nonmagnetic. The austenite in the matrix provides useful high-temperature strength if it is adequately reinforced with particles of carbide and nitride. The austenite must contain no ferrite to reach maximum strength [5]. The microstructure of HH-type austenitic stainless steel castings (25Cr-12Ni) used in continuous annealing furnace rollers in

un-worked condition is presented in Fig. 2. The ideal microstructure of HH alloy is

**Figure 2.** Microstructure of roller at un-worked condition (2% nital agent).

**3. Microstructure of heat resistant steels** 

**Figure 1.** Chromium and nickel contents in ACI standard grades of heat- and corrosion-resistant steel castings [1].

### **2.2. Heat resistant steel castings**

Stainless steel castings are classified as heat resistant if they are capable of sustained operation while exposed, either continuously or intermittently, to operating temperatures that result in metal temperatures in excess of 650°C. Heat resistant steel castings resemble high-alloy corrosion resistant steels except for their higher carbon content, which imparts greater strength at elevated temperature [1]. The three principal categories of H-type cast steels, based on composition, are [1–4]:


as nickel content is increased, and in carburizing and nitriding atmospheres casting life increases with nickel content [1]. Austenitic iron-nickel-chromium alloys are used extensively under conditions of severe temperature fluctuations such as those encountered by fixtures used in quenching and by parts that are not heated uniformly or that are heated and cooled intermittently. In addition, these alloys have characteristics that make them suitable for electrical resistance heating elements.

### **3. Microstructure of heat resistant steels**

96 Metallurgy – Advances in Materials and Processes

**2.2. Heat resistant steel castings** 

steels, based on composition, are [1–4]:

anticipated service temperature [1].

that are high in sulfur content.

castings [1].

**Figure 1.** Chromium and nickel contents in ACI standard grades of heat- and corrosion-resistant steel

Stainless steel castings are classified as heat resistant if they are capable of sustained operation while exposed, either continuously or intermittently, to operating temperatures that result in metal temperatures in excess of 650°C. Heat resistant steel castings resemble high-alloy corrosion resistant steels except for their higher carbon content, which imparts greater strength at elevated temperature [1]. The three principal categories of H-type cast

a. Iron-chromium alloys containing 10 to 30% Cr and little or no nickel. These alloys have low strength at elevated temperatures and are useful mainly due to their resistance to oxidation. Use of these alloys is restricted to conditions, either oxidizing or reducing, that involve low static loads and uniform heating. Chromium content depends on

b. Iron-chromium-nickel alloys contain more than 13% Cr and 7% Ni (always more chromium than nickel) [1]. These austenitic alloys are ordinarily used under oxidizing or reducing conditions similar to those withstood by the ferritic iron-chromium alloys, but in service they have greater strength and ductility than the straight chromium alloys. They are used, therefore, to withstand greater loads and moderate changes in temperature. These alloys also are used in the presence of oxidizing and reducing gases

c. Iron-nickel-chromium alloys contain more than 25% Ni and more than 10% Cr (always more nickel than chromium) [1]. These austenitic alloys are used for withstanding reduction as well as oxidizing atmospheres, except where sulfur content is appreciable. (In atmospheres containing 0.05% or more hydrogen sulfide, for example, ironchromium-nickel alloys are recommended [1].) In contrast with iron-chromium-nickel alloys, iron-nickel-chromium alloys do not carburize rapidly or become brittle and do not take up nitrogen in nitriding atmospheres. These characteristics become enhanced The microstructure of a particular grade is primarily determined by composition. Chromium, molybdenum, and silicon promote the formation of ferrite (magnetic), while carbon, nickel, nitrogen, and manganese favor the formation of austenite (nonmagnetic). Chromium (a ferrite and martensite promoter), nickel, and carbon (austenite promoters) are particularly important in determining microstructure [1]. The heat resistant casting alloys (except HA-type) are contain high proportions of chromium and nickel that are generally austenitic and nonmagnetic. The austenite in the matrix provides useful high-temperature strength if it is adequately reinforced with particles of carbide and nitride. The austenite must contain no ferrite to reach maximum strength [5]. The microstructure of HH-type austenitic stainless steel castings (25Cr-12Ni) used in continuous annealing furnace rollers in un-worked condition is presented in Fig. 2. The ideal microstructure of HH alloy is

**Figure 2.** Microstructure of roller at un-worked condition (2% nital agent).

austenitic, while, in Fig. 2, the initial microstructure consisted of austenite, ferrite, and also black carbide particles. The presence of ferrite was attributed to un-controlled solidification and therefore, occurrence segregation phenomenon in the sample.

Homogenization Heat Treatment to Reduce the Failure of Heat Resistant Steel Castings 99

**Figure 3.** (a) View of the failed furnace roller, (b) microstructure of austenitic matrix and network of

sigma phase precipitation on grain boundary (electrolytic etching) [13].

The presence of ferrite in microstructure may be beneficial or detrimental (especially at high temperatures), depending on the application. Ferrite can be beneficial in terms of weldability because fully austenitic stainless steels are susceptible to a weldability problem known as hot cracking, or microfissuring. But, at 540°C and above, the ferrite phase may transform to a complex iron-chromium-nickel-molybdenum intermetallic compound known as σ phase, which reduces toughness, corrosion resistance, and creep ductility [1]. The extent of the reduction in strength increases with time and temperature to about 815°C and may persist to 925°C [1].

### **4. Sigma phase embrittlement**

Several factors cause failure of heat resistant steel castings such as oxidation, sulfidation, carburization, creep, thermal fatigue, and sigma phase embrittlement. Intermetallics such as the sigma phase are important sources of failure in high-temperature materials.

The existence of σ phase in iron-chromium alloys was first detected in 1907 by the observation of a thermal arrest in cooling curves [6]. The first actual observation of σ in ironchromium alloys was reported in 1927 [7]. The σ phase was identified by x-ray diffraction in 1927 [8] and in 1931 [9]. After the existence of σ was firmly established, numerous studies were conducted to define the compositions and temperatures over which σ could be formed. In general, σ forms with long-time exposure in the range of 565 to 980°C, although this range varies somewhat with composition and processing [1]. Sigma phase has a tetragonal crystal structure with 30 atoms per unit cell and a *c/a* ratio of approximately 0.52 [10]. Sigma also forms in austenitic alloys. In fully austenitic alloys, σ forms from the austenite along grain boundaries. If δ-ferrite is present in the austenitic alloy, σ formation is more rapid and occurs in the δ-ferrite [1].

This phase is a unique combination of iron and chromium that produces a hard and brittle second phase. The presence of sigma phase not only results in harmful influence on the mechanical properties of the material, but also reduces its corrosion resistance by removing chromium and molybdenum from the austenitic matrix. A relatively small amount of sigma phase, when it is nearly continuous at a grain boundary, can lead to the very early failure of parts [11]. Fig. 3(a) shows a failed roller (HH-type) which was used for metal strip transfer in continuous annealing furnaces. An austenitic matrix and a network of sigma phase precipitates on austenitic grain boundaries in the failed roller is shown in Fig. 3(b). Formation of the sigma phase during prolonged heating at temperatures exceeding 650°C, results in a detrimental decrease in roller toughness at lower temperatures and during shut-down periods. Therefore, during shut-down, straightening or heating-up periods, the crack propagation along sigma phase at grain boundaries result in failure of rollers [12,13].

**4. Sigma phase embrittlement** 

persist to 925°C [1].

occurs in the δ-ferrite [1].

rollers [12,13].

austenitic, while, in Fig. 2, the initial microstructure consisted of austenite, ferrite, and also black carbide particles. The presence of ferrite was attributed to un-controlled solidification

The presence of ferrite in microstructure may be beneficial or detrimental (especially at high temperatures), depending on the application. Ferrite can be beneficial in terms of weldability because fully austenitic stainless steels are susceptible to a weldability problem known as hot cracking, or microfissuring. But, at 540°C and above, the ferrite phase may transform to a complex iron-chromium-nickel-molybdenum intermetallic compound known as σ phase, which reduces toughness, corrosion resistance, and creep ductility [1]. The extent of the reduction in strength increases with time and temperature to about 815°C and may

Several factors cause failure of heat resistant steel castings such as oxidation, sulfidation, carburization, creep, thermal fatigue, and sigma phase embrittlement. Intermetallics such as

The existence of σ phase in iron-chromium alloys was first detected in 1907 by the observation of a thermal arrest in cooling curves [6]. The first actual observation of σ in ironchromium alloys was reported in 1927 [7]. The σ phase was identified by x-ray diffraction in 1927 [8] and in 1931 [9]. After the existence of σ was firmly established, numerous studies were conducted to define the compositions and temperatures over which σ could be formed. In general, σ forms with long-time exposure in the range of 565 to 980°C, although this range varies somewhat with composition and processing [1]. Sigma phase has a tetragonal crystal structure with 30 atoms per unit cell and a *c/a* ratio of approximately 0.52 [10]. Sigma also forms in austenitic alloys. In fully austenitic alloys, σ forms from the austenite along grain boundaries. If δ-ferrite is present in the austenitic alloy, σ formation is more rapid and

This phase is a unique combination of iron and chromium that produces a hard and brittle second phase. The presence of sigma phase not only results in harmful influence on the mechanical properties of the material, but also reduces its corrosion resistance by removing chromium and molybdenum from the austenitic matrix. A relatively small amount of sigma phase, when it is nearly continuous at a grain boundary, can lead to the very early failure of parts [11]. Fig. 3(a) shows a failed roller (HH-type) which was used for metal strip transfer in continuous annealing furnaces. An austenitic matrix and a network of sigma phase precipitates on austenitic grain boundaries in the failed roller is shown in Fig. 3(b). Formation of the sigma phase during prolonged heating at temperatures exceeding 650°C, results in a detrimental decrease in roller toughness at lower temperatures and during shut-down periods. Therefore, during shut-down, straightening or heating-up periods, the crack propagation along sigma phase at grain boundaries result in failure of

the sigma phase are important sources of failure in high-temperature materials.

and therefore, occurrence segregation phenomenon in the sample.

**Figure 3.** (a) View of the failed furnace roller, (b) microstructure of austenitic matrix and network of sigma phase precipitation on grain boundary (electrolytic etching) [13].

All of the ferritic stabilizing elements promote σ formation [1]. In commercial alloys, silicon, even in small amounts, markedly accelerates the formation of σ. In general, all of the elements that stabilize ferrite promote σ formation. Molybdenum has an effect similar to that of silicon, while aluminum has a lesser influence. Increasing the chromium content, also favors σ formation. Small amounts of nickel and manganese increase the rate of σ formation, although large amounts, which stabilize austenite, retard σ formation. Carbon additions decrease σ formation by forming chromium carbides, thereby reducing the amount of chromium in solid solution [14,15]. Additions of tungsten, vanadium, titanium, and niobium also promote σ formation. As might be expected, σ forms more readily in ferritic than in austenitic stainless steels [14−17].

### **4.1. Formation mechanism of sigma phase in heat resistant steels**

Fig. 4 shows the formation mechanism of sigma phase in the failed roller. The presence of delta-ferrite in the austenitic matrix leads to accelerated sigma-phase formation. Generally, this phase nucleates inside delta-ferrite. Transformation of delta-ferrite can be described by two eutectoid reactions [1]:

$$
\delta \to \mathsf{M}\_{23}\mathsf{C}\_6 + \mathsf{y}\_2 \tag{1}
$$

Homogenization Heat Treatment to Reduce the Failure of Heat Resistant Steel Castings 101

By reaction (1), M23C6 carbides with lamellar morphology and also secondary austenite formed (Fig. 4). The mechanism of this reaction can be summarized as follows: first, the growth of carbide precipitates inside delta-ferrite lead to the formation of secondary austenite [18]. The chromium content near precipitates is high and results in increase in the content of chromium close to adjacent delta-ferrite. Therefore, the carbides growth develops inside delta-ferrite and a lamellar structure including carbides and secondary austenite is formed [19]. Finally, after completion of lamellar precipitation, the sigma-phase forms at

**Globular Sigma-phase** 

foreside of the precipitates [19].

**Figure 5.** Various morphologies of sigma phase in a stainless steel [20].

$$
\delta \to \sigma + \gamma\_2 \tag{2}
$$

**Figure 4.** Formation of pearlite-like structure in the cross section of failed roller. The arrows show the large pearlite-like colonies.

By reaction (1), M23C6 carbides with lamellar morphology and also secondary austenite formed (Fig. 4). The mechanism of this reaction can be summarized as follows: first, the growth of carbide precipitates inside delta-ferrite lead to the formation of secondary austenite [18]. The chromium content near precipitates is high and results in increase in the content of chromium close to adjacent delta-ferrite. Therefore, the carbides growth develops inside delta-ferrite and a lamellar structure including carbides and secondary austenite is formed [19]. Finally, after completion of lamellar precipitation, the sigma-phase forms at foreside of the precipitates [19].

100 Metallurgy – Advances in Materials and Processes

austenitic stainless steels [14−17].

two eutectoid reactions [1]:

large pearlite-like colonies.

All of the ferritic stabilizing elements promote σ formation [1]. In commercial alloys, silicon, even in small amounts, markedly accelerates the formation of σ. In general, all of the elements that stabilize ferrite promote σ formation. Molybdenum has an effect similar to that of silicon, while aluminum has a lesser influence. Increasing the chromium content, also favors σ formation. Small amounts of nickel and manganese increase the rate of σ formation, although large amounts, which stabilize austenite, retard σ formation. Carbon additions decrease σ formation by forming chromium carbides, thereby reducing the amount of chromium in solid solution [14,15]. Additions of tungsten, vanadium, titanium, and niobium also promote σ formation. As might be expected, σ forms more readily in ferritic than in

Fig. 4 shows the formation mechanism of sigma phase in the failed roller. The presence of delta-ferrite in the austenitic matrix leads to accelerated sigma-phase formation. Generally, this phase nucleates inside delta-ferrite. Transformation of delta-ferrite can be described by

**Figure 4.** Formation of pearlite-like structure in the cross section of failed roller. The arrows show the

23 6 2 δ M C γ (1)

<sup>2</sup> δ σγ (2)

**4.1. Formation mechanism of sigma phase in heat resistant steels** 

**Figure 5.** Various morphologies of sigma phase in a stainless steel [20].

### **4.2. Morphology of sigma phase**

The morphologies of sigma-phase can be classified into dendritic and globular structures [17,20,21]. Fig. 5 shows the morphologies of sigma phase in a stainless steel (19Cr-9Ni-2Mn). The sigma-phase was formed by transformation of the delta-ferrite to the embrittling sigma-phase and secondary austenite due to unsuitable working conditions. Lin et al. [20] have pointed out that the dendrite-like sigma-phase is unstable, while the globular sigma-phase is a stable one. Furthermore, dendrite-like σ morphology was observed surrounding the δ-ferrite particles, which meant that the δ→σ phase transformation occurred partially [20]. Gill et al. [21] also have proposed that the spheroid σ phase results from the instability of dendritic sigma-phase to any localized decrease in width.

Homogenization Heat Treatment to Reduce the Failure of Heat Resistant Steel Castings 103

**Figure 6.** Precipitation of sigma-phase at: (a) δ/γ interface boundary, and (b) triple conjunction, grain

corner and cellular [22].

### **4.3. Precipitation sites of sigma phase**

The precipitation sites of sigma-phase consist of δ/γ interface boundary, triple conjunction, grain corner and cellular which are shown in Fig. 6 [22]. The initial precipitation sites are δ/γ interphase boundary because it has higher boundary energy and many defects are concentrated here. Therefore, the precipitation of sigma-phase takes place preferentially at δ/γ boundary, and then precipitates toward interior of delta-ferrite grain [19,22]. The other precipitation sites were concentrated at δ-ferrite because σ-phase preferred to precipitate at a higher Cr content region [20,22]. The precipitation at grain corner meant that sigma-phase was strongly concentrated and formed at the corner of delta-ferrite. The precipitation at triple conjunction meant the σ-phase precipitated surrounding δ-ferrite. The cellular shape precipitation presented the eutectoid decomposition from delta-ferrite into sigma and secondary austenite phases that can be observed clearly at 800°C [22].

### **4.4. Effect of sigma phase on mechanical properties**

One of the most affected mechanical properties of steels by formation of the sigma phase is impact energy. Effect of sigma phase on the impact energy of austenitic steel Fe-25Cr-20Ni is shown in Fig. 8 [23]. By increasing the time of exposure at formation temperature range of sigma phase (760–870°C), toughness value decreases by 85%.

The influence of high-temperature exposure on the toughness of a low-interstitial 29Cr-4Mo ferritic stainless steel has been examined (Fig. 9) by Aggen et al. [24]. In this figure, the C-curve shows the time for embrittlement as a function of aging temperature. For σ formation, embrittlement was most rapid at about 775°C, whereas 475°C embrittlement was slower with a maximum rate at about 480°C. In general, for this alloy, the sigma-phase forms over the range of 595 to 925°C. Embrittlement is most pronounced when intergranular σ films form, resulting in intergranular tensile and impact fractures [1].

102 Metallurgy – Advances in Materials and Processes

**4.2. Morphology of sigma phase** 

**4.3. Precipitation sites of sigma phase** 

observed clearly at 800°C [22].

**4.4. Effect of sigma phase on mechanical properties** 

sigma phase (760–870°C), toughness value decreases by 85%.

width.

[1].

The morphologies of sigma-phase can be classified into dendritic and globular structures [17,20,21]. Fig. 5 shows the morphologies of sigma phase in a stainless steel (19Cr-9Ni-2Mn). The sigma-phase was formed by transformation of the delta-ferrite to the embrittling sigma-phase and secondary austenite due to unsuitable working conditions. Lin et al. [20] have pointed out that the dendrite-like sigma-phase is unstable, while the globular sigma-phase is a stable one. Furthermore, dendrite-like σ morphology was observed surrounding the δ-ferrite particles, which meant that the δ→σ phase transformation occurred partially [20]. Gill et al. [21] also have proposed that the spheroid σ phase results from the instability of dendritic sigma-phase to any localized decrease in

The precipitation sites of sigma-phase consist of δ/γ interface boundary, triple conjunction, grain corner and cellular which are shown in Fig. 6 [22]. The initial precipitation sites are δ/γ interphase boundary because it has higher boundary energy and many defects are concentrated here. Therefore, the precipitation of sigma-phase takes place preferentially at δ/γ boundary, and then precipitates toward interior of delta-ferrite grain [19,22]. The other precipitation sites were concentrated at δ-ferrite because σ-phase preferred to precipitate at a higher Cr content region [20,22]. The precipitation at grain corner meant that sigma-phase was strongly concentrated and formed at the corner of delta-ferrite. The precipitation at triple conjunction meant the σ-phase precipitated surrounding δ-ferrite. The cellular shape precipitation presented the eutectoid decomposition from delta-ferrite into sigma and secondary austenite phases that can be

One of the most affected mechanical properties of steels by formation of the sigma phase is impact energy. Effect of sigma phase on the impact energy of austenitic steel Fe-25Cr-20Ni is shown in Fig. 8 [23]. By increasing the time of exposure at formation temperature range of

The influence of high-temperature exposure on the toughness of a low-interstitial 29Cr-4Mo ferritic stainless steel has been examined (Fig. 9) by Aggen et al. [24]. In this figure, the C-curve shows the time for embrittlement as a function of aging temperature. For σ formation, embrittlement was most rapid at about 775°C, whereas 475°C embrittlement was slower with a maximum rate at about 480°C. In general, for this alloy, the sigma-phase forms over the range of 595 to 925°C. Embrittlement is most pronounced when intergranular σ films form, resulting in intergranular tensile and impact fractures

**Figure 6.** Precipitation of sigma-phase at: (a) δ/γ interface boundary, and (b) triple conjunction, grain corner and cellular [22].

The hardness of sigma phase in Fe-Cr alloys is approximately 68 HRC [1]. Fig. 10 shows the microstructure of austenitic matrix and network of sigma phase precipitation on grain boundary and also indenter effects on the surface at several locations. It can be seen that because of brittleness and higher hardness of sigma phase with respect to the austenite

**Figure 9.** Microstructure of austenitic matrix and network of sigma phase precipitation on grain boundary. It can be seen that because of sigma is brittle phase, often fractures during indentation

boundary, can lead to very early failure of high-temperature parts [12].

Therefore, a relatively small quantity of the σ phase, when it is nearly continuous at a grain

To eliminate segregation in the cast structure, it is frequently necessary to homogenize the part before usage to promote uniformity of chemical composition and microstructure. This treatment can also be used for complete dissolution of carbides and brittle and deleterious phases like sigma which are formed at operating conditions. In this method, steel is heated for a long enough period of time in order to complete the dissolution of carbides, and then the cooling starts at an appropriate rate to avoid formation of

matrix, this phase often fractures during indentation.

(indicated by the arrows) [12].

deleterious phases [12].

**5. Homogenization heat treatment** 

**Figure 7.** Effect of time and temperature of aging treatment on the impact energy of austenitic steel Fe-25Cr-20Ni [23].

**Figure 8.** Time-temperature relationships to produce 25 and 100°C DBTTs for a 29Cr-4Mo ferritic stainless steel as a function of aging times that cover both the 475°C embrittlement range and the σ phase embrittlement range [24].

The hardness of sigma phase in Fe-Cr alloys is approximately 68 HRC [1]. Fig. 10 shows the microstructure of austenitic matrix and network of sigma phase precipitation on grain boundary and also indenter effects on the surface at several locations. It can be seen that because of brittleness and higher hardness of sigma phase with respect to the austenite matrix, this phase often fractures during indentation.

**Figure 9.** Microstructure of austenitic matrix and network of sigma phase precipitation on grain boundary. It can be seen that because of sigma is brittle phase, often fractures during indentation (indicated by the arrows) [12].

Therefore, a relatively small quantity of the σ phase, when it is nearly continuous at a grain boundary, can lead to very early failure of high-temperature parts [12].

### **5. Homogenization heat treatment**

104 Metallurgy – Advances in Materials and Processes

25Cr-20Ni [23].

phase embrittlement range [24].

**Figure 7.** Effect of time and temperature of aging treatment on the impact energy of austenitic steel Fe-

**Figure 8.** Time-temperature relationships to produce 25 and 100°C DBTTs for a 29Cr-4Mo ferritic stainless steel as a function of aging times that cover both the 475°C embrittlement range and the σ To eliminate segregation in the cast structure, it is frequently necessary to homogenize the part before usage to promote uniformity of chemical composition and microstructure. This treatment can also be used for complete dissolution of carbides and brittle and deleterious phases like sigma which are formed at operating conditions. In this method, steel is heated for a long enough period of time in order to complete the dissolution of carbides, and then the cooling starts at an appropriate rate to avoid formation of deleterious phases [12].


**Table 1.** Microstructures of selected failed roller steel, before and after the homogenization heat

Microstructures of selected failed roller steel, before and after the homogenization heat treatment at various temperatures for 2 h are shown in Table 1. Formation of the brittle sigma phase and precipitation of carbides is clear in the microstructure of specimen HH14 when compared to the microstructure of specimen HH11. As a result of slow cooling in the furnace, all the desirable changes in the homogenized structure are reversed. In other words, the formation of carbide precipitates in grains, inhomogeneity of austenite as the matrix phase, and the formation of intermetallic brittle phases like sigma phase, which are all results of slow cooling at temperatures between 650 and 950°C, cause the toughness of the steel to decrease greatly. Since the formation of the sigma phase is a time consuming process, formation of this phase has been minimized by cooling in the air. The lowest amounts of sigma phase and carbides are in specimen HH11, which shows homogeneity of microstructure and a decrease in microscopic segregation. Therefore, for roller straightening and a good toughness to be obtained, homogenization heat treatment should be performed

Fig. 11 shows the precipitation sites of sigma-phase in the failed roller before and after the homogenization heat treatment at 1100 °C for 2 h followed by air cooling. Fig. 12 and Table 2 illustrate the chemical composition at three scanning points indicated in Fig. 11 (a), (b) and (c). As can be seen in Fig. 11, the points 1, 2, and 3 were austenite matrix, delta-ferrite, and sigma-phase, respectively. Table 2 shows that the chromium, molybdenum, and silicon content in the sigma-phase were higher than that of the austenite-phase. Generally, deltaferrite and sigma-phase are Cr-rich. But, the weight percent of silicon and molybdenum in the delta-ferrite is higher than that of other phases (austenite and sigma). Silicon and molybdenum plays an important role in 2 δ σγ phase transformation and acts as strong

As can be seen in Fig. 11, the heat treatment at 1100°C followed by cooling in air led to changing the morphology of sigma phase from dendritic structure (Figs. 11(a) and (b)) to globular structure (Fig. 11(c)). The dendritic sigma phase indicates an unstable shape, and globular sigma phase exhibits a stable shape. Also, the dendritic structure is brittle, while, the globular structure is ductile. Therefore, it can be concluded that for completing the transformation of delta-ferrite to sigma phase, the temperature of homogenization heat treatment should be increased to 1100°C and the morphology of sigma phase be

HH14

1100

treatment for 2 h.

Furnace

at 1100°C for at least 2 h followed by cooling in air [12].

stabilizers for delta-ferrite [5,20].

**Table 1.** Microstructures of selected failed roller steel, before and after the homogenization heat treatment for 2 h.

Microstructures (etched electrolytically by 10 M KOH solution)

Microstructures (etched by Marble's reagent)

Specimen Homogenization temperature (°C) Cooling environment


950

1050

1100


Air

Air

Air

HH1

HH2

HH8

HH11

Microstructures of selected failed roller steel, before and after the homogenization heat treatment at various temperatures for 2 h are shown in Table 1. Formation of the brittle sigma phase and precipitation of carbides is clear in the microstructure of specimen HH14 when compared to the microstructure of specimen HH11. As a result of slow cooling in the furnace, all the desirable changes in the homogenized structure are reversed. In other words, the formation of carbide precipitates in grains, inhomogeneity of austenite as the matrix phase, and the formation of intermetallic brittle phases like sigma phase, which are all results of slow cooling at temperatures between 650 and 950°C, cause the toughness of the steel to decrease greatly. Since the formation of the sigma phase is a time consuming process, formation of this phase has been minimized by cooling in the air. The lowest amounts of sigma phase and carbides are in specimen HH11, which shows homogeneity of microstructure and a decrease in microscopic segregation. Therefore, for roller straightening and a good toughness to be obtained, homogenization heat treatment should be performed at 1100°C for at least 2 h followed by cooling in air [12].

Fig. 11 shows the precipitation sites of sigma-phase in the failed roller before and after the homogenization heat treatment at 1100 °C for 2 h followed by air cooling. Fig. 12 and Table 2 illustrate the chemical composition at three scanning points indicated in Fig. 11 (a), (b) and (c). As can be seen in Fig. 11, the points 1, 2, and 3 were austenite matrix, delta-ferrite, and sigma-phase, respectively. Table 2 shows that the chromium, molybdenum, and silicon content in the sigma-phase were higher than that of the austenite-phase. Generally, deltaferrite and sigma-phase are Cr-rich. But, the weight percent of silicon and molybdenum in the delta-ferrite is higher than that of other phases (austenite and sigma). Silicon and molybdenum plays an important role in 2 δ σγ phase transformation and acts as strong stabilizers for delta-ferrite [5,20].

As can be seen in Fig. 11, the heat treatment at 1100°C followed by cooling in air led to changing the morphology of sigma phase from dendritic structure (Figs. 11(a) and (b)) to globular structure (Fig. 11(c)). The dendritic sigma phase indicates an unstable shape, and globular sigma phase exhibits a stable shape. Also, the dendritic structure is brittle, while, the globular structure is ductile. Therefore, it can be concluded that for completing the transformation of delta-ferrite to sigma phase, the temperature of homogenization heat treatment should be increased to 1100°C and the morphology of sigma phase be

transformed to stable globular structure. This structure leads to remarkable increase in the impact energy and ductility of continuous annealing furnace roller. In contrast, the formation of sigma-phase with dendritic morphology results in decrease in ductility and failure of the roller.

Homogenization Heat Treatment to Reduce the Failure of Heat Resistant Steel Castings 109

failure of the roller.

transformed to stable globular structure. This structure leads to remarkable increase in the impact energy and ductility of continuous annealing furnace roller. In contrast, the formation of sigma-phase with dendritic morphology results in decrease in ductility and

**Figure 10.** Morphology of sigma-phase. (a) and (b) after failure and before homogenization treatment, respectively and (c) after the homogenization heat treatment at 1100 °C for 2 h followed by air cooling.

110 Metallurgy – Advances in Materials and Processes

**Figure 10.** Morphology of sigma-phase. (a) and (b) after failure and before homogenization treatment, respectively and (c) after the homogenization heat treatment at 1100 °C for 2 h followed by air cooling.

**Figure 11.** The EDS analysis of: (a) austenite-phase (point 1 in Fig. 11(a)), (b) ferrite-phase (point 2 in Fig. 11(b)), and (c) sigma-phase (point 3 in Fig. 11(c)).


**Table 2.** Elemental composition of Fig. 12.

Fig. 13 shows the fracture surfaces of the failed sample before homogenization (Fig. 13(a)), the sample after the homogenization heat treatment at 1100 °C for 2 h followed by cooling in furnace (Fig. 13(b)), and the sample after the homogenization heat treatment at 1100 °C for 2 h followed by cooling in air (Fig. 13(c)). The EDS analysis of points 1 and 2 in Figs. 13(a) and 13(b), respectively indicated the presence of sigma-phase in definite crystallographic planes. In fact, the fracture surface of failed sample (Fig. 13(a)) contained a random arrangement of flat surfaces and surfaces with steps which is characteristic of brittle fracture. The fracture surface of the sample after the homogenization heat treatment at 1100 °C for 2 h followed by cooling in furnace (Fig. 13(b)) was a mixture of small dimples and layered surfaces that indicated brittle and ductile fractures in this sample. The EDS analysis of point 3 in Fig. 13(b) showed the presence of chromium in the form of carbide particles. The carbide

Fig. 11(b)), and (c) sigma-phase (point 3 in Fig. 11(c)).

**Table 2.** Elemental composition of Fig. 12.

**Figure 11.** The EDS analysis of: (a) austenite-phase (point 1 in Fig. 11(a)), (b) ferrite-phase (point 2 in

Cr Si Mo

Point Element (wt.%)

1 (gamma) 22.125 1.353 0.227 2 (delta) 27.639 2.896 1.341 3 (sigma) 34.641 2.544 1.021

Fig. 13 shows the fracture surfaces of the failed sample before homogenization (Fig. 13(a)), the sample after the homogenization heat treatment at 1100 °C for 2 h followed by cooling in furnace (Fig. 13(b)), and the sample after the homogenization heat treatment at 1100 °C for 2 h followed by cooling in air (Fig. 13(c)). The EDS analysis of points 1 and 2 in Figs. 13(a) and 13(b), respectively indicated the presence of sigma-phase in definite crystallographic planes. In fact, the fracture surface of failed sample (Fig. 13(a)) contained a random arrangement of flat surfaces and surfaces with steps which is characteristic of brittle fracture. The fracture surface of the sample after the homogenization heat treatment at 1100 °C for 2 h followed by cooling in furnace (Fig. 13(b)) was a mixture of small dimples and layered surfaces that indicated brittle and ductile fractures in this sample. The EDS analysis of point 3 in Fig. 13(b) showed the presence of chromium in the form of carbide particles. The carbide Homogenization Heat Treatment to Reduce the Failure of Heat Resistant Steel Castings 113

continuous at a grain boundary, can lead to very early failure of high-temperature parts. It is important to understand that the sigma-phase cannot undergo any significant plastic deformation; instead, it fractures even at relatively low strain levels. This is true at elevated temperatures, but even more so at ambient temperature. Where toughness and ductility are an important part of the system design, the sigma-phase cannot be tolerated. The formation of sigma-phase with dendritic morphology results in decrease in ductility and failure of heat resistant steels. The microstructural inhomogeneity (sigma-phase and carbides) can be eliminated by holding the sample at high temperatures for a sufficient time and cooling at an appropriate rate. The homogenization heat treatment under appropriate condition can led to change in the morphology of sigma phase from dendritic structure to globular structure. This structure leads to remarkable increase in the impact energy and ductility of

*Department of Advanced Materials and New Energy, Iranian Research Organization for Science and* 

[1] ASM Handbook, Volume 1, Properties and Selection: Irons, Steels, and High-

[2] Lamb, S., Practical Handbook of Stainless Steels and Nickel Alloys, ASM International,

[5] Prager, M. and Svoboda, J., Cast High Alloy Mettalurgy, Steel Casting Metallurgy, Steel

[6] W. Trietschke and G. Tammnann, The Alloys of Iron and Chromium. Zh. Anorg.

[7] E.C. Bain and W.E. Griffiths, An Introduction to the Iron-Chromium-Nickel Alloys,

[8] P. Chevenard, Experimental Investigations of Iron, Nickel, and Chromium Alloys, Trav.

[9] F. Wever and W. Jellinghaus, The Two-Component System: Iron-Chromium, Mitt.

[11] ASM Handbook, Volume 11, Failure Analysis and Prevention, ASM International,

[10] E.O. Hall and S.H. Algie, The Sigma Phase, Metall. Rev., Vol 11, 1966, p 61−88.

[3] ASM Handbook, Volume 15, Casting, ASM International, Materials Park, Ohio, 2005. [4] Shi, S. and Lippold, J.C., "Microstructure Evolution During Service Exposure of Two Cast, Heat-Resisting Stainless Steels - Hp-Nb Modified and 20-32nb", Materials

Performance Alloys, ASM International, Materials Park, Ohio, 2005.

Characterization, Vol. 59, No. 8, pp. 1029−1040, 2008.

Founder's Society of America, Rocky River, OH, 1984.

Mem., Bur. Int. Poids et Mesures, Vol 17, 1927, p 90.

Kaiser-Wilhelm Inst., Vol 13, 1931, p 143−147.

heat resistant steels.

**Author details** 

**7. References** 

Mohammad Hosein Bina

*Technology, Tehran, Iran* 

Materials Park, Ohio, 1999.

Chem., Vol 55, 1907, p 402−411.

Materials Park, Ohio, 2002.

Trans. AIME, Vol 75, 1927, p 166−213.

**Figure 12.** Fracture surfaces of: (a) the failed sample before homogenization, (b) the sample after the homogenization heat treatment at 1100 °C for 2 h followed by cooling in furnace, and (c) followed by cooling in air.

particles existed in the center of small dimples. According to EDS analysis of points 2 and 3, it can be said that due to slow cooling rate in the furnace, all the desirable changes that occur in homogenized structures are reversed and a new formation of the sigma-phase and precipitates in the sample results in a transition from ductile to almost brittle fracture. As can be seen in Fig. 13(c), formation of deep dimples is a main characteristic of ductile fracture. The EDS analysis of the point 4 was similar to the base metal. This figure indicated a considerable decrease in sigma phase and precipitates amounts after homogenization.

Therefore, before roller straightening, the homogenization heat treatment should be performed for dissolution of deleterious phases in austenite as the matrix phase and obtaining good toughness. In many cases, microstructural inhomogeneity can be eliminated by holding the sample at high temperatures for a sufficient time and cooling at an appropriate rate. Otherwise, the possibility of the formation of fine cracks during roller straightening is very high. These cracks can result in roller fracture during the straightening process and/or in the continuous-annealing furnace.

### **6. Conclusions**

The sigma phase tends to precipitate in the regions of high chromium content, such as the chromium carbides in the grain. A relatively small quantity of the σ phase, when it is nearly continuous at a grain boundary, can lead to very early failure of high-temperature parts. It is important to understand that the sigma-phase cannot undergo any significant plastic deformation; instead, it fractures even at relatively low strain levels. This is true at elevated temperatures, but even more so at ambient temperature. Where toughness and ductility are an important part of the system design, the sigma-phase cannot be tolerated. The formation of sigma-phase with dendritic morphology results in decrease in ductility and failure of heat resistant steels. The microstructural inhomogeneity (sigma-phase and carbides) can be eliminated by holding the sample at high temperatures for a sufficient time and cooling at an appropriate rate. The homogenization heat treatment under appropriate condition can led to change in the morphology of sigma phase from dendritic structure to globular structure. This structure leads to remarkable increase in the impact energy and ductility of heat resistant steels.

### **Author details**

114 Metallurgy – Advances in Materials and Processes

cooling in air.

**6. Conclusions** 

**Figure 12.** Fracture surfaces of: (a) the failed sample before homogenization, (b) the sample after the homogenization heat treatment at 1100 °C for 2 h followed by cooling in furnace, and (c) followed by

particles existed in the center of small dimples. According to EDS analysis of points 2 and 3, it can be said that due to slow cooling rate in the furnace, all the desirable changes that occur in homogenized structures are reversed and a new formation of the sigma-phase and precipitates in the sample results in a transition from ductile to almost brittle fracture. As can be seen in Fig. 13(c), formation of deep dimples is a main characteristic of ductile fracture. The EDS analysis of the point 4 was similar to the base metal. This figure indicated a considerable decrease in sigma phase and precipitates amounts after homogenization.

Therefore, before roller straightening, the homogenization heat treatment should be performed for dissolution of deleterious phases in austenite as the matrix phase and obtaining good toughness. In many cases, microstructural inhomogeneity can be eliminated by holding the sample at high temperatures for a sufficient time and cooling at an appropriate rate. Otherwise, the possibility of the formation of fine cracks during roller straightening is very high. These cracks can result in roller fracture during the straightening

The sigma phase tends to precipitate in the regions of high chromium content, such as the chromium carbides in the grain. A relatively small quantity of the σ phase, when it is nearly

process and/or in the continuous-annealing furnace.

#### Mohammad Hosein Bina

*Department of Advanced Materials and New Energy, Iranian Research Organization for Science and Technology, Tehran, Iran* 

### **7. References**


[12] Bina, M.H., Dini, G., Vaghefi, S.M.M., Saatchi, A., Raeissi, K. and Navabi, M., "Application of Homogenization Heat Treatments to Improve Continuous-Annealing Furnace Roller Fractures", Engineering Failure Analysis, Vol. 16, No. 5, pp. 1720−1726, 2009.

**Chapter 6** 

© 2012 Pencea, licensee InTech. This is an open access chapter distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use,

95%[1, 2, 3]. The EN ISO 17025 [1] stipulates that the quality of a

distribution, and reproduction in any medium, provided the original work is properly cited.

© 2012 Pencea, licensee InTech. This is a paper distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

**Multiconvolutional Approach** 

Additional information is available at the end of the chapter

Ion Pencea

http://dx.doi.org/10.5772/50511

**1. Introduction** 

exigency requires *p*

**to Treat the Main Probability Distribution** 

**Uncertainties of Metallurgical Tests** 

**Functions Used to Estimate the Measurement** 

The quality of a metallic product is validated by tests results. Thus, the product quality is depicted by the quality of the testing results that furthermore depends on several factors such as: the incomplete knowledge about measurand, the adequacy of the testing method in relation to measurand, the equipment adequacy for method, the human factor; the statistical inference, etc. The influence factors of a measurement process, whether known or unknown, may alter the result of a measurement in an unpredictable way. Thus, a test result bears an intrinsic doubt about its closeness to the conventional true value of the measurand, fact which is commonly perceived as uncertainty about the test result. One of the most important tasks for the experimentalist is to specify an interval about the estimated value of the measurand (�̅�� [�̅ - *U*; �̅ + *U*] in which the true (conventional) value (μ) could be found with specified confidence level, i.e. the probability (*p*) that μ ∈ [�̅ - U; �̅ + U]. The practice

numeric test result is quantified by the expanded uncertainty *U(p%),* where *p* is the level of confidence (*p* � 95%). An alternative specification of *U* is its level of significance expressed as *1-p*. In order to obtain a higher quality of the test result, the experimentalist should perform a set of at least 30 repeated measurements [2, 4]. In the field of metallurgy this is quite impossible for technical and economical reasons. Therefore, the quality of the test result should be guaranteed by advanced knowledge about the testing method and by other means such as: equipment etalonation, Certified Reference Materials (CRMs) usage and, last but not least, correct uncertainty estimation based on proper knowledge about the probabilistic behavior of the compound random variable derived from a set of repeated

