**2.6. Pulse agitated substrate hot electron injection (PASHEI) technique for studying trapping parameters**

PASHEI technique [27, 28] can be used to study charge trapping in the gate dielectric of an MOSFET under low gate biases. The commonly used carrier injection techniques, such as Fowler–Nordheim (FN) tunneling, and CHC techniques require high gate field to obtain high injection flux, which makes it impractical to study trapping effects under low gate fields when the injection flux is extremely low. Another technique, the substrate hot-electron injection (SHEI) technique, does allow high flux injection at low gate fields, but it requires a separate p–n junction injector in the vicinity of the MOSFET being tested, which rules out most of the devices available for test. In contrast, the PASHEI technique, which will be described below, allows substrate hot-electron injection with just an ordinary MOSFET without a separate injector. The PASHEI technique relies on properly timed pulse sequences to achieve SHEI, as illustrated schematically in Figure 9 for an n-MOSFET. As shown in Figure 9(b), during the electron-emitting phase, the S/D junction is forward biased, and electrons are injected into the substrate. Subsequently, the S/D is reverse biased to create a deep depletion region, which will cause the previously injected electrons in the substrate (those that have not recombined away) to be accelerated across the depletion region and injected into the gate dielectric. This period is called the collecting phase, during which the emitting voltage can control the gate voltage, and large injection current can be achieved with low Vg. Figure 10 illustrates the use of the Vth vs. Ninj curve, obtained by the PASHEI technique, to extract trap parameters. For this particular sample, we obtained a trap density of 2.7 x1012 cm-2, and capture cross-section of 7.7 10-19 cm2, by fitting the trapping theory presented by Zafar [29].

222 Dielectric Material

(a)

(b)

**Figure 8.** (a) Three charge pumping curves measured for the purpose of directly profiling the eraseinduced damage, and graphically illustrating the direct lateral profiling principle. (b) Lateral profiles of both positive oxide charge and interface traps near the source junction, transformed from the three

**2.6. Pulse agitated substrate hot electron injection (PASHEI) technique for** 

PASHEI technique [27, 28] can be used to study charge trapping in the gate dielectric of an MOSFET under low gate biases. The commonly used carrier injection techniques, such as Fowler–Nordheim (FN) tunneling, and CHC techniques require high gate field to obtain high injection flux, which makes it impractical to study trapping effects under low gate fields when the injection flux is extremely low. Another technique, the substrate hot-electron injection (SHEI) technique, does allow high flux injection at low gate fields, but it requires a separate p–n junction injector in the vicinity of the MOSFET being tested, which rules out most of the devices available for test. In contrast, the PASHEI technique, which will be described below, allows substrate hot-electron injection with just an ordinary MOSFET without a separate injector. The PASHEI technique relies on properly timed pulse sequences to achieve SHEI, as illustrated schematically in Figure 9 for an n-MOSFET. As shown in Figure 9(b), during the electron-emitting phase, the S/D junction is forward biased, and

charge pumping curves in (a).(From Reference [22]).

**studying trapping parameters** 

**Figure 9.** (a) Schematic description of PASHEI. (b) Pulse sequence for PASHEI. (From Reference [22])

**Figure 10.** Vth vs. Ninj curve obtained by the PASHEI technique, to extract trap parameters. (From Reference [22])
