**3. Property requirements of low dielectric material**

Dielectric materials must meet stringent material property requirements for successful integration into the interconnect structures. These requirements are based on electrical properties, thermal stability, thermomechanical and thermal stress properties, and chemical stability. The desired electrical properties can be outlined as low dielectric constant, low dielectric loss and leakage current, and high breakdown voltage. As RC delay and crosstalk are primarily determined by the dielectric constant, in a typical CVD SiO2 film, the dielectric constant is around 4. And although many polymeric materials satisfy these electrical criteria, the dimensional stability, thermal and chemical stability, mechanical strength, and thermal conductivity of polymers are inferior to those of SiO2.


**Table 1.** Property Requirements of Low-k Dielectrics

#### 62 Dielectric Material

In the fabrication of the multilevel structures, as many as 10 to 15 temperature treatments are repeated at elevated temperatures exceeding 400-425oC. This inherent processing of inter-dielectric (ILD) materials makes thermal stability a key prerequisite of low dielectric materials in microelectronics. Not only is the thermal stability in terms of degradation key, but the insensitivity to thermal history may be just as important. For example, changes in the crystallinity and/or crystalline phases during these thermal cycles may cause changes in the electrical and/or mechanical properties, making the material dependent on its thermal history. Other problems seldom seen in thermal processing include outgassing of volatile solvents and/or decomposition products which may cause poisoning, delamination, blistering, or cracking in the ILD.

Low Dielectric Materials for Microelectronics 63

Average bond energy (Kcal/mole)

The long-term reliability of chips fabricated using low-k materials must also be evaluated. Electromigration and stress voiding are primary failure mechanisms in integrated circuits [4-6] and these are reliability concerns when replacing SiO2 with an alternative ILD that has

There are two strategies for designing a low dielectric material: decreasing dipole strength or the number of dipoles (Fig. 4) or a combination of both. In the first strategy, materials with chemical bonds of lower polarizability than Si-O or lower density would be used. Today, the microelectronics industry has already moved to certain low-k materials, where some silica Si-O bonds have been replaced with less polar Si-F or Si-C bonds. A more elementary reduction of the polarizability can be attained by utilizing all nonpolar bonds,

The second strategy involves decreasing the number of dipoles within the ILD material by effectively decreasing the density of a material. This can be achieved by increasing the free volume through rearranging the material structure or introducing porosity. Porosity can be constitutive or subtractive. Constitutive porosity refers to the self-organization of a material. After manufacturing, such a material is porous without any additional treatment. Constitutive porosity is relatively low (usually less than 15%) and pore sizes are ~ 1 nm in diameter. According to International Union of Pure and Applied Chemistry (IUPAC) classification[9], pores less than 2 nm are denoted 'micropores'. Subtractive porosity involves selective removal of part of the material. This can be achieved via an artificially added ingredient (e.g. a thermally degradable substance called a 'porogen', which is removed by annealing to leave behind pores) or by selective etching (e.g. Si-O bonds in

thermal and mechanical properties inferior to those of SiO2.

such as C-C or C-H, as in the case of organic polymers.

(Å3)

**Table 2.** Electronic polarizabilitya and bond enthalpiedsb

SiOCH materials removed by HF).

C - C 0.531 83 C - F 0.555 116 C - O 0.584 84 C - H 0.652 99 O - H 0.706 102 C**=**O 1.020 176 C**=**C 1.643 146 C≡C 2.036 200 C≡N 2.239 213

**4. Design of low dielectric material** 

Bond Polarizability

a Reference [7]. b Reference [8]

Another thermomechanical concern of ILD materials is its coefficient of thermal expansion (CTE). The extensive thermal cycling of microelectronics may also cause stresses in the interconnect structure if there is a CTE mismatch between the ILD material and the metal or substrate. These stresses invariably cause delamination if adhesion is poor. And while adhesion promoters may be added to enhance wetting and chemical bonding at the interface between the ILD and substrate, this is mostly undesired from manufacturing point of view, as it adds unnecessary processing steps. Also, if the adhesion promoter thermally degrades, it may lead to adhesion failures or create a leakage path.

Adhesion is determined by chemical bonding at the metal/ILD interface and the mechanical interaction between the metal and ILD. Thus, ideal ILDs should have good mechanical properties such as a large Young's modulus (E), tensile strength, and elongation-at-break. And although it is uncertain what constitutes sufficient mechanical strength for successful integration into a manufacturable process, the elongation-at-break should be as large as possible to sustain the deformation and impart crack resistance, even at elevated temperatures. Also, a high modulus retention at elevated temperatures, E(T), is required for the ILD to maintain its structural integrity and dimensional stability during subsequent processing steps. Related to E(T) is the glass transition temperature, Tg. Since exceeding the Tg causes a large decrease in the modulus and yield stress in amorphous, non-crosslinked polymers, a Tg greater or equal to the highest processing temperature is desired. For example, residual compressive stresses in capping layers can cause buckling and delamination of the capping films due to the compliance of an ILD above its Tg [1,2]. Buckling has also been observed in capping layers deposited below the ILD's Tg if the capping film is highly compressive [3].

Other processing concerns include chemical resistance to the solvents and etchants commonly used during chip fabrication, chemical interaction with the metal lines causing corrosion, and moisture uptake. Moisture is a primary concern because even trace amounts can have a detrimental impact on the dielectric constant. The ILDs should also be free of trace metal contaminants, have long shelf-lives, and, preferably, not require refrigeration. Metal contamination, which can compromise the device and provide a leakage path between lines, is often a problem for polymers synthesized using metal catalysts. Other processing requirements include the ability to pattern and etch the film, etch selectivity to resists, good thickness uniformity, gap-fill in submicron trenches, and planarization.

The long-term reliability of chips fabricated using low-k materials must also be evaluated. Electromigration and stress voiding are primary failure mechanisms in integrated circuits [4-6] and these are reliability concerns when replacing SiO2 with an alternative ILD that has thermal and mechanical properties inferior to those of SiO2.
