**9.3 Image watermarking**

Image watermarking emerged in the mid 90s as a discipline, among the wide range of multidisciplinary field of data hiding, as a methodology of protecting digital images from any piracy act. It consists of embedding a watermark (a trace) within a digital image before using or publishing it. The efficiency of a watermarking method lies generally in its ability to fulfil three requirements: robustness, security and invisibility.

Watermarking techniques can be classified into two categories; spatial domain methods and transform-based methods. The wavelet-based watermarking technique falls into the latter. In (Kundur & Dimitrios, 1997, 1998 & Hernandez-Guzman et al., 2008) both the original image and the watermark are first transformed to the wavelet domain, then the resulting image pyramids are fused according to certain rules, which take into account the characteristics of the Human Visual System (HVS). The wavelet in this case facilitates a simultaneous spatial localisation and frequency spread of the watermark within the source image. It has been shown that the method is robust under compression, additive noise and filtering (Kundur & Dimitrios, 1997, 1998)

To the best of our knowledge, there is no general baseline framework for a wavelet-based watermarking system. However, in most cases, the multiresolution feature of the transform is exploited to achieve robust image watermarking implementations (Kundur & Dimitrios, 1997, 1998; Tsekeridou & Pitas, 2000; Wu et al., 2000 & Hernandez-Guzman et al., 2008).

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has dramatically maturated either by the developments in the microelectronic technology, which led to the emergence of a new range of devices providing a system gate beyond a million (e.g. Xilinx Virtex family) or by the continual emergence of a wide range of FPGA

In general, FPGA devices are organised as 2D arrays of configurable logic blocks or logic elements. The parallel nature of FPGA devices make them very good targets for application that require parallel processing such as in image and video processing. In such applications, these FPGA devices are used either as co-processors or accelerators (real time applications). It is not the aim of this section to survey the field of wavelet based FPGA implementation but rather to highlight some implementation of the DWT for application in the field of

Due to its high computational complexity, real time video compression has always been a very challenging topic for digital system designers. The implementation of such systems on FPGAs does not fail to the rule. In probably one of the earliest works in the field, Villasenor et al. in (Villasenor et al., 1995) investigated wavelet transforms based video compression algorithms for use in low-power wireless communications. Using this previous work as a basis, the same authors have further described two implementations using a single FPGA (Schoner et al., 1995). In the first approach, the proposed video compression scheme is directed towards low-complexity implementations using a single in system reprogrammable FPGA. The optimisation of the algorithm to fit the system results in an efficient implementation, however, the system is limited to only a single compression algorithm. In the second approach, to allow more flexibility, the FPGA chip is combined with an external special purpose Video Signal Processor (VSP). The FPGA/VSP combination allows the implementation of four common compression algorithms and their execution in real time. The proposed design schemes were both implemented on a Xilinx FPGA. The first design runs at 20 **f**rames **p**er **s**econds (fps) when processing a 256x256 frames with a spacial precision of 8-bits. It includes a wavelet transform, a simplified quantiser and a run-length encoder. The second scheme is capable of implementing a DCT, a 2-D FIR, a Vector Quantisation scheme (VQ) and the wavelet transform using a single generic equation. It delivers different performances: 13.3 fps for 7x7 mask 2-D filter, 55 fps for an 8x8 block DCT,

7.4 fps for a 4x4 VQ (at 1/2 bit per pixel) and 35.7 fps for a single wavelet stage.

Partitionning images prior to computation is a well known technique in the field of image processing. It has been widely used in DCT-based image compression schemes. In the last decade, this technique has been adopted in the wavelet-based JPEG2000 new compression standard (Ebrahimi et al., 2002). In (Ritter & Molitor, 2000), a biorthogonal Cohendaubechies-Fauveau (CDF) 5/3 wavelet pair followed by **E**mbedded **Z**erotree **E**ncoding (EZT) technique is used in a lossy and a lossless compression schemes, respectively. Since the 5/3 pair is an integer-to-integer wavelet, a lifting scheme based architecture is used for the implementation. In the lossless compression scheme, the image is partitioned into a set of 32x32 tiles before processing. The system is then implemented onto an FPGA prototyping board. The system achieved an operating speed of 20MHz. In the second scheme, in order to avoid excessive increase of the internal memory, a rearrangement of the filtered and decimated outputs is proposed (interlocked external memory access. Because of its integer nature (integer to integer), as well as, for its adoption in the JPEG 2000 standard, the biorthogonal 5/3 wavelet is the focus of many studies. Since the wavelet transform

based system.

image/video processing (in line with section 9).

Fig. 23. Wavelet-based watermarking system
