**9. Conclusion**

IA is a promising approach for communications with numerous pairs of users. In our contribution we have investigated the usefulness of IA for MIMO UWB communication systems. Beside apart of the significant power processing needed for the high data rate applications, the MIMO UWB antenna design remains a challenge. The antenna synthesis presented here can be viewed as synthesizing an antenna system with optimal radiation pattern catered towards an intended scenario. This antenna system radiates orthogonalized channels (after the averaging strategies) with sufficient power and has fixed beamforming (direction optimized according to the scenario and with averaging over various positions) at the transmitter and receiver antenna systems. Also, the resulting system has been simplified to 2 inputs and 2 outputs based on the subchannels with the strongest power. The whole system has been simulated by an indoor ray tracing tool and the corresponding MIMO UWB base band modulation schemes and detection techniques. Moreover, an antenna selection method is proposed in order to increase the robustness of IA in real environments. It is demonstrated that by using orthogonal multimode antennas a significant gain can be obtained. In the third and last part of our contribution the hardware efforts of IA algorithms are studied in more detail. It is worked out that highly challenging system blocks like IA can be elaborated today only by the help of suitable hardware emulation platforms which are typically FPGA-based. Therefore, a generic methodology has been elaborated and implemented which allows to explore the implementation design space. The hybrid hardware-in-the-loop research and design space exploration (DSE) framework created in this work combines high-level tools (e.g. Matlab/Simulink) and optimized hardware blocks. The properties of the elaborated optimized on-chip infrastructure template make it suitable for usage in final ASIC targets and thus enable the test, debugging and characterization of signal processing blocks in their target environment. This DSE framework has been used to derive cost models for K-user iterative IA algorithms. Estimates for the implementation effort (e.g. in terms of operation counts in dependency of the number of users) have been derived. Because of this project, a generic DSE framework is available and can be used to work out suitable architectures for further challenging building blocks.
