*6.4.1. UWB single-chip head architecture*

Fig. 59 shows the simplified block topology of the realized M-Sequence based single-chip transceiver head (alias System-on-Chip, SoC head). In correspondence with the system topology depicted in Fig. 4, the M-sequence transceiver SoC contains one transmitter and two receiver circuits (commonly assigned as 1Tx 2Rx configuration).

According to our experience, the 1Tx-2Rx topology of the primary sensor cell represents the optimum regarding achievable performance and circuit complexity. Moreover, the implementation of 1Tx 2Rx structure on one die has the advantage of permitting both crosstalk investigations between active and passive circuit parts (i.e. transmitter and receiver) as well as between two passive parts (i.e. receiver 1 and 2). From a practical point of view, the stand-alone 1Tx 2Tx devices are suitable for implementations where two receive channels are needed a priori, e.g. for simple localization tasks or in material testing (see chapter 11) in which the second (slave) receive channel can be used for device online calibration purposes. The desired MIMO usability as for instance in novel UWB-arrays for high-resolution nearfield imaging (*ultraMedis*) or localizations (*CoLoR*) with 1Tx 2Rx constellation of primary sensing cells is also given.

**Figure 59.** Simplified architecture of a fully monolithically integrated UWB M-Sequence based transceiver.
