*6.4.4. Single chip transceiver head evaluation*

430 Ultra-Wideband Radio Technologies for Communications, Localization and Sensor Applications

In summary, the goals of the single-chip integration are:

[54]. The channel is designed for operation up to 18 GHz.

maximum linear operation input signal peak-peak swing is 60 mV.

interconnections with steeper signal edges,

introducing a wideband modulator,

imaging [56]-[61].

cables.

wideband material investigations and MIMO-applications like in medical microwave

to improve the synchronization between transmitter and receiver due to shorter

to provide means of a flexible adaptation of the operational frequency band by

Thus, to achieve the desired MIMO usability, the shift register may be enabled and disabled, and transmitter buffers can be switched off (power down) by simple TTL-signals so that no external RF-switch is required to operate in a MIMO system. The transceivers are designed in such a way that they may either work while being driven individually or they may be cascaded with respect to the master system clock so that all units of a MIMO array work synchronously. Once the array is calibrated, a power down feature will be used for active transmitter selection. Thus, all receivers of MIMO array work in parallel and capture permanently data in order to get maximum measurement speed. As shown in Fig. 59, the transceiver IC is equipped with a wideband multiplier which optionally allows the sensor stimulus frequency band to be shifted and doubled ([2] or [49], [55]) or the operational band to be adapted to a specific application [50] in conformity with regulation requirements [52] -

Moreover, the multiplier can invert the stimulus M-sequence by implementing simple ECL signals on the control port. This feature may be useful to provide uncorrelated transmit signals in MIMO arrays. In addition, the sampling timing control chain is equipped with optional switchable shunt path. This add-on allows direct clock supplying from chip periphery. Thereby, user-selectable sampling rates or enhanced signal capturing approaches (e. g. equivalent time oversampling approach [50]) are possible without IC redesign. The analog receivers are designed to operate with wideband signals up to 18 GHz. The

Fig. 60 shows the chip die micrograph of the discussed transceiver with marked particular functional blocks and well visible top metal of a decoupling guard between the transmitter and receiver (line in the middle). The transmitter and receiver cores as well as their particular I/O pads are placed on the opposite die sides to minimize mutual on-chip coupling as well as inductive coupling between the bond wires after packaging. As extensively discussed in [62] or [63], [64], the decoupling guard is a guard well in a trench between the noisy transmitter and sensitive receivers. In the final assembly, the guard is connected to the quiet potential in order to fix the voltage of the substrate between the Tx and Rx die part by absorbing potential substrate fluctuations. The transceiver die occupies

 to save power consumption by avoiding power hungry PCB-interconnection lines, to investigate broadband signal leakage on chip and cross-talk due to the housing, to avoid temperature effects on calibrated sensor systems due to temperature difference between the measurement channels and temperature expansion of device internal

> For the sensor head prototype evaluation, the transceiver chip has been measured on wafer as well as packaged with well-established chip-on-board technology using an optimized composite 4-layer carrier made from Rogers 4003C™, FR4 laminate and ultrasonic bonding procedure with 1-mil aluminum wires. The bond wire landing areas for RF ports on the board are designed to match as closely as possible (i.e. realizable) the pitch on the IC to avoid long wire connections. The cavity approach has not been implemented because of challenging technological realization on the selected carrier board. Fig. 61 shows the test board whereat the wired die is zoomed out for better visualization. The die is located in the center of the photo and top glue is used to protect the bond wires. It is mounted on a metal patch which is connected with VEE. This allows a direct connection between the substrate and the board's lowest potential. The top layer is mainly used for RF signal routing whereas the bottom layer is used for control lines. The inner plane layer below the top layer is the common board GND, and it also provides the GND reference for the RF signal lines. The other inner plane is the supply layer. The supply is bypassed to the GND with a 0.1 µF ceramic capacitor placed as close as possible to the die.

> A basic test set-up for the sensor head prototype parameter evaluation is symbolically depicted in Fig. 62. The photograph on the right side shows an example of such test assembly. The evaluation board is connected to a 10-bit data "digitizer" (ADC), FPGA control and pre-processing unit which is equipped also with the PC interface. Moreover, for the parameter characterization, stable sinusoidal reference has to be connected to the system

432 Ultra-Wideband Radio Technologies for Communications, Localization and Sensor Applications

clock port (not shown in the photograph). This signal comes on board through an SMP connector and toggles the analyzed assembly. The toggle rate for the packaged prototype can be chosen quite flexibly between 0.5 and about 19 GHz, which implies a good compliance with the actual and intended applications needs.

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via system calibration. Thus, achieved spurious free system dynamic range is comparable to

**Figure 63.** Example of normalized IRF captured with a 9*th* order M-Sequence based experimental

As a result, it can be concluded that we have successfully realized a novel functional hardware platform, both multi-chip and single-chip based, for current (e.g. [56], [60], [61]) as well as future scientific investigations in the complex field of an ultra-wideband MIMO

Electromagnetic sounding for non-destructive and remote sensing, respectively, has been exploited for a long time. However, its practical application was mostly restricted to narrow-band sensors or it was banned to the laboratory in the case of wideband examinations. The reason for this limitation has been the lack of reasonable wideband

The first field deployable ultra wideband devices were used in ground-penetrating radar (GPR). They mostly exploited powerful nanosecond or sub-nanosecond pulses to feed the transmission antenna. Meanwhile, several other UWB-sensor techniques have been introduced. Section 2 summarizes the most popular of them. The challenges of corresponding research and development are mainly to be seen in the performance improvement of the sensor electronics and its monolithic integration aimed at cost and

The main part of the chapter deals with a pseudo-noise UWB approach and its main components. The pseudo-noise concept is an interesting alternative to other wideband sensing principles promoting both high device performance and monolithic integration. Due to its simple and rigid synchronization, it provides exact and time-stable signal generation

simple adaptation of bandwidth, signal duration (period duration) and recording time

single chip assembly and broadband measured TX to RX isolation.

that of the demonstrator device.

sensing and localizations.

measurement equipment.

power reduction.

and signal capture which promotes:

to the needs of the actual application, the implementation of large MIMO-arrays,

**7. Summary** 

**Figure 61.** Evaluation board for Single-Chip sensor head. The wired die (close-up photograph) is protected by top glue.

**Figure 62.** Generic transceiver test configuration (left) and an example of an experimental M-sequence based sensing unit assembly (right).

Interchannel cross-talk plays an important role in many applications. As Tx-Rx-decoupling up to 130 dB could be reached if the individual components are properly shielded (see Fig. 57, left), an interesting question is how the single chip devices behave with respect to that problem even though decoupling design techniques are implemented [2]. Fig. 63 shows the results for on-wafer measurements and the housed chip. Obviously, the chip design outperforms the quality of the chip wiring with respect to the cross-talk performance. The impulse response function of the housed chip is also shown in Fig. 63 (left). It was gained using the configuration as depicted in Fig. 62 (left). The cross-talk pulse can clearly be identified. However, it should be noted that it can largely be suppressed by post-processing via system calibration. Thus, achieved spurious free system dynamic range is comparable to that of the demonstrator device.

**Figure 63.** Example of normalized IRF captured with a 9*th* order M-Sequence based experimental single chip assembly and broadband measured TX to RX isolation.

As a result, it can be concluded that we have successfully realized a novel functional hardware platform, both multi-chip and single-chip based, for current (e.g. [56], [60], [61]) as well as future scientific investigations in the complex field of an ultra-wideband MIMO sensing and localizations.
