**5.5. Conclusion**

The design and measurements of the high-speed data capturing device for the M-sequence sensor are described in this chapter. The data capturing device utilizes the "stroboscopic feedback loop" for achieving high dynamic range together with high sampling rate.

**a) b)** 

A number of different techniques are used to achieve the desired performance of the separate components.

To achieve a high effective resolution bandwidth of the analog-to-digital converter, the new segmented reference network was proposed. The new network, implemented in the ADC [46] allows increasing the effective resolution bandwidth several times compared to the similar conventional one [47], while the power dissipation is only slightly increased.

The high-speed predictor was described in VHDL and implemented using a high-speed ECL library. Despite the disadvantage of the power dissipation, the ECL implementation allows speeds of up to 10 GS/s to be achieved. Furthermore, it is simple to modify the predictor to comply with different system parameters, such as the M-sequence length or averaging factor.

An off-chip calibration was implemented for the high-speed digital-to-analog converter. The calibration is implemented on an FPGA-board. After having been modified slightly, it could be integrated into the DAC. The static errors of the DAC after calibration are lower than 0.15 % which allows the use of a converter in the data capturing device with a target resolution of 9 bits.
