**5. High-speed data capturing**

### **5.1. Introduction of data capturing device using feedback principle**

A straightforward data capture and digitizing can be directly performed by a conventional analog-to-digital converter (ADC). There are a number of limitations which arise using this method. The first and most crucial one is an inverse relationship between accuracy and speed of the conversion. In terms of the ADC, it is the inverse relationship between resolution and bandwidth. It is impossible to realize a high-speed ADC with the resolution which fulfils the sensor specification in modern technologies.

To overcome this limitation, a more complicated method of data capture based on "stroboscopic feedback loop" can be used. This method utilizes a feedback loop to relax accuracy requirements of the ADC (see [2] and chapter 6.2.3). The digital output of the data capturing device is represented by two summands: the value of the first summand is measured by the ADC; the value of the second summand is calculated based on its previous state and on the first one. The ratio between predicted and measured summands, i.e. between the resolution of the ADC and DAC can be calculated from the conversion efficiency of the both converters [42].

The block diagram of the data capturing device with feedback is depicted in Fig. 38. It consists of 3 logical parts, highlighted in colors in Fig. 38: Signal Processing, ADC and DAC, and LNA with subtraction amplifier. Although the subtraction amplifier belongs to the data capturing block, it has been integrated into LNA and moved to the receiver part of the sensor.

The data capturing device works as following:

410 Ultra-Wideband Radio Technologies for Communications, Localization and Sensor Applications

simulation and also induced by the stronger resonance behavior.

**Figure 37.** Measured gain by sweeping the control voltage *Vc* from 0 to 1.25 V

which fulfils the sensor specification in modern technologies.

**5.1. Introduction of data capturing device using feedback principle** 

A straightforward data capture and digitizing can be directly performed by a conventional analog-to-digital converter (ADC). There are a number of limitations which arise using this method. The first and most crucial one is an inverse relationship between accuracy and speed of the conversion. In terms of the ADC, it is the inverse relationship between resolution and bandwidth. It is impossible to realize a high-speed ADC with the resolution

delay.

been measured up to 20 GHz.

**5. High-speed data capturing** 

*<sup>t</sup> f* of the transistor. The corresponding measured and simulated group delay is shown in Fig. 36b. The measured group delay variation is 35 ps, which is higher than that in the

 **Figure 36.** a) Simulated and measured mixed mode S-parameters. b) Simulated and measured group

As depicted in Fig. 37, the amplifier gain can be adjusted between 0 and 11.5 dB. The large signal behavior is measured on-wafer. An output 1 dB compression point of 12 dBm has


**Figure 38.** Block diagram of the data capturing device
