**8.1. Wireless communication systems design space exploration**

The process of designing complex digital electronic circuits offers a large variety of options to the designer. There are many valid possible implementations that fulfill the specification, but they differ in certain properties, e.g. silicon area, power efficiency, flexibility, testability and design effort. These properties span the so-called design space. A design space exploration establishes relations between possible points in the design space, ultimately leading to cost functions modeling the relation between the design properties and parameters. These models serve as a quantitative basis to make important design decisions in an early design phase.

Certain parameters are of special interest in the domain of wireless communication platforms. The limited power budget in mobile devices puts hard constraints on the power efficiency, requiring power optimization across all layers of algorithm development, design implementation and semiconductor technology.

enabling a divide-and-conquer implementation and verification approach. The framework provides transparent data transport between the substituted MATLAB modules and multiple parallel instances of their FPGA hardware counterparts. The same interfaces are available for hardware simulation via the Modelsim foreign language interface (FLI), effectively also

Interference Alignment for UWB-MIMO Communication Systems 147

The PC is connected to the emulation systems via Gigabit Ethernet. The generic FPGA infrastructure template comprises an OCP multilayer bus, the ethernet DMA interface, SDRAM controllers, on-chip memories and massively parallel parameterized softcore processors [20]. It has been adapted to and tested on a Xilinx Virtex-6 LX550T based BEE4 rapid prototyping system, the Xilinx Virtex-6 ML605 Evaluation Kit and the Virtex-5 LX220

providing a verification and debugging environment at minimal extra effort.

based MCPA board [2] developed at IMS, see Fig. 11.

**Figure 11.** FPGA-based emulation system developed at IMS

reduced number of RF front ends.

*8.3.1. Computational complexity*

solved by visiting all *I* antenna combinations.

be formulated as

**8.3. Case study: 3-user antenna selection interference alignment**

An implementation of the antenna selection interference alignment algorithm presented in Section 3 has been chosen as a case study using the development framework presented in Section 8.2. The proposed 3-user 2x2 MIMO zero-forcing IA antenna selection algorithm computes precoding matrices **V**, decoding matrices **U** and a metric *η* based on [4]. Compared to the experimental testbed for fixed antenna patterns presented in [13], our implementation also chooses a subset of channels (i.e. antennas or radiation patterns) from the available channels. This leads to an increased channel orthogonality for the chosen channels at a

The problem of finding the optimum antenna combination ˆ*i* from a set of *I* combinations can

*K* ∑ *k*=1

where *η*(**V**, **U**) is a function of the resulting SNR according to Section 3.1. **V***k*,*<sup>i</sup>* and **U***k*,*<sup>i</sup>* are the precoding and decoding matrices of user *k* for a given antenna combination *i*. Equation 29 is

The resource requirements of an optimized efficient integer implementation of the proposed novel antenna-selection IA algorithm is presented in this section, based on FPGA

implementation results. Target systems include SDR platforms, FPGAs and ASICs.

*η*(**V***k*,*i*, **U***k*,*i*) (29)

ˆ*i* = arg max *i*=1...*I*

Deriving comprehensive cost models using Monte-Carlo methods requires visiting a significantly larger number of points in the design space compared to existing heuristically driven parameter optimization approaches covered by existing FPGA-based simulation acceleration systems. The achievable simulation speedup is a key factor enabling the characterization and optimization of complex communication systems using Monte-Carlo approaches which are infeasible for pure software simulation due to the large required stimuli sets.
