**Acknowledgement**

This work was supported in part by Semiconductor Technology Academic Research Center (STARC). The chip in this study has been fabricated in the chip fabrication program of the VLSI Design and Education Center (VDEC), the University of Tokyo in collaboration with Rohm Corporation and Toppan Printing Corporation. The authors would like to express their deepest gratitude to Toshihiko Mori of FUJITSU, Osamu Kobayashi of STARC, Naoko Ono of TOSHIBA, Toshiakira Ando of STARC/PANASONIC, and Ryuichi Fujimoto of STARC /TOSHIBA for their fruitful discussion.
