**2.2. DC-DC converter**

Converting DC voltage to the proper levels from a single energy source that might be depleting, like in battery applications, requires employing energy storage elements (inductors) with associated power electronics devices. When switched ON-OFF at a certain rate, stored energy gets released to the load at the proper time to maintain the desired voltage level. Pulse-Width-Modulation (PWM) techniques are most popular in this application. Converters of this type are suited for boosting or bucking the source voltage; commonly known as switching power supplies. Since the current is DC and zero crossing is not one of the steady cyclic features like in AC circuits, self-commutation is not possible. Therefore, Gate-Turn-Off (GTO) devices are required (Skvarenina, 2002). These devices are turned off with a negative pulse on the gate terminal. MOSFETs and BJTs also provide a viable option in low power applications. Feedback loop methodologies are an integral part of DC-DC converters to regulate the load voltage, compensating for load variations and irregularities in the source voltage.

Current and voltage ripples, and high frequency harmonic distortion are common byproducts of switching techniques. Capacitors are usually employed to insure acceptable ripple content. Harmonics negatively affect the efficiency of the converter and produce losses in the form of heat. While the produced load current is regulated for a desired average value, the cyclic behavior produces current fluctuations in the energy storage elements. Operating at zero current for energy storage elements during part of the cycle results in a highly nonlinear characteristic, where the converter is known to be in its Discontinuous Conduction Mode (DCM). The Continuous Conduction Mode (CCM), however, insures nonzero current during the full cycle of switching (Rashid, 2004; Shaffer, 2007). Each mode of operation has certain implications on the ripples and harmonics content which affects the efficiency of the converter.

## *2.2.1. Buck converter*

136 MATLAB – A Fundamental Tool for Scientific Computing and Engineering Applications – Volume 1

Several practical notes relative to the circuit in Fig. 1 are due,

1. While it may seem that the Diac is an unnecessary device in this application since the voltage of the capacitor may trigger the gate of the Triac directly, it must be noticed that Triacs are notorious for not firing symmetrically. Lack of symmetry in triggering at the same voltage level for both polarities of a full cycle produces unnecessary additional harmonics that negatively affect the efficiency of the circuit. The symmetrical characteristic if the Diac provides accurate timing that enhances the firing symmetry of

2. One may use two SCRs back-to-back to implement the power control device in place of

3. The firing time through the RC circuit is perfectly synchronized with the conduction

Converting DC voltage to the proper levels from a single energy source that might be depleting, like in battery applications, requires employing energy storage elements (inductors) with associated power electronics devices. When switched ON-OFF at a certain rate, stored energy gets released to the load at the proper time to maintain the desired voltage level. Pulse-Width-Modulation (PWM) techniques are most popular in this application. Converters of this type are suited for boosting or bucking the source voltage; commonly known as switching power supplies. Since the current is DC and zero crossing is not one of the steady cyclic features like in AC circuits, self-commutation is not possible. Therefore, Gate-Turn-Off (GTO) devices are required (Skvarenina, 2002). These devices are turned off with a negative pulse on the gate terminal. MOSFETs and BJTs also provide a viable option in low power applications. Feedback loop methodologies are an integral part of DC-DC converters to regulate the load voltage, compensating for load variations and

Current and voltage ripples, and high frequency harmonic distortion are common byproducts of switching techniques. Capacitors are usually employed to insure acceptable ripple content. Harmonics negatively affect the efficiency of the converter and produce

cycle of the Triac because they are both powered by the same AC source.

**Figure 1.** Light Dimmer Circuit

the Triac.

the Triac.

**2.2. DC-DC converter** 

irregularities in the source voltage.

In low power applications, voltage bucking is usually achieved using voltage divider resistors. This simple solution is acceptable because the current is usually too small to cause significant losses in the resistors. Employing this approach in high power applications is unrealistic because the losses of the resistors may exceed the useful power consumed by the load; that is in addition to the associated heat dissipation issues that must be resolved to insure sufficient ventilation. The DC-DC converter provides a more practical solution in spite of its associated design complexities at times.

Bucking DC source voltages can be achieved using a topology like the one shown in Fig. 2. The energy storage element (L) is to be sized for the desired mode of operation (CCM or DCM). The power device (GTO in this case) switches On-OFF using PWM where the dutyratio (D=Ton/T) determines the average load voltage; T is the time of one period of the switching frequency (f). The diode facilitates inductor current wheeling during the OFF time of the GTO. The capacitor is usually sized to reduce the load current ripples. The inherent inductor current ripples (usually in the range of about 30%) are then facilitated by the capacitor while blocking it from flowing through the load. Snubber circuits are installed across the power devices for protection and to minimize the stress on the device that may result from opening the circuit while the current cannot be stopped instantaneously due to the nature of the energy storage element. Current and voltage waveforms will be shown in Section 4 for illustration.

**Figure 2.** DC-DC Buck Converter

Design of the DC-DC converter centers around determining the size of the energy storage element (L) which achieves predetermined Vsource, Vload, ∆Vload (load voltage ripple), and Iripple. Knowing that Iripple=∆IL, D=Vload/Vsource assuming CCM, T=1/f, and VL=Vsource-Vload during Ton (Rashid, 2004), Eq. (2) can be obtained.

Since,

$$\mathbf{V\_L} = L \frac{\mathbf{di\_L}}{\mathbf{dt}} \tag{1}$$

therefore,

$$\begin{aligned} \text{L} &= \text{V}\_{\text{L}} \frac{\Delta \text{T}}{\Delta i\_{\text{L}}}\\ &= (\text{V}\_{\text{source}} \cdot \text{V}\_{\text{load}}) . (\frac{\text{D}}{\text{f}}) . (\frac{1}{\text{I}\_{\text{ripple}}}) \\ &= (\text{V}\_{\text{load}} \cdot \frac{\text{V}\_{\text{load}}^2}{\text{V}\_{\text{source}}}) . (\frac{1}{\text{f} \, \text{I}\_{\text{ripple}}}) \end{aligned} \tag{2}$$

Notice that L is charging during Ton only, which means that ∆T=D/f. The calculated "L" is usually well above the minimum inductance needed to insure CCM in many applications. Only very light load conditions may force DCM.

The capacitor "C" is sized to reduce load current ripple while providing a pass for the inductor current ripples (Iripple). It is worth noting that the inherent Effective Series Resistance (ESR) of the capacitor plays a major role in determining the size of the capacitor.

Since,

$$i\_{\mathbb{C}} = \mathbb{C} \frac{d\mathbf{V}\_{\mathbb{C}}}{dt} \tag{3}$$

but,

$$
\Delta \mathbf{V\_{C}} = \Delta i\_{\mathbf{C}} (\mathbf{ESR} + \frac{\Delta \mathbf{T}}{\mathbf{C}}) \quad \text{and} \; \Delta \mathbf{V\_{C}} = \Delta \mathbf{V\_{load}} \tag{4}
$$

therefore,

$$\begin{aligned} \text{C} &= \frac{\Delta i\_{\text{C}} \cdot \Delta \text{T}}{\Delta \text{V}\_{\text{load}} \cdot \text{ESR} \,\Delta i\_{\text{C}}}\\ &= \frac{\text{I}\_{\text{ripple}} \cdot \text{D}}{\text{f} (\Delta \text{V}\_{\text{load}} \cdot \text{ESR} \,\text{I}\_{\text{ripple}})} \end{aligned} \tag{5}$$

Eq. (5) shows that the capacitor's ESR rating can have a significant effect on the size of the capacitor knowing that the tolerated ∆Vload is usually small in sophisticated applications. Therefore, the ESR rating shouldn't be overlooked when selecting the capacitor. The Effective Series Inductance (ESL) rating of the capacitor is also relevant but it is usually considered for very high switching frequencies only (>1 MHz). By then, inductive effect of board tracings can start to be critical as well.

#### *2.2.2. Boost converter*

138 MATLAB – A Fundamental Tool for Scientific Computing and Engineering Applications – Volume 1

L L

*i* 

<sup>T</sup> L=V

L di <sup>V</sup>

sourse load

load

Only very light load conditions may force DCM.

board tracings can start to be critical as well.

2 load

<sup>V</sup> <sup>1</sup> = (V - ).( ) V f.I

Notice that L is charging during Ton only, which means that ∆T=D/f. The calculated "L" is usually well above the minimum inductance needed to insure CCM in many applications.

The capacitor "C" is sized to reduce load current ripple while providing a pass for the inductor current ripples (Iripple). It is worth noting that the inherent Effective Series Resistance (ESR) of the capacitor plays a major role in determining the size of the capacitor.

source ripple

C

C C C load <sup>Δ</sup><sup>T</sup> <sup>Δ</sup>V = (ESR+ ) and ΔV =Δ<sup>V</sup> C

> I .D f(ΔV -ESR.I )

Eq. (5) shows that the capacitor's ESR rating can have a significant effect on the size of the capacitor knowing that the tolerated ∆Vload is usually small in sophisticated applications. Therefore, the ESR rating shouldn't be overlooked when selecting the capacitor. The Effective Series Inductance (ESL) rating of the capacitor is also relevant but it is usually considered for very high switching frequencies only (>1 MHz). By then, inductive effect of

*i*

C load C ripple load ripple

*i*

.Δ<sup>T</sup> C= ΔV -ESR.

C dV *<sup>i</sup>* =C

D 1 (V -V ).( ).( ) f I

L

ripple

(2)

dt *<sup>L</sup>* (1)

*dt* (3)

(5)

*i* (4)

Since,

therefore,

Since,

but,

therefore,

While bucking the source voltage for low power applications can be achieved with resistor voltage dividers (passive components), boosting the voltage requires active devices like Operations-Amplifiers (OpAmps). Power OpAmps are also available for low-voltage medium power (500 Watt) applications but they usually exhibit high power loss and they need active cooling (fans) in addition to passive cooling via heat sinks. OpAmps are also analog devices which are usually controlled with analog control voltages, while PWM controlled power devices can be easily interfaced with digital controllers. Real-time load voltage regulation is achieved most effectively with embedded digital controllers.

By rearranging the components of the buck converter as shown in Fig. 3, it becomes possible to boost the source voltage. The underlying principle of operation is in the fact that the polarity of the inductor (L) voltage reverses instantaneously when the rate of change in the inductor current (iL) reverses pattern; i.e. diL/dt changes sign. During the ON time (Ton) of the GTO, the inductor charges with its voltage taking the opposite polarity of the source. When the GTO turns OFF during Toff, the inductor current starts to drop and accordingly its polarity reverses direction to become in the same direction like the source. The load, then, becomes supported by Vsource plus VL which signifies the higher load voltage compared to the source voltage. The role of the capacitor is similar to that of the buck converter, that is to reduce the ripples of the load voltage as it supports the load voltage during Ton in this case. It must be noted that VL is equal to L(diL/dt) which means that the inductor voltage can rise significantly if the current is allowed to change at a high rate, resulting in load voltages much higher than that of the source. The inductor, however, must be sized properly and allowed to charge enough by increasing the duty-ratio (D) of the PWM scheme such that it stores enough energy to feed the load during Toff. The ratio Vload/Vsource is determined by 1/(1- D) which implies that Vload can rise well above Vsource as the duty ratios gets closer to 100% (Rashid, 2004). The physical limit of the employed components is usually the determining factor for how high Vload may be attained.

**Figure 3.** DC-DC Boost Converter

#### *2.2.3. Buck-boost converter*

Rearranging the components as shown in Fig. 4 provides the flexibility to buck or boost the source voltage by adjusting the duty-ratio (D) of the PWM. A 50% duty-ratio provides the load with the same source voltage while a lower duty-ratio bucks the voltage and a higher duty ratio boosts the voltage (Rashid, 2004). It was proven that Vload/Vsource is determined by

D/(1-D). The orientation of the diode is such that the load current is blocked while the inductor is charging during Ton. During Toff the inductor releases its energy to the load through the diode loop resulting in an opposite voltage polarity compared to that of the buck or boost configurations. The size of the storage element (L) is critical to facilitating the boost mode. To insure CCM, the inductor must be of a certain minimum size (Rashid, 2004). Current and voltage waveforms will be shown in Section 4 for illustration.

**Figure 4.** DC-DC Buck-Boost Converter
