**5.1. Electrical model**

The six-pulse AC-DC converter is illustrated in figure 15a. Inductances Li characterize the line inductances and Lo characterizes the output inductance. The AC-DC converter modelling is based on the variable topology approach. The diodes are modelled by an ideal model which traduces the state of the switch:


There are 13 operating phases:


All the diodes are state-off (figure 15b)


For an operating phase, we determinate the di/dt through each inductance (Li and Lo) and the voltage across each diode. In order to simplify results presentation, we consider that the line is balanced (same RMS voltages and line inductances Li) and have no resistive part.

Naturally, the method is equivalent under unbalanced conditions but the mathematical expressions of the different variables are more complex.

As an example, we will consider the following succession of phases: P0, P1, O1, P2, O2, P3…:

To shift from phase P0 (diodes state-off) to phase P1 (D1 D5 state-on), the voltage across diodes D1 and D5 have to be equal to zero.

a) Six-pulse AC-DC converter b) Discontinuous conduction phase

c) Conduction phase P1 : D1 et D5 state-on d) Overlap phase O1 : D1 D5 et D6 state-on

To shift from phase P1 (D1 D5 state-on) to overlap phase O1 (D1 D5 D6 state-on), the voltage across the diode D6 has to be equal to zero.

To shift from overlap phase O1 (D1 D5 D6 state-on) to phase P2 (D1 D6 state-on), the current through the diode D5 has to be equal to zero.

And so forth …

58 MATLAB – A Fundamental Tool for Scientific Computing and Engineering Applications – Volume 1

P1 : D1 and D5 state-on P2 : D1 and D6 state-on P3 : D2 and D6 state-on P4 : D2 and D4 state-on P5 : D3 and D4 state-on P6 : D3 and D5 state-on

*io*

R

vo R

Lo io

Lo

*vout*

*ir u'rs vo*

O1 : D1, D5 and D6 state-on O2 : D1, D2 and D6 state-on O3 : D2, D4 and D6 state-on O4 : D2, D3 and D4 state-on O5 : D3, D4 and D5 state-on O6 : D1, D3 and D5 state-on

For an operating phase, we determinate the di/dt through each inductance (Li and Lo) and the voltage across each diode. In order to simplify results presentation, we consider that the line is balanced (same RMS voltages and line inductances Li) and have no resistive part.

a) Six-pulse AC-DC converter b) Discontinuous conduction phase

r

ust utr s t

urs

r

Li

<sup>t</sup> u =0 st utr s t

i r =0

i s =0 i

vD1

Li <sup>0</sup> vD2 vD3

i r i s i t

vo <sup>R</sup> urs

vD4 0 0

Lo

vD2 vD3

vD4 vD5 vD6

R

io

Lo

vo

io= 0

Naturally, the method is equivalent under unbalanced conditions but the mathematical

c) Conduction phase P1 : D1 et D5 state-on d) Overlap phase O1 : D1 D5 et D6 state-on

As an example, we will consider the following succession of phases: P0, P1, O1, P2, O2, P3…:

To shift from phase P0 (diodes state-off) to phase P1 (D1 D5 state-on), the voltage across



D2 D3

D1

Li

D4

Li <sup>0</sup>

i r i s i t =0

*vr*

*vs*

*vt*

urs r

ust utr s t

Input

D5 D6

voltage Rectifier Load

**Figure 15.** Six-pulse diode rectifier.

diodes D1 and D5 have to be equal to zero.

expressions of the different variables are more complex.

0

vD4 vD6

vD2 vD3

#### *5.1.1. Discontinuous conduction mode*

This mode corresponds to the case where io = 0 (figure 15b). In this case, all diodes are opened. Equation (24) describes this mode.

$$\frac{\text{di}\_{\text{r}}}{\text{dt}} = \frac{\text{di}\_{s}}{\text{dt}} = \frac{\text{di}\_{\text{t}}}{\text{dt}} = 0 \tag{24}$$

#### *5.1.2. Continuous conduction mode*

Let's take example of the continuous conduction mode P1. From the figure 15c, we can write equations (25), (26) and (27) :

$$\frac{\text{di}\_r}{\text{dt}} = \cdot \frac{\text{di}\_s}{\text{dt}} = \frac{\text{di}\_o}{\text{dt}} = \frac{\text{u}\_{\text{rs}} \cdot \text{v}\_o}{2 \text{ L}\_i + \text{L}\_o} \tag{25}$$

$$\frac{d\dot{i}\_t}{dt} = 0\tag{26}$$

$$\mathbf{u}\_{\rm D6} = \mathbf{u}\_{\rm st} \frac{\mathbf{L}\_{\rm i}}{2 \,\mathrm{L}\_{\rm i} + \mathrm{L}\_{\rm o}} \left(\mathbf{u}\_{\rm rs} \,\mathrm{-}\_{\rm v\_{\rm o}}\right) \tag{27}$$

We obtain the di/dt corresponding to the other continuous conduction modes by making circular permutations of indexes. For example, for conduction mode P2: D1 and D6 are stateon. The indexes s and t are permuted as presented below:

$$\frac{d\dot{\mathbf{u}}\_r}{dt} = -\frac{d\dot{\mathbf{i}}\_t}{dt} = \frac{d\dot{\mathbf{i}}\_o}{dt} = \frac{\mathbf{u}\_{\text{rt}} \cdot \mathbf{v}\_o}{2\,\text{L}\_\text{i} + \text{L}\_o} \tag{28}$$

$$\frac{di\_s}{dt} = 0\tag{29}$$

#### *5.1.3. Overlap phases*

Let's take example of the overlap phase O1. From the figure 15c, we can write equations (30) and (31) :

$$\frac{\text{di}\_{\text{r}}}{\text{dt}} = \frac{\text{di}\_{\text{o}}}{\text{dt}} \tag{30}$$

$$\mathbf{i}\_s \, \mathbf{i}\_\mathbf{t} \, \mathbf{i}\_\mathbf{t} = \mathbf{-i}\_0 \iff \mathbf{-}\frac{d\mathbf{i}\_s}{\mathbf{d}\mathbf{t}} \cdot \frac{\mathbf{d}\mathbf{i}\_\mathbf{t}}{\mathbf{d}\mathbf{t}} = \frac{\mathbf{d}\mathbf{i}\_\mathbf{o}}{\mathbf{d}\mathbf{t}}\tag{31}$$

The expression of the di/dt as a function of the device parameters is more complicated to obtain here than in the case of a classical operating phase. Equations have been detailed in (Batard et al., 2007) and the final result is recalled below:

$$\frac{d\mathbf{i\_{r}}}{dt} = \frac{d\mathbf{i\_{o}}}{dt} = \frac{1}{3\,\mathrm{L}\_{\mathrm{i}} + 2\,\mathrm{L}\_{\mathrm{o}}} \left[ \,\mathrm{u\_{rs}} + \,\mathrm{u\_{rt}} \cdot 2\,\mathrm{v\_{o}} \right] \tag{32}$$

$$\frac{d\mathbf{d}\_{\rm s}}{dt} = \frac{1}{3\,\mathrm{L}\_{\rm i} + 2\,\mathrm{L}\_{\rm o}} \left( -\frac{2\,\mathrm{L}\_{\rm i} + \mathrm{L}\_{\rm o}}{\mathrm{L}\_{\rm i}} \,\mathrm{u}\_{\rm rs} + \frac{\mathrm{L}\_{\rm i} + \mathrm{L}\_{\rm o}}{\mathrm{L}\_{\rm i}} \,\mathrm{u}\_{\rm rt} + \mathrm{v}\_{\rm o} \right) \tag{33}$$

$$\frac{d\mathbf{i}\_{\rm t}}{dt} = \frac{1}{3\,\mathrm{L}\_{\rm i} + 2\,\mathrm{L}\_{\rm o}} \left( \frac{\mathrm{L}\_{\rm i} + \mathrm{L}\_{\rm o}}{\mathrm{L}\_{\rm i}} \mathbf{u}\_{\rm rs} \cdot \frac{2\,\mathrm{L}\_{\rm i} + \mathrm{L}\_{\rm o}}{\mathrm{L}\_{\rm i}} \mathbf{u}\_{\rm rt} + \mathbf{v}\_{\rm o} \right) \tag{34}$$

We obtain the di/dt corresponding to the other overlap modes by making circular permutations of indexes. For example, for overlap mode O2: D1, D2 and D6 are state-on. The indexes r and t are permuted and the sign of vs and dio/dt are changed:

$$\frac{\dot{\mathbf{d}}\_{\mathbf{r}}}{\mathbf{d}t} = \frac{1}{3\,\mathrm{L}\_{\mathrm{i}} + 2\,\mathrm{L}\_{\mathrm{o}}} \left( \frac{\mathbf{L}\_{\mathrm{i}} + \mathbf{L}\_{\mathrm{o}}}{\mathbf{L}\_{\mathrm{i}}} \,\mathrm{u}\_{\mathrm{ts}} \,\mathrm{s} \cdot \frac{2\,\mathrm{L}\_{\mathrm{i}} + \mathrm{L}\_{\mathrm{o}}}{\mathbf{L}\_{\mathrm{i}}} \,\mathrm{u}\_{\mathrm{tr}} \cdot \mathbf{v}\_{\mathrm{o}} \right) \tag{35}$$

$$\frac{d\mathbf{i\_s}}{dt} = \frac{1}{3\,\mathrm{L}\_\mathrm{i} + 2\,\mathrm{L}\_\mathrm{o}} \left( -\frac{2\,\mathrm{L}\_\mathrm{i} + \mathrm{L}\_\mathrm{o}}{\mathrm{L}\_\mathrm{i}} \,\mathrm{u}\_\mathrm{ts} + \frac{\mathrm{L}\_\mathrm{i} + \mathrm{L}\_\mathrm{o}}{\mathrm{L}\_\mathrm{i}} \,\mathrm{u}\_\mathrm{tr} - \,\mathrm{v}\_\mathrm{o} \right) \tag{36}$$

$$\frac{\text{di}\_{\text{t}}}{\text{dt}} = \cdot \frac{\text{di}\_{\text{o}}}{\text{dt}} = \frac{1}{3 \text{ L}\_{\text{i}} + 2 \text{ L}\_{\text{o}}} \left[ \left. \mathbf{u}\_{\text{ts}} + \mathbf{u}\_{\text{tr}} + 2 \, \mathbf{v}\_{\text{o}} \right| \tag{37}$$

#### **5.2. Simulink model**

The simulink model of the six-pulse diode rectifier is illustrated in figure 16a. The resistive load is modelled as a gain. The internal structure of the diodes rectifier block is presented in figure 16b. Four different blocks can be seen on this scheme.

The first one called MF1 is a Matlab function which computes each diode voltage. The inputs of this block are the initial phase and the three-phase network voltages.

The second one called MF2 is also a Matlab function which computes the new operating phase and each inductance di/dt. Its computing algorithm is shown in figure 16d. The new operating phase depends on the initial phase, the diode voltages and currents.

The third, called "Initial Phase" extract the operating phase of the MF2 block, this operating phase becomes the initial phase of the next calculation step (the Simulink block "memory" is used).

The Current block computes each diode current which permits to obtain the DC current and the line currents.

60 MATLAB – A Fundamental Tool for Scientific Computing and Engineering Applications – Volume 1

*<sup>i</sup>* t o di di - - dt dt dt

The expression of the di/dt as a function of the device parameters is more complicated to obtain here than in the case of a classical operating phase. Equations have been detailed in

> i o di di 1 u u - 2 v dt dt 3 L 2 L


 

u - u v

We obtain the di/dt corresponding to the other overlap modes by making circular permutations of indexes. For example, for overlap mode O2: D1, D2 and D6 are state-on. The

> io i i di <sup>1</sup> L L 2 L L r u - u - v

> > io i i

i o di di 1 - u u 2 v dt dt 3 L 2 L

The simulink model of the six-pulse diode rectifier is illustrated in figure 16a. The resistive load is modelled as a gain. The internal structure of the diodes rectifier block is presented in

The first one called MF1 is a Matlab function which computes each diode voltage. The

The second one called MF2 is also a Matlab function which computes the new operating phase and each inductance di/dt. Its computing algorithm is shown in figure 16d. The new

The third, called "Initial Phase" extract the operating phase of the MF2 block, this operating phase becomes the initial phase of the next calculation step (the Simulink block "memory" is

dt 3 L 2 L L ts L

s io i o

di 1 2 L L L L

dt 3 L 2 L L L

inputs of this block are the initial phase and the three-phase network voltages.

operating phase depends on the initial phase, the diode voltages and currents.

t o

figure 16b. Four different blocks can be seen on this scheme.

**5.2. Simulink model** 

used).

i o io


 

 

 

io i i

s io i o

t io io

di 1 L L 2 L L

io i i

di 1 2 L L L L

dt 3 L 2 L L L

indexes r and t are permuted and the sign of vs and dio/dt are changed:

*<sup>s</sup> di (*31*)*

(32)

(33)

(35)

(36)

(37)

rs rt o

rs rt o

ts tr o

ts tr o

tr o

rs rt o

dt 3 L 2 L L <sup>L</sup> (34)

t 0 i - i *<sup>s</sup>*

(Batard et al., 2007) and the final result is recalled below:

r o

The internal structure of the Current block is shown in figure 16c. The originality of our approach is the calculation of the values of each diode current with the values of di/dt of inductances Li and Lo. We use then six integrator blocks (one for each diode). The integrator blocks are set to limit their minimal output value to zero (lower saturation limit), this feature permits to avoid the problem of accurate determination of the instant when diodes currents reach to zero.

It is then possible to determinate the output current of the rectifier (io = iD1 + iD2 + iD3) and the input line currents (ir = iD1 – iD4, is = iD2 – iD5, it = iD3 – iD6).
