**3.2. CT ΔƩ modulators**

408 MATLAB – A Fundamental Tool for Scientific Computing and Engineering Applications – Volume 1

**Figure 13.** Modulation of in-band desired signal and shaped quantization noise by phase-noise in the

In DT ΔƩ modulators, the sampling takes place at the modulator input. The SC integrator in Figure 14 is commonly used as an input stage for DT loop filters in ΔƩ modulators. The sampling aperture jitter errors due to the sampling switch (*S1*) will be added to the signal at the input and hence will directly appear at the modulator output without any suppression. As mentioned earlier, the feedback signal (*VDAC*) doesn't experience aperture jitter because the feedback signal is DT and also it has discrete amplitude levels. Thus, timing errors cannot result in a sampled value that is different from the original feedback one. Timing errors at switch *S2* cause charge transfer jitter errors being added at the input stage. However, the charge transfer jitter errors at *S2* are very small owing to the high robustness

**Figure 14.** Non-inverting switched-capacitor discrete-time integrator.

DAC sampling clock.

**3.1. DT ΔƩ modulators** 

In CT ΔƩ modulators, sampling occurs after the loop filter and hence sampling errors including aperture jitter are highly suppressed when they appear at the output because this is the point of maximum attenuation in the loop. However, CT ΔƩ implementations suffer from jitter errors added to the feedback signal. Particularly, in a CT ΔƩ modulator the DAC converts the quantizer output DT signal into CT pulses. The waveform coming from the CT DAC is fed to the loop filter to be integrated in the CT integrator stages. Thus, PWJ in the DAC waveform causes uncertainty in the integrated values at the outputs of the loop filter integrators. Rectangular waveform DACs are commonly used in CT ΔƩ structures due to their simple implementation and the relatively relaxed slew-rate (SR) requirement they offer for the loop filter amplifiers. Return-to-zero (RZ) DACs are the most sensitive to feedback PWJ because the random variations are affecting the rising and falling edges of the waveform at every clock-cycle. The jitter sensitivity can be slightly reduced by using a NRZ DAC because in this case, the clock-jitter will be effective only during the clock edges at which data is changing. The equivalent input-referred errors induced by clock jitter in RZ and NRZ waveforms for a certain sequence of data are illustrated in Figure 15.

As mentioned earlier, clock-jitter errors added in the feedback path are the most critical because they entail random phase-modulation that folds back high-pass shaped noise components over the desired channel. For typical wideband CT ΔƩ modulators with NRZ current steering DACs in the feedback, the error induced by the PWJ in the DAC waveform can be up to 30% - 40% of the noise budget [3, 4, 6].

**Convenience for low power implementations:** CT ΔƩ modulators have gained significant attention in low power and high speed applications because they can operate at higher speed or lower power consumption compared to DT counterparts. Recall the relaxed gain bandwidth (GBW) product requirements they add on the loop filter amplifiers compared to DT implementations in which the loop filter is processing a DT signal and hence a GBW requirement on the amplifier is typically in the range of five times the sampling frequency. Moreover, sensitivity of CT ΔƩ modulators to DAC clock-jitter can be minimized by processing the DAC pulse or modifying its shape so as to alleviate the error caused by the DAC clock jitter [7]. That is, the achievable SNR of a CT ΔƩ modulator can be improved against clock-jitter without having to improve the jitter performance of the clock generator or to reduce the sampling speed and increase the order of the loop filter or the quantizer resolution. This definitely translates into power savings because it avoids increasing the complexity of the clock generator or the ΔƩ modulator and hence avoiding extra power penalties3.

**Figure 15.** Equivalent input referred error induced by pulse-width jitter [7]. (a) RZ DAC. (b) NRZ DAC.

**<sup>3</sup>** This is provided that the solution adopted to improve the DAC tolerance to clock jitter errors is not adding high power overhead and thus not increasing the total power consumption.

$$\epsilon\_f(n) = \frac{\Delta \mathfrak{l}(n)}{\tau\_s} = \mathfrak{y}(n) \frac{\tau\_s}{\tau\_c} \frac{\left(\Delta t\_r(n) + \Delta t\_f(n)\right)}{\tau\_s} \tag{15}$$

$$\left|IBIN\right|\_{RZ} = \frac{2}{OSR} \left(\frac{\sigma\_f}{\tau\_C}\right)^2 \left|\frac{\mathcal{V}\_{slg}}{2} + \frac{\Delta^2}{12} \cdot \frac{1}{2\pi} \int\_{-\pi}^{\pi} \left|NTF\left(e^{j\omega}\right)\right|^2 d\omega\right].\tag{16}$$

$$\|IBIN\|\_{\text{RZ,due to input signal}} = \frac{\nu\_{slg}}{\sigma\_{OSR}} \left(\frac{\sigma\_l}{\tau\_C}\right)^2. \tag{17}$$

$$IBIN|\_{\text{RZ,due to shaped noise}} = \frac{1}{\sigma\_{\text{OSR}}} \left(\frac{\sigma\_{\text{j}}}{\sigma\_{\text{C}}}\right)^2 \frac{\Delta^2}{12\pi} \int\_{-\pi}^{\pi} \left| NTF(e^{j\omega}) \right|^2 d\omega. \tag{18}$$

$$
\epsilon\_f(n) = \frac{\Delta \ell(n)}{\tau\_s} = \left( \mathbf{y}(n) - \mathbf{y}(n-1) \right) \frac{\Delta t(n)}{\tau\_s}, \tag{19}
$$

$$IBIIN|\_{NRZ} = 4 \cdot OSR \cdot BW^2 \cdot \sigma\_f^2 \cdot \left[\frac{\pi^2}{2} \left(\frac{V\_{slg}}{OSR\_{slg}}^2\right) + \frac{\Delta^2 \cdot \sigma\_{NTF,RMS}}{12}\right]$$

$$\leq 2\pi^2 \frac{V\_{slg}^2 \cdot BW^2 \cdot \sigma\_f^2}{OSR} + \frac{OSR \cdot BW^2 \cdot \Delta^2 \cdot \sigma\_{NTF,RMS} \cdot \sigma\_f^2}{3}.\tag{20}$$

$$|IBIN|\_{\text{NRZ,due to signal}} \le 2\pi^2 \frac{V\_{slg}^{\prime\_{slg}^2 \cdot BW^2 \cdot \sigma\_f^2}}{\alpha \kappa}.\tag{21}$$

$$\left.IBIN\right|\_{\text{NRZ}, \text{due to shaped noise}} = \frac{\rho\_{\text{SR} \cdot BW}^2 \cdot \Delta^2 \cdot \sigma\_{\text{MTF,RMS}} \cdot \sigma\_f^2}{3}. \tag{22}$$

$$k\_{DAC} \cdot \chi\{n\} \cdot T\_S = \int\_{aT\_\xi}^{\beta T\_\xi} I\_P \ e^{\frac{-(\beta - a)T\_\xi}{\mathbf{r}}} dt = \pi \, I\_P \left(1 - e^{\frac{-(\beta - a)T\_\xi}{\mathbf{r}}}\right). \tag{23}$$

$$I\_P = \frac{k\_{DAC} \cdot \mathcal{y}(n) \cdot \tau\_S}{\tau \left(1 - e^{\frac{-(\beta - \alpha)T\_S}{\tau}}\right)}.\tag{24}$$

$$
\epsilon\_f(n) = \frac{1}{T\_S} \frac{k\_{DAC} \cdot \chi(n) \cdot T\_S}{\tau \left(1 - e^{\frac{-(\beta - a)T\_s}{\tau}}\right)} \int\_{\beta T\_s}^{\beta T\_s + \Delta t(n)} e^{\frac{-(t-a)T\_s}{\tau}} dt
$$

$$
= \frac{k\_{DAC} \cdot \chi(n)}{\left(1 - e^{\frac{-(\beta - a)T\_s}{\tau}}\right)} e^{\frac{-(\beta - a)T\_s}{\tau}} \left[1 - e^{-\frac{\Delta t(n)}{\tau}}\right].\tag{25}
$$

$$\epsilon\_f(\mathbf{n}) \approx \frac{k\_{\rm DAC} \cdot \mathbf{y}(\mathbf{n})}{\pi \left(1 - e^{\frac{-(\beta - a)T\_\xi}{\pi}}\right)} e^{\frac{-(\beta - a)T\_\xi}{\pi}} \Delta t(\mathbf{n}). \tag{26}$$

$$|IBIN|\_{SCR} = \frac{1}{OSR} \cdot \left[\frac{e^{\frac{-(\beta-a)T\_s}{\pi}}}{\pi\left(1-e^{\frac{-(\beta-a)T\_s}{\pi}}\right)}\right]^2 \cdot \sigma\_f^2 \cdot \left[\frac{V\_{slg}}{2} + \frac{\Delta^2}{12} \cdot \frac{1}{2\pi} \int\_{-\pi}^{\pi} \left|NTF\{e^{j\omega}\} \right|^2 d\omega\right]. \tag{27}$$

$$\|\text{IB/IN}\|\_{\text{SCR,due to input signal}} = \frac{1}{OSR} \cdot \left[\frac{e^{\frac{-(\beta-a)T\_S}{\mathfrak{r}}}}{\text{r}\left(1-e^{\frac{-(\beta-a)T\_S}{\mathfrak{r}}}\right)}\right]^2 \cdot \sigma\_f^2 \cdot \frac{V\_{slg}}{2}.\tag{28}$$

$$IBIIN|\_{\text{SCR,due to shaped node}} = \frac{1}{OS} \cdot \left[ \frac{e^{\frac{-(\beta - a)T\_1}{\pi}}}{\pi \left(1 - e^{\frac{-(\beta - a)T\_2}{\pi}}\right)} \right]^2 \cdot \sigma\_f^2 \cdot \frac{\hbar^2}{12} \cdot \frac{1}{2\pi} \int\_{-\pi}^{\pi} \left| NTF(e^{j\omega}) \right|^2 d\omega. \tag{29}$$
