**3. The framework of networking applications for telecommunications development using LWIP and VDK**

This section presents a framework for networking applications for telecommunications. Such applications involve complex computation (for example, digital signal processing).

In the proposed framework, the programmer must be aware of all capabilities of Blackfin family (arithmetic instructions, addressing mode, hardware loops, interrupts and memory management) presented in section 3.

The LWIP stack can be run also as a task in a multitasking system or as the main program in a single tasking system. In both cases, the main control loop, illustrated in Figure 7, performs two operations repeatedly: check whether a packet has arrived from the network and check whether a periodic timeout has occurred. This pattern will be used in the framework for application development and performance evaluation.

An application that requirements to use the LWIP stack with VDK is responsible for creating a VDK thread type that the LWIP stack will use to create any threads that it requires during operation. The application also has to initialize several system service library components besides to creating an instance of the driver for the appropriate Ethernet controller.

The steps involved in creating an application that uses the LWIP stack can be summarized as (Analog Devices 2, 2010):


Networking Applications for Embedded Systems 13

If it is necessarily, two independent applications may be carried out using a dual core microcontroller such as Blackfin BF561. The application in the fist core implements the tasks of first group and the application in the second core may implements some simple tasks in the first group and the networking tasks (these tasks are less complex). This strategy was validated by implementing a voice-over IP system based on an adaptive multirate (AMR) codec (Redwan Salami et al., 2002). In the first group (tasks A) consider an AMR encoder and in the second group (task B) consider an AMR decoder, the setting of the codec rate and the packet processing that consists of receiving and transmitting packets over network using

The AMR codec has high computational demands. Many specific signal processing operations must be completed in real time. The Blackfin powerful instruction set (as can observe in Figure 3), memory management, events control and the peripherals included in its architecture make realizable a real-time implementation of the both AMR codec and

A technique called *switching buffers* was involved, to ensure a real-time functioning of the communication system (Woon-Seng Gan. and Sen M. Kuo, 2007). In this technique, there are pairs of input and output buffers that will be switched periodically. One pair of buffers is used for processing and the other pair is used for receiving the inputs and sending previous

The input frames have N sample length each and the coder/decoder results buffer have length of M results each. Two flags, *flag\_A* and *flag\_B*, are defined to control the program flow in the core A and core B. A variable *counter* is defined to manage the sample frames acquisition. An interrupt is generated by the audio analog to digital converter (ADC) every input speech sample. The interrupt routine service acquires the new sample, store it in the current signal input buffer and transmit to the digital to analog converter (DAC) the signal sample from current output buffer. After N signal samples have been acquired, the signal and data buffers will be switched. A necessary condition for real-time operating is that the acquisition time for input current frame must be greater than the processing time of this frame. The buffers, flags and counter, above defined, are shared resources of the two cores in the Blackfin microcomputers. Figures 8 to 12 illustrated the switching buffer technique, flowcharts of core A, core B and interrupt service routine, respectively. The variables *i* and *j* are the acquisition buffer and the processing buffer indexes. The networking processing is

The application code, written in C, may be optimized for speed (Analog Devices 1, 2010).

For the particular case of AMR-VoIP system, the following buffers are defined:

UDP protocol (Johan Sjöberg et al., 2002).

results.

illustrated in Figure 13.

networking processing in a VoIP embedded system.


Several techniques for C optimizations were used:




Fig. 7. The main control loop for LWIP stack

The framework for networking applications for telecommunications is based on the following assumptions (Sorin Zoican, 2011):


These tasks will be scheduled using the VDK primitives (illustrated in section 3). All the scheduling methods are involved: cooperative scheduling for collaborative tasks, round robin scheduling for equal priority tasks, and preemptive scheduling for higher priority tasks. Several system tasks will be created to interact with network card using system service library, as it is stated in section 3.

12 Real-Time Systems, Architecture, Scheduling, and Application

6. Configure external bus interface unit (EBIU) controller to provide DMA priority over

8. Give memory to the device driver to enable it to bear the appropriate number of

The framework for networking applications for telecommunications is based on the



These tasks will be scheduled using the VDK primitives (illustrated in section 3). All the scheduling methods are involved: cooperative scheduling for collaborative tasks, round robin scheduling for equal priority tasks, and preemptive scheduling for higher priority tasks. Several system tasks will be created to interact with network card using system


data, constituted by binary results which will be transferred over network

9. Inform the device driver library that the Ethernet driver will use the dataflow method 10. Initialize and build up the LWIP stack supplying memory for the stack to use as its

7. Provide the MAC address that will be used by the device driver

11. Tell the Ethernet driver that it should now start to run

12. Wait for the physical link to be established

Fig. 7. The main control loop for LWIP stack

following assumptions (Sorin Zoican, 2011):


service library, as it is stated in section 3.

network (receive and transmit packets)

processor

internal heap

concurrent reads and writes

If it is necessarily, two independent applications may be carried out using a dual core microcontroller such as Blackfin BF561. The application in the fist core implements the tasks of first group and the application in the second core may implements some simple tasks in the first group and the networking tasks (these tasks are less complex). This strategy was validated by implementing a voice-over IP system based on an adaptive multirate (AMR) codec (Redwan Salami et al., 2002). In the first group (tasks A) consider an AMR encoder and in the second group (task B) consider an AMR decoder, the setting of the codec rate and the packet processing that consists of receiving and transmitting packets over network using UDP protocol (Johan Sjöberg et al., 2002).

The AMR codec has high computational demands. Many specific signal processing operations must be completed in real time. The Blackfin powerful instruction set (as can observe in Figure 3), memory management, events control and the peripherals included in its architecture make realizable a real-time implementation of the both AMR codec and networking processing in a VoIP embedded system.

A technique called *switching buffers* was involved, to ensure a real-time functioning of the communication system (Woon-Seng Gan. and Sen M. Kuo, 2007). In this technique, there are pairs of input and output buffers that will be switched periodically. One pair of buffers is used for processing and the other pair is used for receiving the inputs and sending previous results.

For the particular case of AMR-VoIP system, the following buffers are defined:


The input frames have N sample length each and the coder/decoder results buffer have length of M results each. Two flags, *flag\_A* and *flag\_B*, are defined to control the program flow in the core A and core B. A variable *counter* is defined to manage the sample frames acquisition. An interrupt is generated by the audio analog to digital converter (ADC) every input speech sample. The interrupt routine service acquires the new sample, store it in the current signal input buffer and transmit to the digital to analog converter (DAC) the signal sample from current output buffer. After N signal samples have been acquired, the signal and data buffers will be switched. A necessary condition for real-time operating is that the acquisition time for input current frame must be greater than the processing time of this frame. The buffers, flags and counter, above defined, are shared resources of the two cores in the Blackfin microcomputers. Figures 8 to 12 illustrated the switching buffer technique, flowcharts of core A, core B and interrupt service routine, respectively. The variables *i* and *j* are the acquisition buffer and the processing buffer indexes. The networking processing is illustrated in Figure 13.

The application code, written in C, may be optimized for speed (Analog Devices 1, 2010). Several techniques for C optimizations were used:


Networking Applications for Embedded Systems 15

Fig. 10. Switching buffers technique in core B

Fig. 11. Program flowchart in core B


The most computational expensive block in the voice-over IP, based on AMR codec, is the AMR encoder, carried out in core A. The rest of computations, (AMR decoder, setting AMR rate at each frame and the networking processing) are less computational expensive.

Fig. 8. Switching buffers technique in core A

Fig. 9. Program flowchart in core A

14 Real-Time Systems, Architecture, Scheduling, and Application


The most computational expensive block in the voice-over IP, based on AMR codec, is the AMR encoder, carried out in core A. The rest of computations, (AMR decoder, setting AMR

link at compilation time and to use that information while optimizing

Fig. 8. Switching buffers technique in core A

Fig. 9. Program flowchart in core A

rate at each frame and the networking processing) are less computational expensive.

Fig. 10. Switching buffers technique in core B

Fig. 11. Program flowchart in core B

Networking Applications for Embedded Systems 17

MR475 4.75 Kbit/s 13593292 18.12 1783754 2.38 MR515 5.15 Kbit/s 10673898 14.23 1756316 2.34 MR59 5.90 Kbit/s 12141920 16.19 1743907 2.33 MR67 6.70 Kbit/s 14376904 19.17 1745566 2.33 MR74 7.40 Kbit/s 13584752 18.11 1752102 2.34 MR795 7.95 Kbit/s 14025496 18.70 1830429 2.44 MR102 10.20 Kbit/s 14200042 18.93 1813014 2.42 MR122 12.20 Kbit/s 14685916 19.58 1887733 2.52

The proposed strategy may be used as a framework for various applications, especially for applications in sensor networks, that requires fast computation, lower power consumption

This section presents the framework in which performance evaluation was performed. Two test programs were developed: a client program and a server program. The client connect to the server and send continually data requests, while the server listen for connections, accept it and send a replay message to the clients. More than ten client instances were started to

**AMR Codec--Execution time (Dual core Blackfin Processors)**  CORE A CORE B Cycles Milliseconds Cycles Milliseconds

MODE

Table 1. Execution time for AMR codec

**4. LWIP performance evaluation** 

Fig. 14. Client flowchart

and network (fixed or mobile) connectivity.

evaluate the performance of the LWIP connection with high load.

The client and server flowcharts are illustrated in Figures 14 and 15, respectively.

Fig. 12. ISR flowchart

Fig. 13. Network processing flowchart

The optimized execution time can be seen in Table 1. In this table one can observe that the processing time is less than frame acquisition time of 20 milliseconds and therefore the VoIP system works in real-time.

16 Real-Time Systems, Architecture, Scheduling, and Application

The optimized execution time can be seen in Table 1. In this table one can observe that the processing time is less than frame acquisition time of 20 milliseconds and therefore the VoIP

Fig. 12. ISR flowchart

Fig. 13. Network processing flowchart

system works in real-time.


Table 1. Execution time for AMR codec

The proposed strategy may be used as a framework for various applications, especially for applications in sensor networks, that requires fast computation, lower power consumption and network (fixed or mobile) connectivity.
