**3. Carbon nanotube interconnects**

46 VLSI Design

synthesis. The use of divalent functionalizations which produce impurity states far away from the Fermi level, can even lead to generate high performance semiconducting inks of low cost which can be applied in printable VLSI electronics. In addition, divalent functionalization offers a different strategy to control the electrical properties slightly taking into account tube type, size, and chirality. Adequate addends used in the functionalization allow us to transform metallic nanotubes into semiconducting nanotubes (Javey, 2008).

In 2004, graphene arose as a product of exfoliation of graphite, with the form of a twodimensional sheet of sp2-hybridized carbon (Novoselov et al., 2004). In the same manner that carbon nanotubes, it has unique electrical, mechanical and thermal properties. Such properties have been exploited in the development of energy-storage materials, transparent conducting electrodes (Alkire et al., 2009; Hu et al., 2007), field-effect transistors, digital and analog integrated circuits, integrated circuit interconnects, solar cells, ultracapacitors, and electrochemical sensors such as single molecule gas detectors and biosensors. High electron mobility at room temperature, low electrical resistivity, and symmetry of carrier mobilities between electrons and holes, are the electrical properties attractive to apply graphene in the design of electronic devices of high-performance. A similar classification to the carbon nanotubes with respect to the electrical behavior of the graphene is illustrated in Figure 6.

Fig. 6. Classification of graphene by electrical properties: (a) metallic graphene, (b)

Graphene nanoribbons (GNRs) can be defined as rectangles made from graphene sheets with widths going from a few nanometers to tens of nanometers and lengths from nanometers to micrometers. They are considered as quasi-1D nanomaterials and can have metallic (zigzag) or semiconducting (armchair (AGNR) or zigzag (ZGNR)) behavior depending of its chirality and orientation. Both types are denoted in accordance with the number of chains either, armchair or zigzag, found in its width. High electrical and thermal conductivity, low noise and bidimensional structure are properties which can be useful to produce integrated circuit interconnects with GNRs. The size of GNRs allows us to control the band gap of the material to be electrically manipulated in an electronic device generating

GNRs possess a richer energy band structure than the graphene, since an external electric field can be used to tune a specific bandgap (Chen, X. et al., 2011). Semiconducting AGNRs have electrical behavior as semiconductor material of indistinct manner with respect to the carbon chain position, and metallic AGNRs present both metallic as semiconducting behavior which is related with the change of chain associated with the "3*j* rule" in carbon

semiconducting graphene, and (c) moderate semiconducting graphene.

a wide versatility of design (Ferry et al., 2009; Guildi & Martín, 2010).

chain position (Law et al., 2004; Philip-Wong, 2011).

The interconnects distribute a large quantity of signals used for the diverse elements of a VLSI design such as clock signals, power, or ground in an integrated circuit (IC), and also to various circuits on a chip. Local, intermediate and global interconnects are the levels of operation of such interconnections. The use of Cu as material for interconnects represents a current paradigm for high-performance integrated circuits due to that line dimensions, and grain size become comparable to the bulk mean free path (MFP) of electrons ( 40 nm). In addition, higher RC delays reduce the operation speed of ICs. When a new proposal in VLSI design is done, the main characteristic must be the compatibility with current IC manufacturing. The two most promising potential candidates that can be used as material for interconnects are optical and carbon-nanotube (CNT) based interconnects (Cho et al., 2008; Koo et al., 2007; Kreupl et al., 2002).

This section provides a summary of the novel challenges that are being realized in nanometer-scale on-chip interconnects. Special topics associated with the operational effects such as performance and reliability are analyzed, with the aim of identifying the electrical characteristics that can be obtained in resistivity, interconnect delay, and current-carrying capability. Finally, the prospective applications of GNRs for interconnects are discussed.

Carbon nanotubes can be integrated into multilevel interconnects to meet emerging needs: delay, lifetime, parasitic resistance, inductive effects, bandwidth density, electromigration (Hosseini & Shabro, 2010), energy efficiency, power dissipation, and lowering temperature of the interconnection. Additionally, the use of carbon nanotubes makes possible the development of three-dimensional hyper-integration architectures with a high performance: versatility, scalability, adaptability, high-density interconnects, and a reduced number of

Carbon Nanotube- and Graphene Based Devices, Circuits and Sensors for VLSI Design 49

Fig. 7. Electrical connections in VLSI circuits: (a) interconnects based on carbon nanotubes, (b) interconnects based on graphene, (c) vias based on carbon nanotubes, and (d) vias based

The graphene presents a higher conductance with respect to Cu for interconnects in the range of nanometers. Among the properties exploited of the graphene for interconnects are: high carrier mobility at room temperature, thermal conductivity, higher mechanical strength, reduced capacitance coupling between adjacent wires, width-dependent transport gap, temperature coefficient, and ballistic transport. When line widths of the graphene nanoribbons are reduced below 8 nm, the resistivity of GNRs is insignificant. Additionally, the use of graphene in interconnects extends the life of high performance for silicon-based integrated circuit technology. In thermal characteristics, the graphene interconnects allow us

Additionally to the electrical properties, the mechanical and thermal properties of CNTs and graphene nanoribbons must be taking into account in the design of interconnects. Mechanical properties such as strength, stability and minimal elastic deformation can be achieved thanks to its topology and low density. By another side, carbon nanotubes exhibit good thermal conductivity and high thermal stability, which are necessary to support high

Within of the novelties to come in this sector are the scaling of the ordinary interconnects by means of an accurate and reproducible patterning of nanoscale structures based on carbon nanotubes and/or graphene nanoribbons. The use of self-assembly is more and more feasible given the advancements in the development of supermolecular networks. These changes will allow the perfect alignment and optimal charge transport among the elements interconnected in a VLSI system. Additionally, these techniques increase the yield given place to a massive fabrication and lower costs, which are essential in a VLSI

to cool heat flux, to remove hot-spots, and to spread lateral heat (Goel, 2007).

current densities (Giustiniani et al., 2011).

on graphene.

system.

defects, (Ahn et al., 2006; Bakir & Meindl, 2009; Papanikolau et al., 2011; Shacham-Diamand et al., 2009; Xie et al., 2010; Zhou & Wang, 2011).

Electrical transport in MWNTs presents three different cases. When a MWNT operates at conditions of low energy (thermal and electrical), electrical current in carried by the outermost shell of it. At intermediate energy, only metallic shells contribute to the electrical transport of current. Finally, at high energy all shells of the MWNT carry electrical current. In this manner, is complicated to adjust the operation of MWNTs with the aim of that these can be used in interconnections of VLSI systems (Srivastava, 2004, 2009; Tan et al., 2008).

Since inherently carbon nanotubes can provide high electrical current density, numerous applications, including interconnects for VLSI design, have been suggested as a novel way of reducing physical spaces with an optimal performance. The electrical resistance for CNTs, as large as 1 µm with perfect contacts, is about of 6.45 KΩ. This value is high to be used in interconnects, therefore, carbon nanotubes are placed in parallel in large numbers (a bundle) with the aim of reducing the total electrical resistance. A CNT bundle is generally a mixture of single-walled CNTs, multi-walled CNTs or single-walled CNTs and multi-walled CNTs. CNTs bundle offers a promising alternative to place metallic contacts and vias at the local level for VLSI circuits, with the advantage that they can be grown with low or high indexes when lower or higher current densities are needed, respectively. In particular, the length-todiameter ratio of the CNT interconnects have significant implications for the design of onchip capacitors and inductors (Nojeh & Ivanov, 2010).

Due to the very high frequencies used to carry signals in the integrated circuits, the ballistic transport presented by carbon nanotubes and graphene allow us to design advanced interconnect networks (see Figure 7). Since metallic carbon nanotubes are almost insensitive to the disorder, they are considered as perfect 1D electrical conductors. In a similar way, tube-tube connections, junctions and even tube-metal contacts that also are used in the interconnection of VLSI systems must work reliably with minimal electrical losses in the contact points. By nature, nanotube-metal interface presents a tunneling barrier. The research associated with these phenomena has searched solutions based on fabrication methods to modulate the electrical characteristics of the interface (Li, J. et al, 2003).

Tube-tube junctions involve physical contact, with small structural deformation, between two tubes and these are not chemically bonded. This type of junction is found in interconnections between ropes, MWNTs, and crossed-over tubes (Andriotis et al., 2001, 2002). The electrical transport is realized by means of tunneling transport between tubes, producing an alteration in electrical transport of the individual tubes involved in the junction, due to the weak electrical coupling. When specific junctions called "X", "Y" or "T" are been used in the connections, these have proved to be stable and therefore, these can be useful when it is required to joint multi-terminal electronic devices by means of carbon nanotubes or in the case of wiring interconnection (Chen & Wang, 2009; Li, H. et al., 2008, 2009).

Plating a hollow structure inside used as via or trench in circuits VLSI by means of carbon nanotubes have not been reasonable due to high hydrophobicity of graphene sheets, which hinder the entry of solvent and dissolved species (Shacham-Diamand et al., 2009). This problem is emphasized for carbon nanotubes with diameters less than 50 nm.

defects, (Ahn et al., 2006; Bakir & Meindl, 2009; Papanikolau et al., 2011; Shacham-Diamand

Electrical transport in MWNTs presents three different cases. When a MWNT operates at conditions of low energy (thermal and electrical), electrical current in carried by the outermost shell of it. At intermediate energy, only metallic shells contribute to the electrical transport of current. Finally, at high energy all shells of the MWNT carry electrical current. In this manner, is complicated to adjust the operation of MWNTs with the aim of that these can be used in interconnections of VLSI systems (Srivastava, 2004, 2009; Tan et al., 2008).

Since inherently carbon nanotubes can provide high electrical current density, numerous applications, including interconnects for VLSI design, have been suggested as a novel way of reducing physical spaces with an optimal performance. The electrical resistance for CNTs, as large as 1 µm with perfect contacts, is about of 6.45 KΩ. This value is high to be used in interconnects, therefore, carbon nanotubes are placed in parallel in large numbers (a bundle) with the aim of reducing the total electrical resistance. A CNT bundle is generally a mixture of single-walled CNTs, multi-walled CNTs or single-walled CNTs and multi-walled CNTs. CNTs bundle offers a promising alternative to place metallic contacts and vias at the local level for VLSI circuits, with the advantage that they can be grown with low or high indexes when lower or higher current densities are needed, respectively. In particular, the length-todiameter ratio of the CNT interconnects have significant implications for the design of on-

Due to the very high frequencies used to carry signals in the integrated circuits, the ballistic transport presented by carbon nanotubes and graphene allow us to design advanced interconnect networks (see Figure 7). Since metallic carbon nanotubes are almost insensitive to the disorder, they are considered as perfect 1D electrical conductors. In a similar way, tube-tube connections, junctions and even tube-metal contacts that also are used in the interconnection of VLSI systems must work reliably with minimal electrical losses in the contact points. By nature, nanotube-metal interface presents a tunneling barrier. The research associated with these phenomena has searched solutions based on fabrication

Tube-tube junctions involve physical contact, with small structural deformation, between two tubes and these are not chemically bonded. This type of junction is found in interconnections between ropes, MWNTs, and crossed-over tubes (Andriotis et al., 2001, 2002). The electrical transport is realized by means of tunneling transport between tubes, producing an alteration in electrical transport of the individual tubes involved in the junction, due to the weak electrical coupling. When specific junctions called "X", "Y" or "T" are been used in the connections, these have proved to be stable and therefore, these can be useful when it is required to joint multi-terminal electronic devices by means of carbon nanotubes or in the case of wiring interconnection (Chen & Wang, 2009; Li, H. et

Plating a hollow structure inside used as via or trench in circuits VLSI by means of carbon nanotubes have not been reasonable due to high hydrophobicity of graphene sheets, which hinder the entry of solvent and dissolved species (Shacham-Diamand et al., 2009). This

problem is emphasized for carbon nanotubes with diameters less than 50 nm.

methods to modulate the electrical characteristics of the interface (Li, J. et al, 2003).

et al., 2009; Xie et al., 2010; Zhou & Wang, 2011).

chip capacitors and inductors (Nojeh & Ivanov, 2010).

al., 2008, 2009).

Fig. 7. Electrical connections in VLSI circuits: (a) interconnects based on carbon nanotubes, (b) interconnects based on graphene, (c) vias based on carbon nanotubes, and (d) vias based on graphene.

The graphene presents a higher conductance with respect to Cu for interconnects in the range of nanometers. Among the properties exploited of the graphene for interconnects are: high carrier mobility at room temperature, thermal conductivity, higher mechanical strength, reduced capacitance coupling between adjacent wires, width-dependent transport gap, temperature coefficient, and ballistic transport. When line widths of the graphene nanoribbons are reduced below 8 nm, the resistivity of GNRs is insignificant. Additionally, the use of graphene in interconnects extends the life of high performance for silicon-based integrated circuit technology. In thermal characteristics, the graphene interconnects allow us to cool heat flux, to remove hot-spots, and to spread lateral heat (Goel, 2007).

Additionally to the electrical properties, the mechanical and thermal properties of CNTs and graphene nanoribbons must be taking into account in the design of interconnects. Mechanical properties such as strength, stability and minimal elastic deformation can be achieved thanks to its topology and low density. By another side, carbon nanotubes exhibit good thermal conductivity and high thermal stability, which are necessary to support high current densities (Giustiniani et al., 2011).

Within of the novelties to come in this sector are the scaling of the ordinary interconnects by means of an accurate and reproducible patterning of nanoscale structures based on carbon nanotubes and/or graphene nanoribbons. The use of self-assembly is more and more feasible given the advancements in the development of supermolecular networks. These changes will allow the perfect alignment and optimal charge transport among the elements interconnected in a VLSI system. Additionally, these techniques increase the yield given place to a massive fabrication and lower costs, which are essential in a VLSI system.

Carbon Nanotube- and Graphene Based Devices, Circuits and Sensors for VLSI Design 51

In the case of back-gated CNTFETs, the main disadvantages found for its use are a poor contact between the gate dielectric and CNT, difficult switching between ON and OFF states when low-voltages are applied, and a Schottky barrier between CNTs and drain and source regions. In the case of top-gated CNTFETs, these offer several advantages over back-gated CNTFETs, but it fabrication process is more complicated (Singh et al., 2004). In wrap-around gate CNTFETs, the entire circumference of the nanotube is gated and therefore, electrical performance is enormously improved, reducing leakage current and increases the device ON/OFF ratio. Finally, in the case of suspended CNTFETs is searched the reduction of the contact between the substrate and gate oxide, and therefore, it decreases scattering at the CNT-substrate interface with the drawback of limiting its use in applications where high

The CNTFETs can be classified in two types: 1) *n*-type CNTFETs, when electrons are majority carriers for positive gate voltages, and 2) *p*-type CNTFETs, when holes are majority carriers for negative gate voltages. An ohmic contact is found when a current-voltage relationship is linear and symmetric (electrons and holes are transported in the same time), while a Schottky-barrier is presented when current-voltage relationship is non-linear and

Four electrical transport regimes can be found in transistors based on carbon nanotubes, which are distinguished in accordance with the length of the nanotube compared with their mean free path, and by the type of contact between the nanotubes and the source/drain metals: 1) *ohmic-contact ballistic,* when charge injection is realized by the source and drain contacts into the carbon nanotubes and vice versa, producing a high current flow; 2) *ohmiccontact diffusive,* when bidirectional charge transport suffers scattering between source and drain contacts and carbon nanotubes with a limited current flow; 3) *Schottky-barrier ballistic*, when the gate voltage controls the thickness of the barrier and drain voltage can lower the barrier producing bidirectional high current flow: in ON-state, electrons tunneling from the source, and in OFF-state, holes tunneling form the drain; and 4) *Schottky-barrier diffusive*, when the combination of gate and drain voltages reduces the Schottky barrier and the charge transport suffers scattering producing a reduced current flow (Appenzeller et al.,

With the introduction of graphene as active material for electronic devices, new field-effect transistors were introduced, namely these are called GFETs. A GFET uses as active material, graphene, for ballistic transport of carriers. As it was illustrated for carbon nanotube, also can be built four types of GFETs: 1) back-gated GFETs, 2) top-gated GFETs, 3) wrap-around gate GFETs, and 4) suspended GFETs. Last two topologies are not available now, but these will be fabricated in a pair of years. Back-gated GFETs present large parasitic capacitances and poor gate control. However, when smooth edges of the graphene nanoribbons are achieved, ON/OFF ratios as high as 106 are obtained, which is attractive for digital applications. Top-gated GFETs are the preferred option for analogical practical applications. In wrap-around gate GFETs, the entire rectangle of the graphene nanoribbon will be gated

Nowadays, carbon nanotube-based field-effect transistors (FETs) have operating characteristics that are comparable with those devices based on silicon. The active part in field-effect transistors is the electrical channel established by means of the carbon nanotube

asymmetric (a unique type of electrical carrier is transported) (Lin, A. et al., 2009).

ON/OFF ratio are required (Kocabas et al., 2005, 2006).

2005; Cao et al., 2007).

(see Figure 9).
