**Modeling, Simulation and Optimization**

110 VLSI Design

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meeting the real-time requierements of automated visual inspection systems", *Proceedings of the 10th Mediterranean Conference on Control and Automation-MED2002*,

**0**

**6**

<sup>1</sup>*USA* <sup>2</sup>*Mexico*

**Parallel Symbolic Analysis of Large Analog**

Sheldon X.-D. Tan1, Xue-Xin Liu1, Eric Mlinar1 and Esteban Tlelo-Cuautle<sup>2</sup> <sup>1</sup>*Department of Electrical Engineering, University of California, Riverside, CA 92521*

Graph-based symbolic technique is a viable tool for calculating the behavior or the characterization of an analog circuit. Traditional symbolic analysis tools typically are used to calculate the behavior or the characteristic of a circuit in terms of symbolic parameters (Gielen et al., 1994). The introduction of determinant decision diagrams based symbolic analysis technique allows exact symbolic analysis of much larger analog circuits than any other existing approaches (Shi & Tan, 2000; 2001). Furthermore, with hierarchical symbolic representations (Tan et al., 2005; Tan & Shi, 2000), exact symbolic analysis via DDD graphs essentially allows the analysis of arbitrarily large analog circuits. Some recent advancement in DDD ordering technique and variants of DDD allow even larger analog circuits to be analyzed (Shi, 2010a;b). Once the circuit's small-signal characteristics are presented by DDDs, the evaluation of DDDs, whose CPU time is proportional to the sizes of DDDs, will give exact numerical values. However, with large networks, the DDD size can

Modern computer architecture has shifted towards designs that employ multiple processor cores on a chip, so called multi-core processors or chip-multiprocessors (CMP) (AMD Inc., 2006; Intel Corporation, 2006). The graphic processing unit (GPU) is one of the most powerful many-core computing systems in mass-market use (AMD Inc., 2011a; NVIDIA Corporation, 2011a). For instance, NVIDIA Telsa T10 chip has a peak performance of over 1 TFLOPS versus about 80–100 GFLOPS of Intel i5 series Quad-core CPUs (Kirk & Hwu, 2010). In addition to the primary use of GPUs in accelerating graphics rendering operations, there has been considerable interest in exploiting GPUs for general purpose computation (Göddeke, 2011). The introduction of new parallel programming interfaces for general purpose computations, such as Computer Unified Device Architecture (CUDA) (NVIDIA Corporation, 2011b), Stream SDK (AMD Inc., 2011b) and OpenCL (Khronos Group, 2011), has made GPUs a powerful and attractive choice for developing high-performance numerical, scientific

\*This work is funded in part by NSF grants NSF OISE-0929699, OISE-1130402, CCF-1017090 and part by

be huge and the resulting evaluation can be very time consuming.

computation and solving practical engineering problems.

CN-11-575 UC MEXUS-CONACYT Collaborative Research Grants.

**1. Introduction**

**Circuits on GPU Platforms** \*

<sup>2</sup>*Department of Electronics, INAOE*
