Preface

Integrated circuit technology in the nanometer regime allows billions of transistors fabricated in a single chip. Although the Moore's Law is still valid for predicting the exponential complexity growth and performance advance for the integrated circuits, the semiconductor industry faces tremendous challenges spanning all aspects of the chip design and manufacture processes. These issues range from scientific research in discovering novel material and devices to advanced technology developments and finding new killer applications. With such a backdrop, we organize this book to highlight some of the recent developments in the broad areas of VLSI design. The authors make no attempt to be comprehensive on the selected topics. Instead, we try to provide some promising perspectives, from open problems and challenges for introducing new–generation electronic design automation tools, optimization, modeling and simulation methodologies, to coping with the problems associated with process variations, thermal and power reduction and management, parasitic interconnects, etc.

Organization of this book includes two parts: VLSI design, and modeling, simulation and optimization. The first part includes five chapters. The first one introduces the VLSI design for multi-sensor smart systems on a chip. Several VLSI design techniques are described for implementing different types of multi-sensors systems on a chip embedding smart signal processing elements and a built-in self-test (BIST). Such systems encompass many classes of input signals from material, such as A fluid, to user type, such as indicator of what to measure.

The second chapter, Three-dimensional integrated circuits design for thousand-core processors, proposes thermal ridges and metallic thermal skeletons to be relatively cost-effective and energy saving. In the 3D design of the stacking silicon dies, the thermal measurement and verification are becoming much more important. As a result, the chapter may give a direction or inspiration for the engineers to investigate the possibility or feasibility of better thermal designs.

The third chapter, Carbon nanotube- and graphene based devices, circuits and sensors for VLSI design, introduces a review concluding that CNTs are very attractive as base material to the design of components for VLSI design. In the future, the use of hybrid materials where carbon nanotubes are involved will be a priority, given that the use of

#### XII Preface

composite materials to design electronic devices, circuits and sensors requires multiple physical and chemical properties that a unique material along cannot provide by itself.

Preface XI

**Prof. Esteban Tlelo-Cuautle**

**Prof. Sheldon X.-D. Tan**

Department of Electrical Engineering, University of California at Riverside

NAOE, Mexico

USA

The tenth chapter gives an overview on switching noise in 3D power distribution networks. The authors show that on-chip switching noise for a three-dimensional (3D) power distribution network has deleterious effects on power distribution network in addition to the active devices. Efficient implementation of on-chip decoupling capacitance along with other on-chip inductance reduction techniques at high

The eleventh chapter, Low cost prototype of an outdoor dual patch antenna array for the openly TV frequency ranges in México, shows that in spite of the inherent narrow broadband of the microstrip antennas, the practical reception, realized in different geographical sites of Morelos and in Michoacán, confirms the feasibility of its use for household reception of open TV frequency ranges. The experimental and practical tests show acceptable reception of channels in both VHF sub-ranges of frequencies. The introduced prototype makes it a competitive option compared with some

Finally, the twelvth chapter, Study on low-power image processing for gastrointestinal endoscopy, focuses on a series of mathematical statistics to systematically analyze the color sensitivity in GI images from the RGB color space domain to the 2-D DCT spatial frequency domain. The aim is to extend the battery life of capsule endoscope. The results show that the core of the processor has high performance and low cost. The post-layout simulation shows that the power consumption can be as low as 7 mW at 256 MHz. Finally, the processing speed can meet the real-time requirement of image

frequency, to overcome the switching noise, is also discussed.

commercial aerial antennas available in the market.

applications in the QCIF, CIF, VGA, or SVGA formats.

The fourth chapter, Impedance matching in VLSI systems, describes different techniques for impedance matching. Two algorithms are proposed and implemented to perform automatic impedance matching control. Advantages and performance of these algorithms are discussed and proved by presenting computer simulations of layout extractions.

The fifth chapter: VLSI design of sorting networks in CMOS technology, introduces a CS circuit as the fundamental cell from which more complex sorting topologies could emerge. Two main conclusions are observed: in the sorting network immersed in the median filter the main advantage lies in facts that its regular structure, because the execution of several CS elements is done in parallel, and the choice of an embedded sorting strategy in the PWL ASIP, allows the PWLR6-µP architecture to be efficient in terms of hardware resources and code length.

The second part includes seven chapters dealing with modeling, simulation and optimization approaches. The sixth chapter, Parallel symbolic analysis of large analog circuits on GPU platforms, introduces a GPU- and graph-based parallel analysis method for large analog circuits. Experimental results from tests on a variety of industrial benchmark circuits show that the new evaluation algorithm can achieve about one to two order of magnitudes speed-up over the serial CPU-based evaluations on some large analog circuits.

The seventh chapter, Algorithms for CAD tools VLSI design, summarizes observations on various techniques applied for the nearest neighbor and partitioning around medoids clustering algorithms. Future enhancements envisaged by the authors are the use of distance based classification data mining concepts and other data mining concepts, and artificial/neural-modeling algorithm to get better-optimized partitions.

The eighth chapter, A multilevel memetic algorithm for large SAT-encoded problems, introduces a memetic algorithm that makes use of the multilevel paradigm, referred to the process of dividing large and difficult problems into smaller ones, which are hopefully much easier to solve, and then work backward towards the solution of the original problem, using a solution from the previous level as a starting solution at the next level. Results comparing the memetic with and without the multilevel paradigm are presented using problem instances drawn from real industrial hardware designs.

The ninth chapter, Library-based gate-level current waveform modeling for dynamic supply noise analysis, introduces a library-based IR-drop estimation method. From the experimental results, authors conclude that the efficient modification method can provide good accuracy on IR-drop estimation with limited information. The estimation errors of their approach are about 5% compared with HSPICE results.

The tenth chapter gives an overview on switching noise in 3D power distribution networks. The authors show that on-chip switching noise for a three-dimensional (3D) power distribution network has deleterious effects on power distribution network in addition to the active devices. Efficient implementation of on-chip decoupling capacitance along with other on-chip inductance reduction techniques at high frequency, to overcome the switching noise, is also discussed.

X Preface

layout extractions.

terms of hardware resources and code length.

on some large analog circuits.

composite materials to design electronic devices, circuits and sensors requires multiple physical and chemical properties that a unique material along cannot provide by itself.

The fourth chapter, Impedance matching in VLSI systems, describes different techniques for impedance matching. Two algorithms are proposed and implemented to perform automatic impedance matching control. Advantages and performance of these algorithms are discussed and proved by presenting computer simulations of

The fifth chapter: VLSI design of sorting networks in CMOS technology, introduces a CS circuit as the fundamental cell from which more complex sorting topologies could emerge. Two main conclusions are observed: in the sorting network immersed in the median filter the main advantage lies in facts that its regular structure, because the execution of several CS elements is done in parallel, and the choice of an embedded sorting strategy in the PWL ASIP, allows the PWLR6-µP architecture to be efficient in

The second part includes seven chapters dealing with modeling, simulation and optimization approaches. The sixth chapter, Parallel symbolic analysis of large analog circuits on GPU platforms, introduces a GPU- and graph-based parallel analysis method for large analog circuits. Experimental results from tests on a variety of industrial benchmark circuits show that the new evaluation algorithm can achieve about one to two order of magnitudes speed-up over the serial CPU-based evaluations

The seventh chapter, Algorithms for CAD tools VLSI design, summarizes observations on various techniques applied for the nearest neighbor and partitioning around medoids clustering algorithms. Future enhancements envisaged by the authors are the use of distance based classification data mining concepts and other data mining concepts, and artificial/neural-modeling algorithm to get better-optimized partitions.

The eighth chapter, A multilevel memetic algorithm for large SAT-encoded problems, introduces a memetic algorithm that makes use of the multilevel paradigm, referred to the process of dividing large and difficult problems into smaller ones, which are hopefully much easier to solve, and then work backward towards the solution of the original problem, using a solution from the previous level as a starting solution at the next level. Results comparing the memetic with and without the multilevel paradigm are presented using problem instances drawn from real industrial hardware designs.

The ninth chapter, Library-based gate-level current waveform modeling for dynamic supply noise analysis, introduces a library-based IR-drop estimation method. From the experimental results, authors conclude that the efficient modification method can provide good accuracy on IR-drop estimation with limited information. The estimation errors of their approach are about 5% compared with HSPICE results.

The eleventh chapter, Low cost prototype of an outdoor dual patch antenna array for the openly TV frequency ranges in México, shows that in spite of the inherent narrow broadband of the microstrip antennas, the practical reception, realized in different geographical sites of Morelos and in Michoacán, confirms the feasibility of its use for household reception of open TV frequency ranges. The experimental and practical tests show acceptable reception of channels in both VHF sub-ranges of frequencies. The introduced prototype makes it a competitive option compared with some commercial aerial antennas available in the market.

Finally, the twelvth chapter, Study on low-power image processing for gastrointestinal endoscopy, focuses on a series of mathematical statistics to systematically analyze the color sensitivity in GI images from the RGB color space domain to the 2-D DCT spatial frequency domain. The aim is to extend the battery life of capsule endoscope. The results show that the core of the processor has high performance and low cost. The post-layout simulation shows that the power consumption can be as low as 7 mW at 256 MHz. Finally, the processing speed can meet the real-time requirement of image applications in the QCIF, CIF, VGA, or SVGA formats.

> **Prof. Esteban Tlelo-Cuautle** NAOE, Mexico

 **Prof. Sheldon X.-D. Tan**  Department of Electrical Engineering, University of California at Riverside USA

**Part 1** 

**VLSI Design** 

**Part 1** 

**VLSI Design** 

**1** 

*USA* 

**VLSI Design for Multi-Sensor** 

**Smart Systems on a Chip** 

*US Naval Academy, Annapolis, MD* 

*University of Maryland, College Park, MD* 

Louiza Sellami1 and Robert W. Newcomb2 *1Electrical and Computer Engineering Department,* 

*2Electrical and Computer Engineering Department,* 

Sensors are becoming of considerable importance in several areas, particularly in healthcare. Therefore, the development of inexpensive and miniaturized sensors that are highly selective and sensitive, and for which control and analysis is present all on one chip is very desirable. These types of sensors can be implemented with micro-electromechanical systems (MEMS), and because they are fabricated on a semiconductor substrate, additional signal processing circuitry can easily be integrated into the chip, thereby readily providing additional functions, such as multiplexing and analog-to-digital conversion. Here we present a general framework for the design of a multi-sensor system on a chip, which includes intelligent signal processing, as well as a built-in self test and parameter adjustment units. Specifically, we outline the system architecture, and develop a transistorized bridge biosensor for monitoring changes in the dielectric constant of a fluid, which could be used for in-home monitoring of kidney function of patients with

In a number of areas it would be useful to have available smart sensors which can determine the properties of a fluid and from those make a reasoned decision. Among such areas of interest might be ecology, food processing, and health care. For example, in ecology it is important to preserve the quality of water for which a number of parameters are of importance, including physical properties such as color, odor, PH, as well as up to 40 inorganic chemical properties and numerous organic ones (DeZuane, 1990). Therefore, in order to determine the quality of water it would be extremely useful if there were a single system on a chip which could be used in the field to measure the large number of parameters of importance and make a judgment as to the safety of the water. For such, a large number of sensors is needed and a means of coordinating the readouts of the sensors into a user friendly output from which human decisions could be made. As another example, the food processing industry needs sensors to tell if various standards of safety are met. In this case it is important to measure the various properties of the food, for example the viscosity and thermal conductivity of cream or olive oil (Singht &

**1. Introduction** 

renal failure.

Helman, 1984).
