**2. System characteristics**

Several different works have investigated the NP imbalance and have proposed several solutions. In (Pou et al., 2007), low frequency ripple is almost completely reduced at the expense of increasing switching frequency.

After having simulated the proposed grid-connected through an L filter with the DC-bus specifications listed in Table 1., Figures 2 and 3 show capacitor voltage evolution, NP ripple, inverter phase voltage and inverter phase-to-phase voltage. Figure 2 shows the results without the implementation of the improving algorithm, while Figure 3 shows the implementation of the algorithm proposed in (Pou et al., 2007).


Table 1. Simulation conditions.

326 Solar Radiation

There is however a drawback that comes up in the use of photovoltaic panels. Only low voltage can be supplied by these devices. This means that they must be connected in series, in order to achieve the desired voltage. Unfortunately, the lowest current supplying element

Minimizing the number of panels connected in a series improves array efficiency once the converter is directly connected to a 400V grid and NP is connected between the two halves of the panel array. Furthermore, as these two arrays are independent, both can be set to

Recently, there has been some work that has focused on transformerless photovoltaic inverters, and the influence of current leakage (Gonzalez et al., 2008), (Kerekes et al., 2009) (Kerekes et al., 2007). This is especially important for human saftey. The German standard, VDE0126-1-1, deals with grid-connected PV systems, and gives the requirements for limiting ground leakage and fault currents. These works coincide in that the NPC is an ideal topology for regulatory compliance, and the algorithm proposed minimizes the NP ripple voltage, one reason why the current leakage exists. The voltage level achieved by the capacitors is studied in several works, which focus on the NP point ripple (Bueno et al., 2006), (Celanovic & Boroyevich 2000), (Ogasawara & Akagi 1993) (Qiang et al., 2003).

(Pou et al., 2007) proposes to eliminate low frequency ripple at the NP using two modulations which contribute to an increase in switching frequency for transistors, and therefore power losses. Work by (Cobreces et al. 2006), based on a single-phase inverter, applies a changing state strategy in a specific duty cycle which also contributes to an

Usually, there is no intention to tackle the asymmetric supply issue since it is very common to implement the same voltage for both capacitors thus avoiding an independent power

This document takes a look at this problem and tries to increase the efficiency of renewable energy generation. In Section 2, system characteristics are determined, and we introduce an improved proposal for (Pou et al., 2007) reducing NP ripple voltage in ideal conditions: plugging symmetric or minimal asymmetric power supply into the DC-bus. Section III explains the underlying principle of the proposed algorithm and implementation details. Section IV shows simulations made under "ideal" power supply conditions, and analyzes their limits, characteristics and advantages. In Section V, the power supply imbalance issue, due to the fact that power supplied by PV1 and PV2 are different, is discussed: the imbalance tolerance limit will be shown analytically. Finally, in Section VI, conclusions will be drawn.

Several different works have investigated the NP imbalance and have proposed several solutions. In (Pou et al., 2007), low frequency ripple is almost completely reduced at the

After having simulated the proposed grid-connected through an L filter with the DC-bus specifications listed in Table 1., Figures 2 and 3 show capacitor voltage evolution, NP ripple, inverter phase voltage and inverter phase-to-phase voltage. Figure 2 shows the results without the implementation of the improving algorithm, while Figure 3 shows the

sets the maximum current generated by the array.

inject maximum power at any moment.

increase in switching frequency.

**2. System characteristics** 

expense of increasing switching frequency.

implementation of the algorithm proposed in (Pou et al., 2007).

supply implementation.

Figure 2 demonstrates that NP ripple is considerable. This ripple is due to a low frequency component that matches with the third harmonic of the grid frequency, and a high frequency component that matches the switching frequency.

Fig. 2. Simulation results without the proposed algorithm. Capacitor voltage, NP ripple voltage, phase and line voltage.

Figure 3 show that the low frequency component is almost completely in the NP, but a high frequency component still exists.

Problems arise when the conditions in Table 1 change and voltage or current imbalances are introduced.

When this happens, and is due to small voltage imbalances, it is viable to introduce offsets and sort out the problem in both mentioned cases. An objection to this method is that modifying modulations may cause undesired over-modulation resulting in a discontinuous state. Moreover, falling into a discontinuous state becomes more likely when working close to the nominal power of the converter.

If this happens due to small current imbalances, it results in overcharging one capacitor, which brings an undesired voltage imbalance that can be solved with the same procedure, but with the same undesired consequences.

Therefore, connecting the NP to the middle point of a photovoltaic-panel array is an open field for investigation (Galvez et al., 2009) and (Busquets-Monge et al. 2008), and this technique is beginning to be applied to the connection of two wind turbine generators (Jayasinghe et al., 2010). However, currently, it is common to find arrays connected from UDC+ to UDC-. As shown in figure 4.

Fig. 3. Simulation results with algorithm proposed in (Pou et al., 2007). Capacitor voltage, NP ripple voltage, phase and line voltage.

The proposed algorithm solves this problem and improves performance even with bigger imbalances due to partial shading, a consequence of cloudy days and when some panels are dirty. Moreover the features of the panels, after manufacturing, are not identical for individual panels, and the photovoltaic panels performance changes over time are unequal.

What's more, there are some researchers who have proposed several topologies that work with more than one array of photovoltaic panels (Calais et al.,1998), and with special attention to the problem of current leakage (Gonzalez et al., 2008), (Kerekes et al., 2009) and (Kerekes et al., 2007).

If this happens due to small current imbalances, it results in overcharging one capacitor, which brings an undesired voltage imbalance that can be solved with the same procedure,

Therefore, connecting the NP to the middle point of a photovoltaic-panel array is an open field for investigation (Galvez et al., 2009) and (Busquets-Monge et al. 2008), and this technique is beginning to be applied to the connection of two wind turbine generators (Jayasinghe et al., 2010). However, currently, it is common to find arrays connected from

0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135 0.14

0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135 0.14

0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135 0.14

0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135 0.14

Time [S]

Fig. 3. Simulation results with algorithm proposed in (Pou et al., 2007). Capacitor voltage,

The proposed algorithm solves this problem and improves performance even with bigger imbalances due to partial shading, a consequence of cloudy days and when some panels are dirty. Moreover the features of the panels, after manufacturing, are not identical for individual panels, and the photovoltaic panels performance changes over time are

What's more, there are some researchers who have proposed several topologies that work with more than one array of photovoltaic panels (Calais et al.,1998), and with special attention to the problem of current leakage (Gonzalez et al., 2008), (Kerekes et al., 2009) and

Time [S]

Vab (Va - Vb)

Time [S]

Va

Time [S]

Ripple in the NP (Vc1 - Vc2)

Vc1 and Vc2

but with the same undesired consequences.

UDC+ to UDC-. As shown in figure 4.

> -4 -2 0 2 4



NP ripple voltage, phase and line voltage.

Voltage [V]

Voltage [V]

unequal.

(Kerekes et al., 2007).

0

500

Voltage [V]

Voltage [V]

Fig. 4. Schematics of an array of photovoltaic panels. The left one with middle point connected and the right one unconnected.
