**4. Characteristics of the proposed algorithm operation**

The use of the proposed algorithm, not only achieves low frequency ripple reduction, but also cancels all of the components that make the NP voltage drop out of the limits of the desired band, making switching frequency dependent on the span of the ripple band.

First, we will start off with a system analysis performed under identical DC-bus conditions applied to Table 1.

Fig. 7. Shows simulation results for a voltage band of ±1v.

Fig. 7 Simulation results with the proposed algorithm and ±1v band. C1 and C2 voltage ripple in the NP, phase voltage and line voltage.

Additionally, capacitor voltage could be checked to see if it is kept within the voltage range. It is possible to establish a narrow band in order to cancel even the high frequency components at the cost of increasing the switching frequency. So a decision must be made between ripple span or switching losses, considering the thermal limitation design to avoid any damage to the devices, and the transistors transient response.

Figure 8 shows simulation results for a voltage band of ±2v.

Moreover, it should be considered that DC-bus voltage is not truly constant, because the undesired ripple is dependent on the amount of power injected into the grid. Therefore, despite the fact that one capacitor benefits from a more limited narrow band, the other capacitor suffers from a wider band, the sum of that band and DC-bus ripple. That does useless to reduce ripple in the DC-bus.

The use of the proposed algorithm, not only achieves low frequency ripple reduction, but also cancels all of the components that make the NP voltage drop out of the limits of the desired band, making switching frequency dependent on the span of the ripple band.

First, we will start off with a system analysis performed under identical DC-bus conditions

0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135 0.14

0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135 0.14

0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135 0.14

0.1 0.105 0.11 0.115 0.12 0.125 0.13 0.135 0.14

Time [S]

Fig. 7 Simulation results with the proposed algorithm and ±1v band. C1 and C2 voltage

Additionally, capacitor voltage could be checked to see if it is kept within the voltage range. It is possible to establish a narrow band in order to cancel even the high frequency components at the cost of increasing the switching frequency. So a decision must be made between ripple span or switching losses, considering the thermal limitation design to avoid

Moreover, it should be considered that DC-bus voltage is not truly constant, because the undesired ripple is dependent on the amount of power injected into the grid. Therefore, despite the fact that one capacitor benefits from a more limited narrow band, the other capacitor suffers from a wider band, the sum of that band and DC-bus ripple. That does

Time [S]

Vab (Va - Vb)

Time [S]

Va

Time [S]

Ripple in the NP (Vc1 - Vc2)

Vc1 and Vc2

**4. Characteristics of the proposed algorithm operation** 

applied to Table 1.

> -4 -2 0 2 4



Fig. 7. Shows simulation results for a voltage band of ±1v.

any damage to the devices, and the transistors transient response.

Figure 8 shows simulation results for a voltage band of ±2v.

ripple in the NP, phase voltage and line voltage.

useless to reduce ripple in the DC-bus.

Voltage [V]

Voltage [V]

0

500

Voltage [V]

Voltage [V]

Fig. 8. Simulation results with the proposed algorithm and the ±2v band, C1 and C2 voltage ripple in the NP, phase voltage and line voltage.

This effect is shown in Figure 9. The parameters represented are C1 voltage; ripple voltage in the NP and DC-bus voltage. Also, the influence of a ±0.5V voltage band can be seen.

Fig. 9. Simulation results for C1 with ±0.5V ripple.


Table 3 shows both the amount and the rate of increase of switches for the applied algorithm with different voltage spans.

Table 3. Amount and rate of increase of switches in different simulations.

Therefore, it can be affirmed that reducing the ripple to NP ripple values causes an increase in switches and, therfore, losses, but does not reduce ripple in the DC-Bus. Because of this, it is not effective to use NP ripple values lower than DC-Bus ripple values.

So, when the power injected into grid is lower, the NP ripple is also lower and the number of times that the algorithm has to shift, is lower, making the number of swiches lower as well.
