**4.2.2 Experiment of XOR gate based on turbo-switch**

An experiment was carried out to evaluate the performance the proposed XOR scheme at 85 Gb/s, whose experimental setup is shown in Fig. 11. A CW laser with a wavelength of 1552 nm was employed as the probe beam instead of a pulse train, so the first PM fiber in Fig. 10 was not required. The 3 ps, 1557 nm control pulses A and B were obtained from a 10.645 GHz mode-locked laser The control pulse stream was optically modulated with a 27-1 pseudo-random bit sequence (PRBS) and the pulses were passively multiplexed to 85 Gb/s before being injected into the SOAs 1 and 2. An optical delay-line was used to present different parts of the sequence to each SOA. Two variable optical attenuators (VOAs) were employed to adjust the control pulse energies. Another VOA was used to optimize the input power of the probe beam injected to SOA2.

All the three (Kamelian) SOAs were biased at 400mA, where their unsaturated gain was greater than 30 dB. The differential delays of PM fibers were 11.5 ps (2*Δt*) and 5.75 ps (*Δt*) respectively, where *Δt* is one half of the bit period at 85 Gb/s. 5 nm band-pass filters blocked the control pulses and allowed the propagation of the probe beam. The polarization controllers (PC) in front of each PM fiber were adjusted to launch approximately equal amplitudes into the TE and TM modes. The two polarization states were also aligned with the TE and TM modes of the active layer at the input to SOAs 1 and 2 with further PCs. This was to prevent the control pulses causing polarization rotation.

High-Speed All-Optical Switches Based on Cascaded SOAs 41

Fig. 13. Spectrum of 85 Gb/s XOR output (resolution is 0.01 nm; the inset is the

In the turbo-switch structure, an extra SOA2 is cascaded following the SOA1, acting as a highpass filter to filter out the slow response associated with the SOA carrier lifetime. In such a way, the overall operation speed of the turbo-switch device has been demonstrated several times faster than that of a single SOA. A straight-forward idea is that, if more SOAs are cascaded after the turbo-switch, is there any further improvement to the operation speed?

For the multiple cascaded SOAs, the simulations are carried out. The gain recovery time, overshoot level (normalized by the initial power level), and noise figure as a function of SOA stage are plotted in Fig. 14, where the powers of input CW probe and pump pulse to SOA1 are the same as Fig. 4. The noise figures of the cascaded switches are obtained using

The results are actually encouraging, since the recovery time is reduced to ~10 ps when three SOAs are cascaded, which implies that more SOAs after turbo-switch, faster recovery could be expected. However, the degree of the overshoot and noise figure also rise almost linearly as the numbers of SOA increases, whereas the recovery time is not reduced significantly any more after the stage number exceeding 5. Moreover, the ASE noise and the complexity of the device are also expected to increase when more SOAs are cascaded. Therefore a trade-off has to be considered accordingly when choosing an optimum structure of turbo-switch for a specific application. Nevertheless, our simulation suggests that, the

corresponding spectrum of an 85 Gb/s AND gate)

**5. Further improvement of the switch speed** 

**5.1 Switch of multiple cascaded SOAs** 

the equations presented in (Baney et al., 2000).

optimum number of SOA should be in the range of 2 to 5.

Fig. 11. Experimental setup of 85-Gb/s XOR logic gate, where PM delay indicates a length of PM fiber with PCs and a filter (inset).

The output of the XOR logic gate was monitored by a 70 GHz oscilloscope. XOR operation was realized at 10, 21, 42 and 85 Gb/s by adjusting the control pulse multiplexer. The amplitude variations in the 85 Gb/s output eye diagram (Fig. 12) were primarily due to imperfections in the multiplexer. The output spectrum at the same rate is shown in Fig. 13, where the sidebands are visible, but suppressed compared to a normal return-to-zero AND gate spectrum (The inset of Fig. 13). This is because the output pulses resulting from an A B input are in anti-phase to those corresponding to B A . The average powers of the probe beam were 4 dBm before SOA1 and SOA2 and 10 dBm before SOA3. The average powers of control pulses A and B were 4 dBm and 3.5 dBm respectively, implying control pulse energies of 54 fJ and 62 fJ.

Fig. 12. 85 Gb/s XOR output eye diagram (5 ps/division).

Fig. 11. Experimental setup of 85-Gb/s XOR logic gate, where PM delay indicates a length of

The output of the XOR logic gate was monitored by a 70 GHz oscilloscope. XOR operation was realized at 10, 21, 42 and 85 Gb/s by adjusting the control pulse multiplexer. The amplitude variations in the 85 Gb/s output eye diagram (Fig. 12) were primarily due to imperfections in the multiplexer. The output spectrum at the same rate is shown in Fig. 13, where the sidebands are visible, but suppressed compared to a normal return-to-zero AND gate spectrum (The inset of Fig. 13). This is because the output pulses resulting from an A B input are in anti-phase to those corresponding to B A . The average powers of the probe beam were 4 dBm before SOA1 and SOA2 and 10 dBm before SOA3. The average powers of control pulses A and B were 4 dBm and 3.5 dBm respectively, implying control

PM fiber with PCs and a filter (inset).

pulse energies of 54 fJ and 62 fJ.

Fig. 12. 85 Gb/s XOR output eye diagram (5 ps/division).

Fig. 13. Spectrum of 85 Gb/s XOR output (resolution is 0.01 nm; the inset is the corresponding spectrum of an 85 Gb/s AND gate)
