**5. All optical frequency encoded memory unit**

The very fast running optical memory and optical logic gates are the basic building blocks for any optical computing and data processing system. Realization of a very fast memorycell in the optical domain is very challenging one. In last two decades many methods of implementing all-optical flip-flops have been proposed. Most of these suffer from speed limitation because of slow switching response of the active devices [Zhang S. et.al.,2005, Ghosal et.al.,2008, Fatehi M.T. et.al.,1984]. In this present chapter the author presents a method of developing a frequency encoded memory unit based on the polarization switching action of semiconductor optical amplifier (SOA) using frequency encoded data [Garai S.K., Mukhopadhyay S.,2010 ].

Fig. 4. Block diagram of different logic units

[Garai S.K., Mukhopadhyay S.,2010 ].

**5. All optical frequency encoded memory unit** 

The very fast running optical memory and optical logic gates are the basic building blocks for any optical computing and data processing system. Realization of a very fast memorycell in the optical domain is very challenging one. In last two decades many methods of implementing all-optical flip-flops have been proposed. Most of these suffer from speed limitation because of slow switching response of the active devices [Zhang S. et.al.,2005, Ghosal et.al.,2008, Fatehi M.T. et.al.,1984]. In this present chapter the author presents a method of developing a frequency encoded memory unit based on the polarization switching action of semiconductor optical amplifier (SOA) using frequency encoded data The basic building blocks of the memory unit consists of three polarization switches PSW1 and PSW2 [Garai S.K., 2010, 2011a], an isolator, two input sources X2 and X1 giving the probe beams having frequencies ν2 and ν1 respectively and one add/drop multiplexer, ADM as shown in Fig.5. The beam obtaining from output port-2 of PSW1 splits up into two parts by means of beam splitter B.S. One part of the beam is coupled as the input pump beam for polarization switch PSW2 and another part is serving as the output data (Y). Similarly, the output beam from port-2 of PSW2 is split up into two parts. One part is serving as the probe beam of PSW3 switch via an attenuator AT and another part is viewed as output at Y terminal via the attenuator. The low intensity input probe beam of PSW3 switch is controlled by the isolator. The function of the isolator is that it allows the part of the output beam of PSW2 to appear at Y end but prevents the output of PSW1 to appear at the input end of PSW3. 'A' is the input pump beam terminal of switch PSW1. The input pump beam is injected to PSW1 via add/drop multiplexer ADM. The ADM is tuned for reflection frequency ν2. The reflected beam of frequency ν2 is reflected back by ADM and drop down by circulator and injected as the pump beam (control beam) for PSW3. The beam obtained at the output port-2 of PSW3 is coupled with input pump beam 'A' by a beam coupler (B.C.).

Fig. 5. Frequency encoded single bit memory circuit

The operation of the frequency encoded memory unit is now explained with the help of Fig.6. Here the frequency of optical signal ' 1 (corresponding wavelength <sup>1</sup> ) is encoded as 0 state and the frequency <sup>2</sup> (corresponding wavelength <sup>2</sup> ) as the state 1.

If the input beam 'A' be of frequency ν1(0), then it will pass through ADM and behaves as the pump beam for polarization switch PSW1. As the probe beam X2 of PSW1 is of frequency ν2, therefore, by the joint action of pump and probe beam the PSW1 goes to switch off state i.e. output of PSW1 will give no signal (zero). Now the polarization switch PSW2 will get only probe beam signal X1 of frequency ν1 and according to the action of polarization switch

A Novel Method of Developing Frequency Encoded

[Garai S.K.,2012]exploiting the same working principle.

the memory unit is as shown in Table-4.

the encoded signal of frequencies

**6. Conclusion** 

speed.

Different Optical Logic Processors Using Semiconductor Optical Amplifier 63

signal of 'frequency- ν2(1)' will remain stored at the output end 'Y'. The excitation table of

This scheme may be extended to design multivalued memory unit with some extra circuit elements [Garai S.K., Mukhopadhyay S.(2010)] as well as designing multivalued flip-flops

Whole operation is all-optical one, so one can expect a very high speed of operation from the system. Considering the present scenario of speed and band width limitation of electronic computing, signal processing and future problem of data traffic, the author has developed all these frequency encoded all optical logic units, and memory unit which will be very useful in all optical computing and the optical networking. All these optical gates and memory units are suitable to perform so many advanced functions in communication based network such as in all-optical bit pattern recognition, all-optical bit-error rate monitoring, all optical packet addressing and pay-load separation, all optical label swapping, all optical packet drops in optical time domain multiplexing (OTDM) etc. The frequency encoded all these all optical logic processors are expected to be very useful in present days as well as in

Here the author has selected the wavelength of the encoded inputs signals corresponding to

are respectively 1540 and 1550nm. The advantages of using C-Band is that here the frequency conversion gain is almost independent of frequency. The separation between two consecutive encoded wavelength '5 nm' is sufficient. The function of optical 'add/drop multiplexer' is very specific about frequency of reflection and it merely allow to pass a spreading of frequency. Again, at the output end as only the beam of one frequency is obtained at a time, therefore, there is no question of crosstalk. To maintain the state of polarization (SOP) of probe beams polarization controller (necessary polarizer) is to be used. The performance of SOA based optical logic processors are preferred as SOA based optical switches are more efficient because of its higher nonlinearity with least switching power (<- 3dBm) and high switching contrast ratio (20dB). Here the speed of the operation is depending on the switching speed of SOA based state of polarization rotation of the probe beam as well as the switching speed of coupled version of different circuit elements within the interconnecting fibers. It also depends on the distances of different units and propagation distance between two SOAs. The operating speed of SOA switch is restricted to 100 Gb/s due to its response time of gain saturation in regular SOA. Though switching speed of individual circuit element is very high (of the order of sub Pico second), however, the speed of the couple version will be reduced to 40 to 50 GHz due to propagation delay (order of nanosecond) within the interconnecting fibers. However very fast response (100 Gb/s) can be achieved using quantum dot SOA-MZI switch [Ju H.,et.al.,2005; Sun H., et.al.,2005; Vyrsokinos K., et.al.,2010] and quantum dot SOA as polarization rotation switches with an integrated circuit. The fast switching action of SOA enhances the speed of logic operation and as a result the speed of processing becomes faster for multi-bit operation. Therefore the above-mentioned scheme demands for overall feasibility, practicality and versatility of designing all optical logic processor system with very high

<sup>2</sup>*( )* 1 in C band (1536 nm -1570 nm) and these

near future for wavelength division multiplexing and demultiplexing networks.

<sup>1</sup>*( )* 0 and

the PSW2 will be in ON state i.e. output of PSW2 is the signal of frequency ν1. A fraction of the beam of frequency ν1 will be displayed at the final output and the intensity of the remaining part will be attenuated to a value so that a desired low intensity beam is serving as probe beam of PSW3 switch. In PSW3 since no pump beam is present, the probe beam of frequency ν1 will appear at the output port-2 and finally it is coupled with the input pump beam of PSW1 of frequency ν1. Therefore optical beam of frequency ν1(0) will remain at the output end (Y) of the memory unit.

Now if the input beam A of frequency ν1 is removed from the circuit, the output beam of frequency ν1 of port-2 of PSW3 will serve as the input pump beam for switch PSW1 which leads to switch off the PSW1 and in turn it will switch on PSW2. Thus the signal of frequency ν1(0) will continue to remain at the output end Y.

If the input beam 'A' is of frequency ν2(1) then it will be reflected back by ADM and drop down by circulator and behave as the pump beam for PSW3. As no pump beam for switch PSW1 is present, so this switch will come to the ON state and the amplified probe beam X1 of frequency ν2 will appear at the output end of PSW1.This output beam with the joint action of probe beam X2 switch off the PSW2. Therefore no signal will be obtained from output end of PSW2. Now no signal probe beam being present at PSW3, no probe beam will appear at the output port-2. Again probable leakage pump beam of frequency ν2 in port-2 is blocked by ν1 pass filter F1. Therefore no beam from the output end of PSW3 will be injected as pump beam for switch PSW1. Thus PSW1 will remain at ON state giving constant output signal of frequency ν2 when the input signal A is of frequency ν2.


Table 4. Excitation table of frequency encoded memory unit.

Now if the input signal 'A' of frequency ν2 is removed, both the pump beam and probe beam will be absent at the input end of PSW3 and as a result no output beam will appear at the port-2. Again no pump beam being present at the input end of PSW1 switch, it will remain in on state giving amplified probe beam of frequency ν2 at the output end. This output beam in turn will drive the switch PSW2 to OFF state and no beam will be obtained at the output port-2 of PSW3. Thus when the input beam of frequency ν2 is withdrawn, the signal of 'frequency- ν2(1)' will remain stored at the output end 'Y'. The excitation table of the memory unit is as shown in Table-4.

This scheme may be extended to design multivalued memory unit with some extra circuit elements [Garai S.K., Mukhopadhyay S.(2010)] as well as designing multivalued flip-flops [Garai S.K.,2012]exploiting the same working principle.
