Biometric-Based Optical Systems for Security and Authentication

*Gaurav Verma, Wenqi He and Xiang Peng*

## **Abstract**

In a digital world, biometric authentication is becoming more and more popular for reliable automatic recognition of people, which is widely being deployed in optical information security-related systems. The adoption of biometrics into optical security-based applications and fields has been adding excellent security due to their distinctive attribute that gains from optics. In this chapter, we present an optical nonlinear cryptosystem for image encryption using biometric keys generated from fingerprint hologram for security and authentication. In order to generate biometric keys, we implemented an optoelectronics experiment setup using digital holography for capturing the fingerprint hologram, storing, and then numerically reconstructing it. The reconstructed features of the fingerprint object offer very appealing attributes from the perspective of data encryption such as uniqueness, randomness, and discriminability. Fingerprint biometric features are kept inside interference patterns optically, which are also protected with experimental parameters. If both pieces of information are provided to be known to the person at the decryption stage, as a result, it keeps maintaining user specificity in order to access system information. Furthermore, we exploit the utility of the biometric key in designing an optical cryptosystem for encrypting the information which offers a solution to the distribution of keys with heightened security.

**Keywords:** fingerprint biometric, optical encryption, security, authentication, digital holography

## **1. Introduction**

Biometrics refers to a unique, measurable, biological trait or attribute of a human being that is used to validate the identity of a person [1, 2]. The use of biometrics in a system relies on automated recognition methods based on a person's physiological or behavioral features, whose functionality works on the conforming exact identity of an individual compared to traditional authentication methods such as passwords, tokens, and PINs (Personal Identification Numbers) [3–5]. A number of applications are implemented to automate authentication methods by the use of biometric traits for access control, commercial, phone, government, and forensic [1–6]. In general, the

biometric trait comprises physiological or behavioral features [5]. The physiological traits, which use fingerprints, retina, iris, facial images, and hand geometry, are physical characteristics computed at a specific point in time, while behavioral biometric traits commonly list in particular, signature, gait, voice recordings, and keystroke rhythms, make attention to the mode some action is accomplished by every individual [1, 4].

Due to recent technological advances in real-world applications, an automated identification system has been implemented in many security-related systems using biometric traits for reliable and trusted authentication [1–7]. Moreover, different kinds of threats, challenges, and privacy issues are growing concerns in today's modern world, and biometric technology is used to ensure secure and safe circumstances [4–7]. The development of optics-based biometric systems has brought tremendous growth in data security and authentication in recent times [6, 7]. More excitingly, most of the current optical encryption systems are now being incorporated with the biometric features of a person [7]. These scenarios, however, increase the security level for information protection through person identification against unauthorized access [4].

Optical systems are extensively involved in the field of information security due to high speed, parallel processing, and exploitation of multidimensional data such as wavelength, frequency, and polarization [7–66]. Optics-related cryptosystems, such as optical, compression, encryption, photon counting, and authentication, are extensively developed to secure sensitive data or images during transmission and reception through the digital medium [6, 7]. In the field of optics, image encryption was brought into existence since the introduction of the double random phase encoding (DRPE) scheme. The DRPE method converts input information into white stationary noise by the involvement of two random phase masks (RPMs) at the input and the Fourier plane, respectively [8]. Due to the linear and symmetric nature of the DRPE system, these RPMs for encryption and decryption processes are similar to security keys [8–13]. In order to take advantage of optical encryption, Qin *et al*. reported the optical cryptosystem for image encryption based on phase-truncated Fourier transforms (PTFTs) [14, 15]. The PTFT operation is used to truncate the Fourier spectrum of the image into the phase and the amplitude distributions. The PTFT encryption scheme uses two RPMs for encryption, while two phase-only masks are obtained as the decryption keys for the decryption process. The main advantages of PTFT over the DRPE are that keys for encryption and decryption processes are distributed due to nonlinear operation. These RPMs act as the main security component. From the cryptanalysis point of view, it is noticed that the RPM-based encryption system suffers from the problem of key management, distribution, and authentication and is found to be insecure against various types of attacks [12, 13, 16–19]. Furthermore, by adding security to optical encryption using unique features of human beings, optical security using biometrics facilitates a secure and reliable way for information processing. Many types of optical systems using biometrics are implemented [24–40], which offer a wide range of features such as keys management, higher security, and user authentication.

From the recent research in the optical encryption domain, it is observed that optical cryptosystems are perceived to be unsuited to implement traditional cryptography because of being unable to address the key distribution issue in terms of public keys and private keys [33–53]. A nonlinear encryption system in the Fresnel domain using the optical phase-retrieval algorithm is developed as reported in [39], which fulfills the criteria of asymmetric cryptography agreement. The phase-retrieval

#### *Biometric-Based Optical Systems for Security and Authentication DOI: http://dx.doi.org/10.5772/intechopen.1002025*

algorithm-based method has also been studied on the development of nonlinear cryptosystems that show progress in the generation of public and private keys in the encryption system, which is demanded with authentication. Zhao *et al*. presented an optical nonlinear cryptosystem using a fingerprint combined with a phase-retrieval algorithm and public key cryptography [40]. In this scheme, the fingerprint features of a person are associated with encryption and decryption operations that help to decrypt the information in the authenticated way at the receiver and also solve the issue of the public-private keys [40–42]. One of the approaches to the implementation of optical information authentication systems is carried out by combining a median-filtering-based phase-retrieval algorithm [51]. Moreover, optical image encryption techniques using digital holography are applied for authentication and security [32–34, 54–65]. This method includes an optical process for recording a hologram by the involvement of a charge-coupled device (CCD), and the captured hologram is known as a digital hologram, which is further numerically reconstructed in a computer [32–34, 57]. The reconstructed information provides additional information in terms of the amplitude, and the phase of the object. Thus, the reconstructed features are explored in the design of optical information processing systems for security and authentication.

In this chapter, we describe our proposed optical nonlinear cryptosystem for image encryption using biometric keys based on an optical phase-retrieval algorithm and phase-truncated Fourier transform for security and authentication, which offer the solution of key distribution with improved security. In this direction, we implement the optoelectronics experiment based on digital holography for recording the fingerprint hologram, which is digitally reconstructed to obtain keys information in terms of the amplitude and the phase. The merit is that the digital recording and reconstruction process of the fingerprint hologram using holography makes it possible for transmission and reception over a communication medium. In addition, the fingerprint hologram is protected by a reconstruction parameter which also enables verification and authentication approach in the proposed encryption/decryption processes. First, we introduce the idea of the optoelectronic experimental process for recording the fingerprint hologram, and its numerical reconstruction. Next, we analyze the features of the reconstructed fingerprint image by performing the statistical test that makes its usage as an encryption key for the image [32]. Furthermore, we explore the utility of the biometric key for optical cryptosystem for image encryption based on the phase-retrieval algorithm and the phase-truncated Fourier transforms (PTFT) scheme. The system uses keys for encrypting the information using the public keys or encryption keys that can only be truly recovered using the private keys or decryption keys, while the involvement of biometric keys maintains the authenticity of the user throughout the process. Our work is the first attempt to develop an optical cryptosystem using the phase-retrieval algorithm and PTFT combined image encryption system utilizing biometric keys from fingerprint hologram. Finally, we demonstrate the security performance and robustness of our cryptosystem. This chapter is structured as follows: Section 2 introduces the optoelectronics setup using digital holography for biometric keys generation and analyzes the keys features demonstrating its utility for image encryption. Section 3 introduces the cryptography perspective using biometrics. Section 4 presents an implementation of optical encryption process. Section 5 investigates experimental results to present enhanced security with user authentication and management of keys. Finally, the conclusion presents the significant contributions, discusses the challenges of the work, and suggests future research directions.

## **2. Optoelectronic experimental setup for biometric keys**

In this section, the method of fingerprint hologram recording has been presented using digital holography in order to capture both phase and amplitude distributions [54–65]. In order to perform fingerprint imaging, an optoelectronics experiment using a digital holographic technique is implemented, as shown in **Figure 1**.

## **2.1 Fingerprint database**

From the biometric perspective, fingerprints contain essential patterns like arches, ridges, and whorls on the surface of a finger which are unique to the person. In our study, we use samples of the fingerprint from the fingerprint verification competition (FVC) database, as reported in [66]. The 'FVC' term signifies a fingerprint verification competition. This database has eight sets of fingerprint impressions of 100 users which are captured and collected using different sensor-based technologies. Features of the fingerprint images from the dataset have been extracted with pixels 300 480 and a resolution of 512 dots per inch (dpi). From an imaging perspective, the fingerprint is employed in a digital holographic-based setup as shown in **Figure 1** and its detailed process is explained in Section 2.2.

## **2.2 Recording process of the biometric hologram**

In order to capture fingerprint image hologram using the experimental setup as shown in **Figure 1**, the optical beam emerging from the He-Ne laser is initially collimated through spatial filtering (SF) operation and then separated into the object arm and the reference arm with the use of a beam splitter (BS1), which is directed with the help of mirrors (Ms) and finally combined at the BS2. The light that passes from the fingerprint object is known as the object beam, while another beam O(x,y) that comes from the reference arm is denoted as the reference beam U(x,y). Several techniques for the acquisition of fingerprints are widely investigated by researchers in security and optical imaging-related applications. In our optical configuration, we use fingerprint images of a person from a public biometric dataset as reported in [66]. In order to perform transmission imaging, fingerprint features are displayed on the transparent sheet of size '1 cm 1 cm' which shows high contrast features for

**Figure 1.** *Optoelectronic experimental setup: BSs: beam splitters, Ms: mirrors, SF: spatial filtering.*

**Figure 2.** *Recorded fingerprint hologram.*

recording as per the detailed procedure reported in our previous work [32, 33, 57]. In the object arm, the fingerprint images of size '1 cm � 1 cm' are employed at a distance'*d*' from the charge-coupled device (CCD) device [32, 33, 57]. As a result, this optical configuration makes it practically more suitable for optical imaging as well as information processing using digital holographic techniques in comparison to conventional fingerprint acquisition methods as described in [57]. In the process of recording, when light rays from a He-Ne laser strike the fingerprint object it causes diffraction, scattering, and absorption. This phenomenon carries signifying information about the object's amplitude and shape, which further interfered with the reference beam that is recorded by the CCD camera. The recorded interference pattern contains the complete information on the fingerprint object shown in **Figure 2**, which is stored in the computer and coined as a digital hologram. This process can be mathematically expressed as:

$$\begin{aligned} \mathsf{H}(\mathbf{x}, \mathbf{y}) &= \left| \mathsf{O}(\mathbf{x}, \mathbf{y}) + \mathsf{U}(\mathbf{x}, \mathbf{y}) \right|^{2} \\ &= \mathsf{O}(\mathbf{x}, \mathbf{y}) \mathsf{O}^{\*}\left(\mathbf{x}, \mathbf{y}\right) + \mathsf{U}(\mathbf{x}, \mathbf{y}) \mathsf{U}^{\*}\left(\mathbf{x}, \mathbf{y}\right) \\ &+ \mathsf{O}(\mathbf{x}, \mathbf{y}) \mathsf{U}^{\*}\left(\mathbf{x}, \mathbf{y}\right) + \mathsf{U}(\mathbf{x}, \mathbf{y}) \mathsf{O}^{\*}\left(\mathbf{x}, \mathbf{y}\right) \end{aligned} \tag{1}$$

As given in Eq. (1), the 'H x, y ' is termed as the digital hologram and '\*'shows the complex conjugate operation. The recording parameters for the fingerprint hologram are given as wavelength *λ* = 632.8 *nm*, the distance *d =* 0.29 *m,* and pixel sizes 4.65 *μm* � 4.65 *μm* of the CCD (Lumenera's Infinity2, 1360 � 1024 pixels).

### **2.3 Reconstruction process of the fingerprint hologram**

In order to reconstruct the fingerprint features from the recorded hologram as shown in **Figure 2**, the reconstruction processes using the Fresnel-Kirchhoff integral are employed numerically, which makes it free from the zero order term in separating the real and the virtual images [32, 33, 54–57] as:

$$D(v, u) = \frac{i}{\lambda} \left| \bigcap\_{\substack{\alpha \\ -\infty}}^{\infty} H(\alpha, y) \, E\_R(\alpha, y) \right| \, \frac{\exp\left(-i \, \frac{2\pi}{\lambda} \rho'\right)}{\rho'} \, d\alpha \, dy \tag{2}$$

$$
\rho' = \sqrt{\left(\mathbf{x} - \mathbf{v}'\right)^2 + \left(\mathbf{y} - \mathbf{u}'\right)^2 + d^2} \tag{3}
$$

where *D(v, u)* shows the reconstructed object, *ER* refers to the plane wave, and ρ' represents the distance between the recording plane (*x, y*) and the reconstruction plane (*v', u'*), respectively. It can be noticed that the process of reconstruction is completely carried out digitally. From the reconstructed object as demonstrated in **Figure 3**, the real fingerprint image of size 146 � 146 pixels is extracted in our analysis. The reconstructed fingerprint object results in a complex field which is further separated in terms of the intensity and phase distribution:

$$D(v, u) = A(v, u) . \exp\left(i\phi(v, u)\right) \tag{4}$$

$$A(v, u) = \operatorname{Re} \left[ D(v, u)^2 \right] + \operatorname{Im} \left[ D(v, u)^2 \right] \tag{5}$$

$$\mathcal{Q}(v, u) = \arctan \frac{\text{Im}[D(v, u)]}{\text{Re}[D(v, u)]} \tag{6}$$

The reconstructed object clearly reproduces the fingerprint pattern as shown in **Figure 3a** while the phase obtained from the same hologram is represented in **Figure 3b** which shows significant information on the fingerprint pattern as well as some variation of thickness over the field of view. Therefore, both pieces of information clearly exhibit the significant features of the fingerprint biometric.

Furthermore, it is evident that the obtained phase is utilized to construct a phase mask (PM) with phases uniformly distributed in the region [0, 2π] as:

$$\text{Phase Mask} = \exp(\text{i}2\pi\mathcal{Q}(\nu, u))\tag{7}$$

**Figure 3.** *Reconstructed features: (a) amplitude distribution and (b) phase distribution.*

*Biometric-Based Optical Systems for Security and Authentication DOI: http://dx.doi.org/10.5772/intechopen.1002025*

**Figure 4.** *Generated fingerprint phase mask (PM).*

The generated phase mask is full of speckle patterns and randomness, as shown in **Figure 4**. This is also unique to the person because of the associated fingerprint biometrics.

Our previous works have shown that the biometric keys from fingerprint hologram are a promising candidate for image encryption. A detailed description of the biometric key characteristics, such as uniqueness, randomness, and robustness, is recently reported in our published work [32–34, 57]. Motivated by the utility of biometric keys, the authors presented a cryptosystem for image encryption and decryption.

## **3. Basic cryptography in the perspective of biometric authentication**

In the domain of data security, the public key cryptographic technique is used to secure the information using the public keys (KPublic) and the private keys (KPrivate) [53]. The cryptographic process between Alice and Bob is shown in **Figure 5**, which can be explained as:


**Figure 5.**

*Basic public key cryptography for encryption: P = plaintext, E = encrypted or ciphertext, and f = processing algorithm.*

The purpose of the cryptographic process is to convert plaintext information into ciphertext. Moreover, its security strength depends on keys and processing algorithms which are not linked with the user's identity [53]. In general, security systems use token, ID, and password to authenticate the person but still suffer from several issues and limitations with regard to information security as well as insufficient database to prevent unauthorized access [5]. In order to implement a biometric-based authentication approach, the biometrics of a person must be first registered into the system that works only for an authorized person and it would not work if a person is not registered. For this purpose, a fingerprint hologram of a person using a digital holographic process is utilized, as shown in **Figure 6**. The digital process for recording, as well as retrieval of the keys, makes it safe, secure, and accessible for encryption and decryption processes. In addition, the use of experimental parameters results in additional security for the system [32–34, 57].

In view of cryptography using a biometric perspective, Alice uses her biometric keys retrieved from fingerprint hologram for encoding the plaintext information, and Bob confirms Alice's biometric keys by matching them to the registered database so that it can assure the ciphertext coded by Alice [33]. In this way, this strategy satisfies the criteria of asymmetric cryptography with authentication. The rules of the system can be elaborated as:


**Figure 6.** *Cryptography perspective using biometrics.* 3. In order to decode, Alice needs the simultaneous presence of the private keys and the availability of Bob's fingerprint hologram to obtain biometric keys.

Hence, the main contribution of this chapter is to present an optical nonlinear cryptosystem by involving biometric authentication using a fingerprint hologram. The authors evaluated measures of the optical cryptosystem process in achieving keys in terms of public and private keys for encryption and decryption with higher levels of security.

## **4. Optical cryptosystem using biometric keys**

This section presents algorithms for encoding of the image by the use of biometric keys.

#### **4.1 Encryption process**

To encrypt the input information using the optical cryptosystem, a preprocessing layer of the phase-retrieval algorithm using biometric keys generated from fingerprint hologram has been included, and then the PTFT scheme is employed. The flow diagram of the proposed encryption system is shown in **Figure 7**.

In order to do this, the input image (*I*) is initially encoded by involving the biometric keys from the fingerprint hologram. This encoding applies constraints as fingerprint amplitude by replacing the amplitude in the Fourier domain, while the Fourier phase is kept unchanged [31]. This process implements iteratively back and forth between the object domain and the Fourier domain. The iteration number is

#### **Figure 7.**

*Flow diagram of the proposed encryption scheme.*

decided between the input image (*I*) and the retrieved image (*I* 0 ) by measuring the correlation coefficient (*CC*) as:

$$\text{CC} = \frac{\sum\_{\mathbf{x}=1}^{M} \sum\_{\mathbf{y}=1}^{N} (I(\mathbf{x}, \mathbf{y}) - \bar{I}) \left(I'(\mathbf{x}, \mathbf{y}) - \bar{I}'\right)}{\sqrt{\sum\_{\mathbf{x}=1}^{M} \sum\_{\mathbf{y}=1}^{N} (I(\mathbf{x}, \mathbf{y}) - \bar{I})^2} \sqrt{\sum\_{\mathbf{x}=1}^{M} \sum\_{\mathbf{y}=1}^{N} \left(I'(\mathbf{x}, \mathbf{y}) - \bar{I}'\right)^2}} \tag{8}$$

As shown in Eq. (8), the average values of the input image (*I x*ð Þ , *y* ) and the retrieved image (*I* 0 ð Þ *<sup>x</sup>*, *<sup>y</sup>* ) are represented as *<sup>I</sup>* and *<sup>I</sup>* 0 , respectively. The domain ð Þ *x*, *y* represents information in the image plane, while *M* and *N* show the row and column of the image. The CC values are plotted with the number of iterations that illustrate the error between the decrypted image and the input image continuously keeps going down as the number of iterations increases. This process facilitates the retrieval of better-quality images, as shown in **Figure 8**.

From the retrieved image as shown in **Figure 8**, when the CC values reach the desired level (≥ 0.998) then the iteration process is stopped and its output (*ψk*) is combined with fingerprint phase (*ϕfingerprint*Þ (as)

$$
\mu\_k \otimes \phi\_{\text{fingerprint}} = \Theta \tag{9}
$$

Here, ⊗ shows the multiplication operator*.* This resultant information (*ϴ*) is further distributed into two parts:

(a) Binary key (*B*): For binary key (*B*), the resultant information ð Þ *ϴ* is coded using the following mathematical identity:

$$B = \begin{cases} 0, & \Theta < 0 \\ 1, & \Theta \ge 0 \end{cases} \tag{10}$$

If *ϴ* is greater than or equal to zero then it is set to be 1 while if *ϴ* is less than zero, it is denoted by zero. This result is coined as a binary key and kept as the private key, which is protected using the pixel scrambling operation to make it safe for transmission [33].

(b) *C* = abs(*ϴ*): The absolute information is just an intensity distribution that looks like a speckle, in which the fingerprint biometric features are deeply hidden.

**Figure 8**

*(a) Graph between the number of iterations and correlation coefficient (CC) and (b) retrieved image*

*Biometric-Based Optical Systems for Security and Authentication DOI: http://dx.doi.org/10.5772/intechopen.1002025*

**Figure 9.**

*Phase-truncated Fourier transform (PTFT) scheme for encryption.*

Moreover, to obtain the ciphertext (*E*), the information '*C*' is processed using the two encryption keys (*RPM*1 and *RPM*2) at the input plane and the Fourier plane using the PTFT operation, as shown in **Figure 9**. This process is expressed as:

$$E1 = PT\{FT\left[C \cdot RPM1\right]\}\tag{11}$$

$$E = PT \{ IFT \left[ E1 \cdot RPM2 \right] \} \tag{12}$$

From the process, the two decryption keys (*D*1 and *D*2) are obtained as:

$$D2 = PR\{FT\left[C \cdot RPM1\right]\}\tag{13}$$

$$D1 = PR\{IFT\,\left[E1 \cdot RPM2\right]\}\tag{14}$$

From the reported process, the three keys are obtained during encryption processes, which are kept as the private keys to decode the information. As a result, our system involves the use of public keys to encode the input data that can only be decoded using the private keys while the fingerprint keys corroborate the user specificity throughout the optical encryption and decryption processes.

#### **4.2 Decryption process**

In order to retrieve the information, the fingerprint hologram and the reconstruction parameters are provided to be known to the user, which further enables the process to recover the original information. This is only possible if both the provided information is correct. Therefore, this processing step has the capability to confirm the authenticity of the person. First, the decryption process is performed to retrieve the information (*C*) from the ciphertext (*E*), as shown in **Figure 10**.

$$E1 = PT\{FT[E \cdot D1] \}\tag{15}$$

$$\mathbf{C} = PT \{ \text{IFT } [\mathbf{E} \mathbf{1} \cdot \mathbf{D} \mathbf{2}] \} \tag{16}$$

**Figure 10.** *Phase-truncated Fourier transform (PTFT) scheme for decryption.*

**Figure 11.** *Flow diagram of the decryption process.*

**Figure 12.**

*Optical setup for decryption: CCD: charge-coupled device, SLM: spatial light modulator, d: focal length of lenses, and SF: spatial filtering.*

For decryption, the initially encoded information (*ϴ*) is first obtained from the ciphertext (*C*) by applying the binary key and the scrambling key. As shown in **Figure 11**, the biometric keys as the phase *<sup>Φ</sup>Fingerprint* data and the magnitude (*P*<sup>Þ</sup> are involved to obtain the input image (*I*). These decryption steps are mathematically given by

$$\Theta = \mathbf{C} \otimes B = ab \mathbf{s}(\Theta) \otimes B \tag{17}$$

$$
\Psi \varphi\_k = \Theta / \Phi\_{\text{Fingerprint}} \tag{18}
$$

$$I = IFT(|P|\exp(i\varphi\_k))\tag{19}$$

where, the term 'abs' represents the absolute value of a matrix.

**Figure 12** shows the implementation of the optical experimental setup for decrypting the information using electronic devices such as spatial light modulators (SLMs) and CCD, which are controlled by a personal computer. At the beginning of the process, the combined data of the encrypted information (E) with the private key (D1) are shown in the SLM1 device and then illuminated by the He-Ne laser beam to carry out optical Fourier transform (FT). This result combined with the second private key (D2) is shown in the SLM2 device, which is further optical FT. In the last step, the obtained information is involved digitally using the binary key (B) and biometric keys. By performing optical FT, the CCD captures the decrypted information.

## **5. Results and discussion**

This section evaluates the performance of our system by performing a number of computer simulations on a MATLAB platform. The obtained results of the system validate the effectiveness of our scheme that exhibits higher security with keys management and distribution.

## **5.1 Input data**

In this section, the computer simulation results of our system are presented. In our experiments, the size of all images employed is 146 146 pixels. The input image to be encrypted and the generated biometric keys from the fingerprint hologram are shown in **Figure 13**a–c. The RPM keys for the PTFT scheme are shown in **Figure 13**d–e. Our system obtains ciphertext, as shown in **Figure 13**f.

## **5.2 Decryption results**

To evaluate our system, a series of decryption experiments are carried out. In the first experiments, we wished to recover the input information against unauthorized attempts using the possible key combinations in **Figure 14**a–e. Simulation results indicate that **Figure 14a** shows the truly decrypted input information using all keys in the correct order with authentication. **Figure 14b** shows the recovered image using the private keys (D1 and D2) in the wrong positions. **Figure 14c** represents the recovered information when no keys are employed for decryption. **Figure 14d** displays the obtained image by applying any arbitrarily generated binary key. **Figure 14e** represents the decrypted noisy data when the biometric phase key is wrongly employed. In addition, to investigate the quality of the recovered data, the meansquare error (MSE) measures for **Figure 14**a–e are evaluated as 1.5740 <sup>10</sup><sup>4</sup> , 0.2132, 0.1313, 0.1163, and 0.2609, respectively. Moreover, the CC parameter between the

**Figure 13.** *(a) Input image. (b) Fingerprint AM key. (c) Fingerprint phase key. (d) RPM1 key. (e) RPM2 key. (f) Ciphertext (*E*).*

**Figure 14.**

*Decryption results using (a) all correct keys, (b) keys (D*1 *and D*2*) in wrong positions, (c) no keys, (d) wrong binary key, and (e) different fingerprint phase keys.*

input image as shown in **Figure 13a**, and the retrieved image as displayed in **Figure 14a** is calculated as a value of 0.998.

#### **5.3 Effect of quantization**

In the next step of experiments to make digital simulations closer to the true physical process, we evaluated the influence of the quantization at different quantization levels in the process [33]. For this purpose, the encrypted data shown in the SLM device and the retrieved information were captured by a CCD camera that is quantized at different levels of quantization such as 5 bits, 8 bits, 10 bits, 12 bits, and 16 bits, respectively. In this context, the obtained images are displayed in **Figure 15**. To examine the effect of quantization, the CC and MSE values are calculated. As shown in **Table 1**, the results illustrate the high accuracy of our system.

### **5.4 Robustness of the binary key**

In this section, we evaluated the system performance against the binary key. As explained in Section 3.2, the binary key is produced as one of the private keys that are secured by pixel scrambling operation. Using this approach, if the attacker knows the total number of pixels present in the key, this is not sufficient to know the exact distribution of zeros or ones. Keeping in view this point, an attempt is performed using the true binary values of the key and its wrong distribution. We have illustrated results as shown in **Figure 16a** and **b** by plotting MSE and CC values between the

*Biometric-Based Optical Systems for Security and Authentication DOI: http://dx.doi.org/10.5772/intechopen.1002025*

#### **Figure 15.**

*Decrypted image for different quantization levels: (a) 5 bits, (b) 8 bits, (c) 10 bits, (d) 12 bits, and (e) 16 bits.*


**Table 1.**

*Showing performance at different quantization levels.*

#### **Figure 16.**

*Graph to illustrate robustness of the binary key (a) mean-square error (MSE) curve and (b) correlation coefficient (CC) curve.*

original image and decrypted images. Experimental results indicate that the true input image is recovered if the binary key is correct while other retrieved images using the wrong binary key represent noisy information.

## **5.5 Security analysis and discussion**

In this section, we evaluated the system performance against iterative phaseretrieval algorithms as reported by researchers [16, 19]. In our work, the fingerprint object information about the amplitude and the phase keys is exploited for encrypting the input information. In this context, the inclusions of the biometric keys make the encryption process relevant to be user-specific. This implication breaks the linearity and enhances the nonlinearity and complexity of the encryption process [32, 33]. In order to access the image using the attack algorithm, the inherent noise goes on boosting at each iterative step. Thus, our system provides resistance against the attacks. In order to prove this point, cryptanalysis was conducted against the attacks such as the special attack and known-plaintext attack (KPA). To illustrate the attack process the special attack is used to break the cryptosystem with the two encryption keys RPMs and the ciphertext, which are allowed to be known to the attacker. This attack is based on a two-step iterative algorithm as mentioned in [16, 19]. Using known resources as shown in **Figure 13**, the attacker retrieved the information as shown in **Figure 17a**. Moreover, in a similar manner, our system performed cryptanalysis for the KPA whose results are shown in **Figure 17b**. Thus, our systems indicate the robustness of the proposed scheme against both the special attack and the KPA.

## **5.6 Comparison with other schemes**

Finally, we present a comprehensive comparative performance of our system with the recently published schemes [20, 26, 27, 30, 31, 40, 43–46]. Alarifi *et al.* [20] introduced an optical PTFT-based asymmetric encryption algorithm for biometric template protection using a cancellable approach. Takeda *et al.* [26] reported a smart card holder authentication based on the DRPE scheme, in which the encryption key as

**Figure 17.** *Attack results: (a) special attack. (b) Known-plaintext attack (KPA).*

## *Biometric-Based Optical Systems for Security and Authentication DOI: http://dx.doi.org/10.5772/intechopen.1002025*

Fourier phase data of the fingerprint is involved, which gives rise to issues of wrong authentication due to positional variation of fingerprint at the enrollment and verification stages. Saini *et al*. [27] worked on optical security using a DRPE system that uses encryption keys linked to the biometrics of a user which offers a solution to keys distribution. Tashima *et al*. [30] presented an improved DRPE security by avoiding the known-plaintext attack. Mehra *et al.* [43] reported recently an asymmetric system for encrypting the fingerprint image based on quick response (QR) decomposition in the domain of gyrator wavelet transform. Castro *et al*. [45] proposed an encryption scheme for medical images based on fingerprint authentication. Souza *et al.* [44] reported an optical encryption technique in which passwords and tokens were included as multifactor for authentication. Chang *et al.* [46] developed an asymmetric encryption scheme using optical scanning cryptography by combining elliptic curve cryptography, which also helps to achieve keys management. In comparison with the reported encryption algorithms for information using biometrics as reported in [20, 26, 27, 30, 31, 40, 43–46], our scheme uses the biometric keys obtained from the fingerprint hologram, which is protected by experimental parameters, which help to enable verification and authentication at decryption stage. The digital approach of biometric key generation is safe and secure for encryption and decryption processes. Based on the results obtained from our system, it can resist several types of potential attacks because of its complexity, nonlinearity, and robustness in comparison to other reported cryptosystems. The obtained outcomes in **Table 2** demonstrated that the security performance measures of our system are superior and reliable as compared to those mentioned in the previously published work. Our system has a simple experimental implementation that has included the involvement of optoelectronics components and devices. Thus, our system is efficient in terms of security including the distribution of keys with information authentication.



**Table 2.**

*Comparative study of our work with recent optical cryptosystems.*

## **6. Conclusions and future work**

In this chapter, we have described the optical nonlinear cryptosystem using fingerprint biometric keys based on phase retrieval and the PTFT scheme for image encryption. It also showed how fingerprint biometrics can be captured based on optical implementation using digital holography in a practical manner without inconvenience to the person. Our system has the salient features that the capability of biometric key retrieval from fingerprint hologram is led to authenticate the person who possesses the ciphertext for decrypting the information. In addition, our system meets the criteria of asymmetric encryption approach which help to provide a solution for the key management and distribution in the encryption and decryption processes. This system has simple implementation either numerically or optically. As a result, we could mention clearly that our system has validity and robustness against unauthorized attempts and well-known attacks.

In future work, a study about the use of the optoelectronic system to record a hologram of the real fingerprint pattern of a person will be performed in order to explore the scientific potential of the emerging field and make clear the validity of our cryptosystem by evaluating security performance.

## **Acknowledgements**

This work was supported by the National Natural Science Foundation of China (61875129 and 62061136005).

## **Conflict of interest**

The authors declare no conflict of interest.

*Biometric-Based Optical Systems for Security and Authentication DOI: http://dx.doi.org/10.5772/intechopen.1002025*

## **Author details**

Gaurav Verma<sup>1</sup> \*, Wenqi He2 and Xiang Peng<sup>2</sup>

1 Department of Electronics and Communication Engineering, B.K. Birla Institute of Engineering and Technology, Pilani, Rajasthan, India

2 College of Physics and Optoelectronic Engineering, Shenzhen University, Shenzhen, P.R. China

\*Address all correspondence to: gaurav.sgs85@gmail.com

© 2024 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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## **Chapter 10** Secure Smart Card IP

*El Hadj Youssef Wajih*

## **Abstract**

This book chapter highlights the embedded system security by designing a secure smart card IP. Indeed, the smart card is recognized as a privileged means of both storing confidential information and performing secure transactions. Its main role comes from the security it provides inside the system it is a part of. The specification and development of the elaborate smart card architecture are very delicate steps that require the pooling of strong competences in computer security, electronics, and also cryptography. The developed secure smart card IP model is based on the Gaisler LEON2 processor. To ensure a maximum level of security and optimal performance, a hardware integration of cryptographic mechanisms through instruction extensions was carried out. The integrated mechanisms allow for ensuring confidentiality, hashing, random number generation, and digital signature. The proposed smart card IP was implemented on a reconfigurable FPGA platform, and then on ASIC using 40 nm CMOS technology. A surface area of 1.08 mm<sup>2</sup> with a consumed dynamic power of 23 mW for a frequency of 13.5 MHz was achieved.

**Keywords:** cryptography, smart card, Leon2 processor, FPGA, ASIC

## **1. Introduction**

Smart cards, as embedded systems utilized by consumers, play a crucial role in safeguarding the security of their respective systems. However, the potential of smart cards has significantly expanded with the introduction of multi-application cards, offering a diverse range of services such as GSM, electronic wallets, and loyalty programs [1]. To ensure confidentiality, security, and authentication, the integration of cryptographic mechanisms into smart cards is of utmost importance.

With the increasing diversity and openness of smart card systems, a race ensues between smart card developers and attackers, aiming to discover vulnerabilities and bolster security measures. Consequently, it becomes imperative to continuously update smart card security in order to counter hardware attacks effectively. This necessitates the implementation of robust countermeasures capable of detecting and thwarting attempts to manipulate the card's behavior or exploit techniques like spatial, temporal, or information redundancy [2].

The central objective of this chapter is to design a secure smart card Intellectual Property (IP). This endeavor encompasses the careful selection of appropriate hardware components, comprising essential blocks, and the development of an efficient interconnection system. Throughout the design process, thorough consideration is given to performance criteria, adherence to industry standards, specific characteristics pertinent to smart cards, and any applicable constraints. Each individual block of the design will undergo meticulous evaluation at multiple stages of the design chain, thereby ensuring the integrity and efficacy of the overall system.

## **2. State of the art and objectives**

A smart card is a plastic card that contains an electronic circuit capable of securely manipulating information, such as storing and calculating. The evolution of smart card technology has been marked by various significant dates. In 1974, Roland Moreno, leading a research team for Innovation, created the first memory-based smart cards. In 1977, the memory card advanced into a microprocessor card. In 1980, the French company Bull produced the CP8, the first microprocessor card used for early trials of bank cards [3]. By 1984, the first health smart card was introduced, and the micro-module card emerged in the same year to create the first telephone cards. In 1996, the publication of the Java Card 1.0 specification by Schlumberger simplified smart card programming. The following year, Bull, Sun, and Gemplus collaborated with Schlumberger to found the Java Card Forum, marking the beginning of smart card standards and specifications [4].

## **3. Application areas**

The fields of application of smart cards have continued to grow. Initially designed as simple token carriers, such as telephone cards, they first became secure document carriers (health card) before becoming mobile code carriers (Java Card). The major application areas of microprocessor cards are [5]:


## **4. Standards and characteristics**

## **4.1 Standardization level of smart cards**

The level of standardization of the smart card is remarkable. Whether it is a bank card or a SIM card, it will be recognized by the reader device (mobile phone or bank ATM). Three types of parameters are standardized: physical parameters that set the size and positions of the chip and its contacts, electrical parameters specifying the supply voltages, various pins, and software parameters defining the communication mode with the card.

*Secure Smart Card IP DOI: http://dx.doi.org/10.5772/intechopen.112491*

The standardization of smart cards has resulted in the publication of international standards. The classic or contact smart card is standardized by the ISO7816 standards (-1,-2,-3, and -4). These standards define respectively, the physical characteristics of the card, the position and pinouts, the electrical levels, and the various basic commands [6]. On the other hand, contactless cards are governed by the ISO14443 standards (-1,-2, and -3). They contain specifications for the part, the electrical interface, as well as the communication and collision management protocol [7].

## **4.2 Different types of smart cards**

The cards are divided into two families: contact cards (memory or microprocessor) and contactless cards [8].

#### **4.3 Contact cards**

A contact smart card has eight visible connectors. Three connectors are reserved for future use (RFU: Reserved for Future Use). The electrical power supply (pins VCC and VSS, usually 5 V) and the clock at around 3.5 MHz (Clock) are included. The smart card can be rebooted by the reader by briefly setting the RESET pin to 0 (hot reset). Communication between the chip and the reader can be in serial mode, bit by bit, on the input/output pin. The Vpp pin was previously used for programming the chip (**Figure 1**). There are two types of contact smart cards: memory cards and microprocessor cards [9].

### *4.3.1 Memory cards*

This type of card consists essentially of an EEPROM memory that does not require high programming voltage. This memory is generally programmable only once (OTPROM: One Time Programmable). Memory cards are used in the field of telephony where the programming principle is irreversible.

### *4.3.2 Microprocessor cards*

This type of smart card is composed of a chip used to perform complex functions. It can be considered as a mini-computer that includes all the components that are

**Figure 1.** *Pinout of a contact smart card.*

usually found on a PC motherboard on a system-on-chip (SoC). This chip includes a microprocessor (8-bit, 16-bit or 32-bit), a memory area (ROM, EEPROM, RAM), as well as several calculation devices used, among others, for cryptography (such as RSA, DES, Random, etc.) and a data transmission interface (UART). This chip has a surface area of less than 25 mm<sup>2</sup> . They are particularly used in bank cards, health insurance cards, but also SIM cards (Subscriber Identity Module) used in mobile phones.

## **4.4 Contactless cards**

Contactless smart cards or RFID (Radio Frequency Identification Device) cards are not directly connected to the reader by a physical contact; the connection is made through an electromagnetic field. To function, the contactless card must be placed at a distance of less than 3 cm from the reader. To be powered, the card uses inductive or capacitive coupling. The clock used for card synchronization can be internal, and the inputs/outputs are made by modulation of the power supply. This type of card is used for access control systems, animal identification, containers, consumer products, etc.

## **4.5 Combined cards (Combi)**

Combi cards, also referred to as dual interface cards, are cards that integrate contact and contactless technologies onto the same chip. They possess two distinct interfaces that enable their use in both contact and contactless modes, making them versatile and ideal for various applications like access control, public transportation, and electronic payment systems. The contact interface provides high security, while the contactless interface offers convenience and faster usage. Due to their ability to provide a seamless transition between contact and contactless modes, the use of combined cards is increasingly prevalent.

## **5. Steps of manufacturing**

The manufacturing process of the electronic chip follows the same process as an integrated circuit, starting from the design and development phase, to the extraction of the wafer using specific CAD tools. These tools are used to make etchings on the wafer to produce the intended functionality of the chip. After the testing phase, the sawing process and finally the extraction of the chips are initiated [10].

The assembly of the chip onto the metal part of the card is illustrated in **Figure 2**. The legs of the chip are bonded to those of the protective module (side A) using a lowresistance wire. Side B represents the external contact support of the chip ensuring the connection with the reader.

**Figure 2.** *Chip module realization.*

#### **Figure 3.**

*Assembly processes for smart cards.*

The chip module is then inserted into the PVC card. A cavity is excavated to fix the chip module (**Figure 3**).

Pour the manufacturing of the contactless smart card, the steps are similar to the contact smart card. However, an antenna is needed to facilitate data exchange by chemical etching of copper or aluminum on the PVC card.

## **6. Industrialized smart cards**

The smart card industry has been constantly evolving in recent years thanks to the advancement of semiconductor technology as well as the widespread use of smart cards in modern society, such as in e-commerce, telecommunications, identification, access control, health, banking, entertainment, and transportation, etc.

The architectures proposed by different manufacturers depend on the application domains to which they are dedicated. The processor speed and memory block sizes (ROM, RAM, and EEPROM) integrated into the card's chip vary from one manufacturer to another. Industrialized cards may include 8/16/32-bit RISC architecture processors, clocked at frequencies ranging from 4 MHz for older versions up to 60 MHz for recent versions (**Table 1**) [11, 12].

Secure smart cards also exist in the global market with the integration of cryptographic modules ensuring the security of information stored in the chip as well as securing transmitted data.

## **7. Proposed smart card IP**

The architecture consists of a 32-bit microprocessor with a 5-stage pipeline, which forms the core of our IP, memory blocks (ROM, RAM, EEPROM), a 32-bit cryptoprocessor (ECDSA, AES, RNG, SHA), and a communication interface (UART) connected to the card contact, ensuring communication with the reader (**Figure 4**).

During the design of the proposed smart card, standard mechanical and electrical constraints are taken into consideration [1]:

• Hardware Configuration: 32 KB ROM (for OS), 64 KB EEPROM (machine codes, information), and 8 KB RAM (data).


#### **Table 1.**

*Characteristics of some industrialized smart cards.*

#### **Figure 4.** *Proposed IP smart card architecture.*


## **7.1 Choice of the processor**

Currently, there is a wide range of dedicated processors for smart cards in the semiconductor market. Among this wide range, we can mention the AVR processor from Atmel, SecuCalm16 from Samsung, sc300, Cortex M0/3, and ARM7TDMI from ARM [13], the ST22XJ64 from STMicroelectronics, and SLE 88CX720P from Infineon Technologies [11–19].

In recent years, Gaisler Research, under contract with the European Space Agency (ESA), developed a processor called LEON2 [20]. It is used in embedded systems on board satellites. The LEON2 processor is available in two versions: Standard and Faulttolerant. This processor is defined by a freely usable IP described in VHDL RTL (**Figure 5**).

The interest in the Leon2 processor is demonstrated by the recent production by ATMEL of a component for space applications based on this processor [19]. It is also used in an increasing number of applications thanks to its characteristic of being a freely usable IP. LEON2 was the core of an identification portable system described in [21, 22], and it has also been used to manage a wireless communication application in [23].

Apart from the license, several characteristics led to the choice of LEON2 as the core of our application:


#### **7.2 Cryptographic mechanisms**

An electronic smart card, whether it is a SIM card, credit card, access card, transportation card, or health card, includes a microprocessor that can store sensitive information. Hence the need to integrate security mechanisms and cryptographic means to ensure that information has not been altered during communication (integrity), to avoid disclosure of their content to third parties (confidentiality), and to identify the author of a document or transaction (authentication).

Modern electronic systems such as smart cards increasingly incorporate components called IPs that can be inserted into any type of design and which provide certain functionalities whose complexity can reach the heart of the processor. The data path of the chosen LEON2 processor is 32-bit, hence the need to adapt the different cryptographic modules. In this work, four IPs providing cryptographic mechanisms are proposed: SHA\_1, RNG, ECDSA, and AES. The architectures of the developed IPs are 32 bits. Constraints related to the smart card are taken into consideration during the design of these IPs, which are speed, surface area, and power consumption.

#### *7.2.1 Integrity mechanism*

Integrity is a technique used to preserve the integrity of information. It is ensured by a function called hashing, which generates a fingerprint (or hash) of a message. The main functionality of hashing is to verify that the message received by the recipient has not been altered during transmission. This mechanism is also used for digital signature of the message. In this work, the SHA (Secure Hash Algorithm) hashing standard was used. It was designed by the United States National Security Agency (NSA) and published by the National Institute of Standards and Technology (NIST) in 1993. The SHA\_1 hashing algorithm generates a 160-bit compressed output from a message of length less than 264-bits [24] with a block size of 512 bits. The first step of this algorithm is to fill or add (Padding) bits to the message M in such a way that the length of the resulting message is a multiple of 512 bits. Then, 80 logical functions defined on words and 80 32-bit constants are performed. These functions produce 32-bit words as output and take three 32-bit words as input [24]. The SHA\_1 hashing function is described by a 32-bit architecture as follows (**Figure 6**).

The message to be hashed is loaded in blocks of 32-bits through the input interface. Then, the words are processed on 32-bits. Finally, an output interface generates 5 blocks of 32-bits constituting the hash (160-bits).

#### *7.2.2 Random number generator mechanism*

Secure random number generation (RNG) is an essential function in cryptography and for computer security in general. Cryptographic mechanisms are public, and their security is based on the secrecy of the encryption key (Kerckhoffs' principle). This key must be unpredictable and generated automatically to prevent the possibility of disclosure by an unauthorized third party. Modern cryptographic systems, such as digital signatures, rely heavily on random number generators for producing encryption keys [25].

A random number generator takes an input value, called a seed, and produces an output number that is the result of a computational algorithm. These functions are generally resource-intensive and time-consuming. Pseudo-random generators involve *Secure Smart Card IP DOI: http://dx.doi.org/10.5772/intechopen.112491*

**Figure 6.** *32-bit SHA-1 function architecture.*

applying a non-linear function by combining several linear feedback shift registers (LFSR) of different sizes.

In this work, the pseudo-random generator W7, which is a standard for GSM communication, was used for key generation due to its performance (speed, complexity, and low power consumption). It is a stream cipher algorithm published in April 2002 by Thomas, D. Anthony, T. Berson, and G. Gond. The internal architecture of W7 consists of three Linear Feedback Shift Registers (LFSR) of respective lengths 38, 43, and 47 bits with periods of 2^38-1, 2^43-1, and 2^47-1. Modifications were made in this manuscript to generate keys of size 163 bits to adapt to the datapath of LEON2. Specifically, each register was subdivided into two 32-bit registers. An output interface is used to group the randomly generated bits into 6 blocks of 32 bits to generate a random key of 164 bits (**Figure 7**).

#### *7.2.3 Authentication mechanism*

Operations such as bank transactions, personal authentication, and access to workplaces require the signature of the concerned person. Especially, when they are conducted via an open system like the internet. Hence arises the need to design digital signature mechanisms for the authentication of individuals and companies making purchases or sales over the internet.

Digital signature seeks to digitally mimic a handwritten signature. It consists of a string of bits that depends on the message and a secret key known only to the signer. In practice, digital signature schemes use a hash function that generates a digital fingerprint of a message m to be signed.

There are several digital signature standards that have been developed, such as DSA (Digital Signature Algorithm), digital signature based on the RSA algorithm (Rivest, Shamir, and Adleman), and digital signature based on elliptic curves (ECDSA) which appear in standards ANSI X9.62, FIPS 186-2, IEEE 1363-2000, and ISO/IEC 15946-2 [26]. This scheme, known to be safe and efficient for data authentication, has been used since 2000 by many banks for customer authentication, having key sizes of the order of 163, 271, and 571 bits. It is dedicated to support with specific constraints for smart cards. The 32-bit architecture of the ECDSA digital signature scheme is illustrated by **Figure 8**.

**Figure 7.** *32-bit W7 random number generator architecture.*

The proposed architecture consists of a SHA\_1 hash block, a random number generator (RNG), a library of arithmetic operators over the Galois field GF(2n), and modular operations (inversion, multiplication, and addition) based on 32-bit architectures. This library is necessary to perform operations on elliptic curves as well as scalar multiplication KP, which represents the basic operation for the elliptic curve digital signature algorithm (ECDSA). The ENABLE signal initiates data input. The clock signals CLK and RESET enable the block to be synchronized, and the DONE signal indicates the end of the operation. A control unit is responsible for activating/deactivating the key pair generation process, as well as signature generation/verification.

### *7.2.4 Confidentiality mechanism*

The confidentiality mechanism ensures that information is made unintelligible to unauthorized individuals, entities, and processes.

In this work, the AES (Advanced Encryption Standard) algorithm is chosen to secure data stored in the smart card. It is a block cipher encryption/decryption algorithm, where messages are encrypted in blocks of 128 bits (16 bytes) with key sizes of 128, 192, or 256 bits. The key size defines its level of security, with larger key sizes

**Figure 8.** *32-bit ECDSA based digital signature architecture.*

providing higher security levels [27]. This algorithm has been chosen to be fully operational and secure in any type of environment, which encouraged us to opt for AES with a 128-bit key to ensure the confidentiality service of the smart card. The choice of this algorithm meets many criteria such as its robustness against potential attacks, high processing speed, low resource and memory requirements, and ease of implementation (SP Network) with great flexibility.

In the remainder of this chapter, we have chosen AES with a 128-bit key in its version with 10 rounds. Initially, the plaintext is combined with the first round key K0, equal to the key, through the ADDRoundKey function. Each of the first nine rounds consists of four transformations: SubBytes (4 32-bit SB (i) blocks), ShiftRows, MixColumns, and ADDRoundKey. The last round consists of the same functions as a regular round, except for the MixColumns transformation.

The 32-bit architecture of the AES algorithm is described by **Figure 9**. An Input\_Buffer input buffer allows loading the message to be encrypted (or decrypted) in 32-bit blocks. The 128-bit key is loaded onto 4 32-bit blocks. For decryption, the InvSubBytes (4 32-bit InvSB (i) blocks), InvShiftRows, and InvMixColumns functions are used. A control unit manages the activation and deactivation of the different blocks. An Output\_Buffer output buffer allows the encrypted message to be returned in 4 32-bit blocks.

## **8. Modified architecture of Leon2 processor**

Modifications were made to the block diagram of the Leon2 processor by adding a crypto-processor and external memories (PROM, SRAM, and EEPROM). These different blocks were developed in the previous sections. Unlike software implementation, which suffers from poor performance, the hardware implementation of cryptographic primitives is recognized to be more efficient in terms of speed, memory usage, and power consumption for embedded systems.

**Figure 9.** *32-bit architecture of encrypt/decrypt AES algorithm.*

#### **8.1 Cryptographic instructions set extension of the LEON2 processor**

A variety of work is focused on improving the security of processors and aims to extend cryptographic instructions. The work described in [28, 29] presents sets of elliptic curve instructions that have been incorporated into a variety of processors. In publications [30–33], the authors focused on extending instructions for a random number generator, cryptographic modules, symmetric cryptosystems, and the AES algorithm. Hardware implementation of cryptographic primitives is recognized to be more efficient compared to software implementation, in terms of speed, occupied surface, and power dissipated for embedded applications. Hardware implementation also ensures a higher level of security, as a circuit cannot be easily attacked. Hence, there is an interest in hardware implementation in the continuation of our work.

In this section, we will present the principle of integrating new instructions into the core of the LEON2 processor to support the developed cryptographic mechanisms (RNG, SHA, ECDSA, and AES). To achieve this, the entire unit (IU) of the LEON2 is extended by integrating cryptographic instructions through coupling hardware IPs to the processor's data path to extend its instruction set (See **Figure 10**).

There are several return paths from the different stages to the decoding and execution stages. The memory stage is connected to the data cache. The cryptographic unit (CU) grouping cryptographic primitives extensions is described in previous

## *Secure Smart Card IP DOI: http://dx.doi.org/10.5772/intechopen.112491*

**Figure 10.** *Modified architecture of Leon2 integer unit.*

sections. The cryptographic unit is implemented in parallel with the "ALU/Shifter" unit. The operands "op1" and "op2" of the cryptographic unit can be blocked at the input of the ALU/Shifter, as long as this unit is active. There are two input registers "rs1.data" and "rs2.data". Additional multiplexers on the return paths and output paths prevent the propagation of critical data.

## **8.2 Proposed instructions**

The LEON2 processor is a 32-bit SPARC V8 RISC architecture that has different instruction formats with three and two inputs and one output operand.

## *8.2.1 SHA\_1 instruction*

The SHA\_1 instruction consists of a 32-bit operand rs1 for inputting the message to be hashed in 32-bit blocks. The result is stored in the destination register rd on 32 bits. The principle of this instruction is shown in Figure II.22. The format of this instruction is as described by Eq. (1).

$$\text{SHA} - \text{1} \,\text{rs1} \,\text{rd} \tag{1}$$

### *8.2.2 RNG instruction*

The RNG instruction is a hardware instruction used to generate random numbers, and it does not take any operands. The result of this instruction, a 32-bit random

number, is stored in the destination register rd. The format of the instruction is simply (Eq. 2).

$$RNG \, rd \tag{2}$$

### *8.2.3 ECDSA instruction*

The proposed instructions for key initialization, generation, and verification of ECDSA digital signature are illustrated in Eqs. (3)–(5).

$$\text{ECTSA\\_INVAL\\_KEY } r\mathfrak{sl}, r\mathfrak{sl}, r\mathfrak{sl} \tag{3}$$

$$\text{ECTSA\\_SIZE1}, \text{rx2}, rd \tag{4}$$

$$\text{ECTSA\\_VERIFY } r\mathfrak{sl}, r\mathfrak{s}\mathfrak{2}, rd \tag{5}$$

These instructions have two source operands rs1, rs2, and one destination operand rd for the result. These three registers, predefined by the SPARC V8 processor core, have a size of 32 bits. The calculation parameters are entered in blocks of 32 bits. Therefore, to enter operands of 163 bits, 6 blocks of 32-bit size each are required. The result is stored in the destination register rd of 32-bit size.

#### *8.2.4 AES instruction*

The cryptographic instructions AES\_ENC and AES\_DEC (Figure II.25) use three registers: two for the source operands and one for the result. Their syntax is as presented in Eqs. (6) and (7):

$$A \text{ES\\_ENC} \qquad rs1, r32, rd \tag{6}$$

$$\text{AES\\_DEC } rs\mathbf{1}, rs\mathbf{2}, rd\tag{7}$$

## **9. Hardware implementation results**

#### **9.1 Implementation on FPGA platform**

In this section, the synthesis results of the cryptographic instruction set extension are performed using the Xilinx ISE tool on the VirtexV FPGA platform (XC5VFX70) and are given in **Table 2**. The characteristics of the different solutions developed are expressed in terms of frequency, LUTs Slice and FFs Lut pairs used which allows us to analyze the suitability of the proposed solutions for the smart card.

## **9.2 Implementation of ASIC**

Logical synthesis consists of transforming an RTL description into an interconnected network of logic gates that perform the desired functions. The system to be designed is decomposed into combinational logic and memory blocks. The SYNOPSIS Design Compiler software allows for synthesis and optimization using the DESIGN-ANALYZER tools (in graphical mode) and DC-SHELL (in command-line mode). During the optimization phase, the tool uses two constraint models: implicit constraints (imposed by the technology library) and explicit constraints imposed by


#### **Table 2.**

*Performance of smart card IP with modified Leon2 processor core.*

the user. The output result is a logical netlist represented in Verilog format. This format is also used to transport the netlist from the synthesis tool to the placement and routing tools.

The synthesis of the smart card IP is carried out with timing constraints for the 40 nm target technology. For the frequency ranges imposed by smart card standards, the proposed IP occupies an area of approximately 1.08 mm<sup>2</sup> with a dynamic power dissipation of no more than 23 mW for a frequency of 13.5 MHz.

## **10. Conclusions**

In this chapter, we have studied smart cards as a type of consumer embedded systems. Their main role comes from the security provided by smart cards inside the system to which they belong. After a thorough study of smart cards, the LEON2 processor from Gaisler was selected to develop a smart card IP. A hardware solution to emerging data security problems was presented, with cryptographic IPs providing confidentiality, hashing, random number generation, and digital signature using a 32 bit data path to meet the bus size of most existing smart card architectures on the market. These cryptographic functions were incorporated into the LEON2 processor instruction set, and external memory blocks were also integrated to design the proposed smart card IP.

To demonstrate our IP, we opted for hardware implementation on an FPGA platform, which provides a prototyping and evaluation support. Then, implementation on ASIC with 40 nm CMOS technology was carried out.

*Biometrics and Cryptography*

## **Author details**

El Hadj Youssef Wajih Faculty of Sciences of Monastir, Laboratory of Electronics and Micro-Electronics, Monastir, Tunisia

\*Address all correspondence to: elhadjyoussef.wajih@gmail.com

© 2024 The Author(s). Licensee IntechOpen. This chapter is distributed under the terms of the Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

*Secure Smart Card IP DOI: http://dx.doi.org/10.5772/intechopen.112491*

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## *Edited by Sudhakar Radhakrishnan and Carlos M. Travieso-González*

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Biometrics and Cryptography

Biometrics and Cryptography

*Edited by Sudhakar Radhakrishnan* 

*and Carlos M. Travieso-González*