*Boron Doping in Next-Generation Materials for Semiconductor Device DOI: http://dx.doi.org/10.5772/intechopen.106450*

especially tuning their electrical properties effectively. With the advancement of the semiconductor device, 3D monolithic integration that employs multiple vertically stacked devices for higher device density appears to have lower power consumption and provides a platform for heterogeneous integration of different active semiconductor layer materials. Therefore, the ability to prepare devices with geometry design is highly desired, such as FinFET, Gate-all-around FET, and nanosheets FET. Proper doping techniques must be decided to dope such dimension channels with shallow junction formation uniformly. Herein, this chapter investigates currently available methods and compares their performance, as shown in **Table 1**. The monolayer layer doping appears to overcome the limitation of the ion implantation for their better conformal doping profile and capable shallow junction formation.


#### **Table 1.**

*Comparison of three different boron doping techniques.*
