**3. Simulation results and discussion**

In this section, the simulation studies of an IM controlled by two control strategies, named classical DTC and SVM-DTC-IOFL, have been carried out under a Matlab/Simulink environment. The hardware architecture of the two control strategies are designed using XSG tool. The different parameters of the IM model are provided in **Table 1**.

The XSG tool is developed by Xilinx to be integrated into a Matlab/Simulink environment. It is widely utilized for the design, verification and implementation of control algorithms architectures on FPGAs. When we get the desired design with good


### **Table 1.**

*Induction machine parameters.*

of simulation results, it will be possible for the XSG to automatically generate the VHDL code. As a matter of fact, the generated VHDL code will be used for generating the download. Bit file to be integrated into the FPGA. **Figure 3** depicts the design flow through the use of the XSG. **Figure 4** presents the SVM-DTC-IOFL architecture from the XSG.
