**3. An overview on 32-bit one instruction core**

A 32-bit OIC [17] is designed to provide fault tolerance to a multi-core system with 32-bit integer instructions of conventional MIPS cores. OIC is an integer processor. The terms "32-bit OIC" and "OIC" are interchangeably used in this thesis. OIC executes only one instruction, namely, "subleq – subtract if less than or equal". The OIC has three conventional subtractors and an additional self-checking subtractor. A conventional core that detects faults in one of the functional units (i.e., ALU) sends the opcode with operands to the OIC. In this thesis, the OIC is designed to support the instruction set of 32-bit MIPS core. However, it can be designed to support 32 bit 86/ ARM instruction set by making necessary changes in the instruction decoder. The OIC emulates the instruction by repetitively executing the subleq instruction in a predetermined manner. There are four modes of operation in OIC and they are (a) baseline mode (b) DMR mode (c) TMR mode and (d) TMR + Self Checking Subtractor (SCS) or TMR + SCS mode. TMR + SCS is the "high resilience mode" of OIC. Baseline mode is invoked only when soft error detection and correction alone are required.

### **3.1 One instruction set**

"Subleq – subtract if less than or equal" is the only instruction executed by the OIC. The syntactic construct of the subleq instruction is given below.

Subleq A, B, C; Mem [B] = Mem [B] – Mem [A]

*Design of Low-Cost Reliable and Fault-Tolerant 32-Bit One Instruction Core for Multi-Core… DOI: http://dx.doi.org/10.5772/intechopen.102823*


#### **Table 1.**

*Sequence of synthesized Subleq instruction.*

; If (Mem [B] ≤ 0) go to C;

It is interpreted as: "subtract the value at the memory location A from the value at the memory location B; store the result at the memory location B; If the value at the memory location B is less than or equal to zero, then jump to C." The subleq instruction is Turing complete. The instruction set of a core or processor is said to be Turing complete, if in principle, it can perform any calculation that any other programmable computer can. As an illustration, the equivalent synthesized subleq instructions for ADD, INC, MOV, DEC and RSB (Reverse subtract) instructions are given in the **Table 1**.

### **3.2 Modes of operation**

The OIC operates in four modes as mentioned above. They are (a) baseline mode (b) DMR mode (c) TMR mode and (d) TMR + Self Checking Subtractor (SCS) or TMR + SCS mode.


transient faults are detected and corrected. The results of three subtractors and SCS are compared using a comparator. If the results differ, then entire operation is repeated to correct the transient faults. If results continue to differ, then OIC switches to TMR mode.
