**2. Bilayer-structured ultrathin memristors**

## **2.1 Fabrication processing**

Asymmetric bilayer-structured ultrathin memristor based on Pt/A/B/TiN or TaN was fabricated on SiO2/Si substrates by thermal-ALD (TALD), MLD and plasma-enhanced ALD (PEALD), as illustrated in **Figure 1a**. Herein A and B act as asymmetric memristive functional layer, PEALD TiN or sputtered TaN as bottom electrode, sputtered Pt as top electrode with a spot size in diameter of 150 μm. **Table 1** gives several typical bilayer ultrathin memristors and their architectures. The related deposition conditions have been listed in **Table 2**, including used metal precursors and reactants, source temperature and deposition temperature, and growth per cycle (GPC).

*Artificial Synapses Based on Atomic/Molecular Layer Deposited Bilayer-Structured… DOI: http://dx.doi.org/10.5772/intechopen.97753*

#### **Figure 1.**

*(a) Diagram of the asymmetric bilayer-structured ultrathin memristor. (b) I–V characteristics of the Pt/HfOx/ ZnOx/TiN synapse device measured by a modified DC double ramp sweep. The sweep sequence is denoted by the number. (c) I–V characteristics of the memristor at positive and negative bias voltages. The voltage sweep range is from 0 to 1.4 (0.6) V then back to 0 V, and the time for a sweep cycle is 1 s. the device conductivity continuously decreases or increases during the positive or negative voltage sweeps. (d) the curves of voltage and current versus time, which are plotted from the data in (c) [15].*


#### **Table 1.**

*Several typical bilayer-structured ultrathin memristors and their architectures.*


#### **Table 2.**

*Deposition conditions of asymmetric functional layers in memristors prepared by TALD/PEALD/MLD. Here TEMAH,TMA, DEZ, and MA refer to Hf[N(C2H5)CH3]4, Al(CH3)3, Zn(C2H5)2, maleic acid, respectively.*
