**6. Special operation methods of 2D-based memristors**

To further investigate the NVRS phenomenon during SET process in the MoS2 memristors, a current-sweep measurement method was introduced to the devices to get a more comprehensive understanding. **Figure 8a** shows the voltage–current (V-I) relationship by current-sweep method to SET a MoS2 device. The transition starts at a HRS, followed by a gradual increase of both voltage and current. When the current reaches ~1.8 mA, the voltage suddenly decreases while the conduction current remained the same. In other words, the resistance of the device changes from a higher resistance state to a lower resistance state. Four subsequent voltage drops can be observed from 0.01 A to 0.03 A (as shown in the amplified figure). The device remains at the final lowest resistance state during and after the backward current sweeping, which indicates that a NVRS process from HRS to LRS

**Figure 8.** *(a, b) Current-sweep switching curves and (c) states reading behaviors in MoS2 memristors.*

(SET) is realized by current sweeping. Compared to the single-step SET process realized by voltage sweeping, multiple transition steps can be observed during current-sweep measurement. Note that the voltage for the first transition in current sweeping is ~0.65 V as shown in **Figure 8a**, which is very close to the SET voltage using voltage sweeping on the same device.

In **Figure 8b**, similarly, a multiple-step SET can be observed by current sweep. Moreover, the RESET process realized by current sweeping is presented in the same figure. When the current sweeps to ~12 mA, the voltage abruptly rises, suggesting a transition from LRS to HRS. This transition current is consistent with the RESET current (~10 mA) observed using voltage sweep method. Compared to RESET behavior by voltage sweeping, a compliance voltage is required in the case of current sweeping to avoid extremely high voltage across the device. Thus, it can be deduced that the RESET process is more likely to be a current/thermal-driven effect instead of voltage-driven effect. During RESET, a large amount of Joule heating can be induced by the high RESET current, which dissolves the conductive path first and then the Au ions will be migrated though porous regions or defects in the MoS2 film, or back to the electrodes by reduction [10, 46]. This Joule heating effect is supported by the experimental observation that the transitions in voltage-sweep RESET (although sometimes with multiple steps) are sharp and sudden rather than gradual changes in 2D-based NVRS devices, a signature of Joule heatingdominated RESET process. Another evidence is that the MoS2-based memristors can be switched in both bipolar and unipolar, which suggests it is not the electrical bias but the current level that plays a more important role in the RESET switching. **Figure 8c** shows the "READ" operations on the device before and after the currentsweep switching, which demonstrates the non-volatility of the NVRS behavior with a large on/off ratio of ~107 . It can be observed that the resistance state after current-sweep RESET is consistent with the initial HRS state, which indicates the stable switching characteristics and alludes to a potential approach using current sweeping to improve the cycle-to-cycle variability at HRS, a long-standing issue for RRAM devices [47].

**Figure 9a** and **c** exhibit the switching curves of the SET process by current sweeping and RESET by voltage sweeping respectively on the same device. Similarly, the switching characteristics for current-sweep SET and voltage-sweep RESET tested on another device are shown in **Figure 9b** and **d**, respectively. Based on the statistical data of all the measured devices, a relationship can be established: normally for a device with single-step SET behavior by current sweeping (**Figure 9a**), the voltage-sweep RESET is also single-step (**Figure 9c**); on the other hand, for a device that has multiple steps during current-sweep SET (**Figure 9b**), a multiple-step RESET can be obtained by voltage sweeping (**Figure 9d**). With the

*Memristors Based on 2D Monolayer Materials DOI: http://dx.doi.org/10.5772/intechopen.98331*

**Figure 9.**

*The resistance switching characteristics of (a, b) current-sweep SET and (c, d) voltage-sweep RESET on the same device with similar transition behavior.*

experimental results that show single or multiple transition steps, it can be inferred that multiple defect/vacancy-rich regions exist in the device area, which leads to single or multiple conductive points formation during NVRS.

**Figure 10** presents the resistance evolution under constant voltage stress (CVS) on the devices at HRS. The working devices refer to the devices that exhibit stable switching characteristics and have been tested for several DC cycles and RESET to HRS before stress measurement. Then, relatively low constant voltage bias (< VSET) is applied on the devices with positive CVS (**Figure 10a**) and with negative CVS (**Figure 10b**). It can be observed that the resistance changes from HRS to an even higher resistance state (labeled as HRS'). This phenomenon is opposite to the observation in the TMO-based devices, where the resistance is switched from HRS to LRS under CVS [48, 49]. Similar behavior has been observed with both positive and negative CVS, which can be related with the coexistence of unipolar and bipolar operations in MoS2 memristors. Moreover, CVS test is performed on the fresh (as-fabricated) devices and shows similar HRS to HRS' transition (see **Figure 10c**). This phenomenon suggests that for both fresh devices and pre-RESET working devices, the commonly referred "HRS" is not the highest resistance, but actually an intermediate state that can still be modulated to a higher resistance state (HRS'). However, if the voltage stress goes higher than the SET voltage (**Figure 10d**), the device will switch to LRS and then fail due to high power.

The previously discussed DDA model with the assistance of metal atom/ion migration can be used to explain the NVRS phenomenon in MoS2 memristors. The CVS test results provide more insights to this model with the tunable resistance states illustrated in **Figure 10e**. The existence of HRS' suggests that, a small portion of metal atoms may be embedded in the MoS2 film at HRS, which could possibly

#### **Figure 10.**

*(a-d) Resistance evolution under CVS MoS2-based memristors at HRS in different scenarios. (e) Illustration for the CVS process.*

be induced by deposition process for as-fabricated devices or incomplete voltagesweep RESET for working devices. Previous reports have shown experimental evidence to support this assumption that metal atoms can diffuse into the defects in 2D TMD films during the evaporation deposition process of TE confirmed by crosssectional TEM images [50, 51]. These embedded metal atoms/ions are negligible in bulk metal oxides, but they can be important in the atomically thin MoS2 sheets. With a relatively low voltage stress, these metal atoms tend to move out of the vacancies due to the accumulated Joule heating effect, which results in a transition to HRS'. This unique resistance evolution behavior under CVS suggests a distinct property for 2D materials. For traditional TMO-based bulk materials, the resistance state is typically controlled by the characteristics of the conductive filament and the "gap" region between the electrode and filament tip [10, 52]. While for 2D materials, the resistance state can be modulated by the interaction between atoms/ions from electrodes and interfacial vacancies, enabling atomic-level resistance control with advanced defect engineering for ultra-thin crystalline 2D materials.
