**3. DC and pulse switching characteristics**

DC electrical measurements were performed on as-fabricated devices consisting of atomic sheets with Au bottom and top electrodes and revealed memristive phenomenon in a dozen 2D systems (**Figure 2**). For instance, MoS2, the prototypical

#### **Figure 2.**

*Typical I-V curves of resistive switching behavior in crossbar devices for single-layer (1 L) MoS2, WS2, ReS2, MoSe2, WSe2, ReSe2, h-BN, and few-layer (FL) SnS2, SnSe2, MoTe2, and litho-free device for monolayer WS2/MoS2 heterostructure, and multilayer PtSe2. The y-axes are normalized as current density J.*

### *Memristors Based on 2D Monolayer Materials DOI: http://dx.doi.org/10.5772/intechopen.98331*

TMD, featured low currents corresponding to a high-resistance state until the application of ~1.7 V, which "SET" the 2D-layer switch to a low-resistance state that maintains until a negative voltage is applied to "RESET" it. A compliance current is typically applied during SET process to prevent irreversible breakdown, while no compliance current is needed during RESET process. Interestingly, the monolayer non-volatile memory devices required no electro-forming step, a prerequisite in transition metal oxides (TMOs) that initializes a soft dielectric breakdown to form a conductive filament for following resistive switching operation [10]. Although some researches have shown that electroforming can be avoided by thickness scaling into the nm-regime, excessive leakage current from trap-assisted tunneling is a limiting consequence [10, 34]. Here, an ON/OFF ratio above 105 can be achieved in 2D NVRS devices, which highlights a defining advantage of crystalline monolayers over ultrathin amorphous oxides. These collective results of memristive phenomenon in representative atomic sheets allude to a universal effect in non-metallic 2D materials which opens a new avenue of scientific research on defects, charge, and interfacial phenomena at the atomic scale, and the associated materials design for diverse applications. Certain 2D memristors of the same MIM construction feature unipolar switching where voltage of the same polarity is used for both SET and RESET programming. Regarding the polarity dependence, the precise understanding of the factors that produce either bipolar or unipolar switching in 2D sheets is yet unclear and deserving of atomistic and unipolar switching is a complex competition among several parameters including lateral area, grain size, and modeling and microscopy studies for elucidation. A recent study in TMOs have suggested that the co-existence of bipolar compliance conditions, which may help the understanding of the phenomenon [35]. However, the underlying physics of unipolar switching has been previously established to be originated from electro-thermal heating that facilitates diffusion. A symptom of this effect is that a relatively higher RESET current is required to increase the local temperature to break the conductive link.

In most of the experiments, gold was selected as an inert electrode to rule out any switching effect that might arise from possible interfacial metal oxide formation. Furthermore, to rule out the undesirable contribution of polymer contamination from microfabrication, very clean devices including lithography-free and transfer-free devices (**Figure 3a**) were made, which also produced the memristive effect, alluding to an intrinsic origin. The lithography-free and transfer-free devices are based on monolayer MoS2 grown directly on gold foil [36].

Previously reports have shown that line or grain boundary defects in polycrystalline 2D multi-layers play an intrinsic role in switching [37]. While it may be a possible factor in monolayers, it is not an exclusive factor as shown in **Figure 3b** from a vertical MIM device realized on a single-crystal CVD MoS2, highlighting the potential role of localized effects. In addition, the NVRS phenomenon is not restricted to inert electrodes, since monolayer TMD with electrochemically active (Ag) electrodes can produce memristive effect as presented in **Figure 3c**. Moreover, monolayer graphene has also been demonstrated to be a suitable electrode option (**Figure 3d**).

Switching performance of retention time, DC switching cycling and variability was measured in 2D-based memristors. The NVRS devices present distinct advantages in terms of ultimate vertical scaling, down to an atomic layer thin with forming-free characteristics. By replacing metal electrodes with graphene, the entire memory cell can be scaled below 2 nm. Also, the transparency of graphene and the unique spectroscopic features of 2D materials provide the advantages of direct optical characterization for in-situ studies and in-line manufacturing testing. At an early stage, manual endurance data (**Figure 4a** and **b**) is not yet sufficient to meet the strict requirements for solid-state memory, a reflection of the nascent state of 2D atomristors compared to TMO memristors, which had similar endurance

#### **Figure 3.**

*Typical I-V curves of monolayer MoS2 memristors with different device conditions, including (a) litho-free and transfer-free device, (b) single crystal device, (c) litho-free device with Ag as BE and TE, and (d) crossbar device with graphene as TE and Au as BE.*

#### **Figure 4.**

*(a,b) Endurance and resistance distribution of MoS2 crossbar MIM device with 150 manual DC switching cycles. (c) Time dependent measurements of MoS2 crossbar switch featuring stable retention over a week at room temperature.*

(<103 cycles) in early research but has now advanced above 106 cycles. Oxidation by interface engineering or doping may improve endurance performance, similar to what has been observed in amorphous-carbon memory devices [38]. Preliminary retention test of non-volatile states shows up to a week (**Figure 4c**), which is already sufficient for certain neuromorphic applications involving short and medium-term plasticity [39]. In addition, the sub-nanometer thinness of monolayers is promising for realizing ultra-high densities in 3D array architecture. As an estimation, at a loose pitch of 10 nm, an atomristor density of 1015/mm3 would provide ample room to mimic the density of human synapses (~109 /mm3 ). For single-bit single-level memory storage, it corresponds to a theoretical areal density of 6.4 Tbit/in2 .

Beyond DC characterization, pulse SET/RESET is feasible for 2D-based memristors (see **Figure 5** for monolayer h-BN device). The read I-V curves before *Memristors Based on 2D Monolayer Materials DOI: http://dx.doi.org/10.5772/intechopen.98331*

**Figure 5.** *(a) 15 ns SET and (b) 50 ns RESET pulse demonstration in h-BN memristor.*

and after applying pulses clearly show the switching from OFF to ON state and from ON to OFF state, with 15 ns SET switching speed, and 50 ns RESET switching speed.
