**5. Results and discussions**

Results of the simulation of the suggested QCA-gate is presented in this section obtained using the CAD tool QCADesigner. Coherence vector simulation engine and all other parameters set at default values are used. The essential QCA parameters are presented in **Table 1**. Reduction in the XOR gate size will result in a subsequent reduction of the scaled-up circuits. The simulation result of the proposed three input


#### **Table 1.**

*Bistable approximation parameters model.*

#### **Figure 4.**

*Output waveforms of the proposed gate.*

*A Novel Three-Input XOR Gate Based on Quantum Dot-Cellular Automata with Power… DOI: http://dx.doi.org/10.5772/intechopen.95554*


#### **Table 2.**

*The comparison of the 3-input QCA XOR gates.*


#### **Table 3.**

*Power analysis results of the proposed 3-input XOR gate and previously reported designs.*

XOR gate is shown in **Figure 4**. The comparison outcomes of the number of consumed cells (cell count), the occupied area, the gate count, and the latency of the suggested 3-input XOR with the previous coplanar 3-input XOR gate in Refs [16, 21, 22] are shown in **Table 2**. The proposed QCA XOR gate represents a 14.28% improvement in cell consumption relative to the best-optimized gate in Ref. [16]. To estimate the power dissipation, we use the QCAPro software. **Table 3** depicts the detailed power dissipation data of the proposed QCA XOR gate at a temperature of 2 K. As expected, the proposed XOR gate dissipates 71.18%, 75.63%, and 78.49% less energy at 0.5 Ek, 1 Ek, and 1.5 Ek, respectively, compared with the XOR gate in [20]. It can be seen from **Table 3** that the proposed gate consumes the lowest amount of energy over previous designs, and therefore it is very appropriate for ultralow power devices.
